HK1209232A1 - 電子設備 - Google Patents

電子設備

Info

Publication number
HK1209232A1
HK1209232A1 HK15109623.9A HK15109623A HK1209232A1 HK 1209232 A1 HK1209232 A1 HK 1209232A1 HK 15109623 A HK15109623 A HK 15109623A HK 1209232 A1 HK1209232 A1 HK 1209232A1
Authority
HK
Hong Kong
Prior art keywords
electronic device
electronic
Prior art date
Application number
HK15109623.9A
Other languages
English (en)
Inventor
遠山仁博
諏訪元大
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of HK1209232A1 publication Critical patent/HK1209232A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
HK15109623.9A 2014-02-19 2015-09-30 電子設備 HK1209232A1 (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014029827A JP6207422B2 (ja) 2014-02-19 2014-02-19 電子装置

Publications (1)

Publication Number Publication Date
HK1209232A1 true HK1209232A1 (zh) 2016-03-24

Family

ID=53799401

Family Applications (1)

Application Number Title Priority Date Filing Date
HK15109623.9A HK1209232A1 (zh) 2014-02-19 2015-09-30 電子設備

Country Status (6)

Country Link
US (1) US9549461B2 (zh)
JP (1) JP6207422B2 (zh)
KR (1) KR20150098190A (zh)
CN (1) CN104851862B (zh)
HK (1) HK1209232A1 (zh)
TW (1) TW201601261A (zh)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9844135B2 (en) * 2014-09-08 2017-12-12 Cisco Technology, Inc. Decoupling capacitive arrangement to manage power integrity
CN105990260A (zh) * 2015-02-06 2016-10-05 展讯通信（上海）有限公司 改进型的表面贴装结构
KR20180088786A (ko) * 2015-11-30 2018-08-07 르네사스 일렉트로닉스 가부시키가이샤 전자 장치
JP6881726B2 (ja) * 2016-06-28 2021-06-02 株式会社Ｊｏｌｅｄ 実装基板
CN108463048B (zh) * 2017-02-21 2022-04-15 拉碧斯半导体株式会社 基板电路装置
JP6826467B2 (ja) 2017-03-10 2021-02-03 ルネサスエレクトロニクス株式会社 電子装置
US20190006356A1 (en) * 2017-06-29 2019-01-03 Intel Corporation Package with embedded capacitors
JP2019149508A (ja) * 2018-02-28 2019-09-05 京セラ株式会社 配線基板及び電子装置
WO2019244491A1 (ja) * 2018-06-22 2019-12-26 日立オートモティブシステムズ株式会社 電力変換装置
CN110941156B (zh) * 2018-09-25 2023-08-25 富士胶片商业创新有限公司 图像形成装置及基板
CN109116485A (zh) * 2018-11-02 2019-01-01 青岛海信宽带多媒体技术有限公司 一种光接收次模块及光模块
TWI708527B (zh) * 2018-11-23 2020-10-21 友達光電股份有限公司 電路板
JP2020150146A (ja) * 2019-03-14 2020-09-17 キオクシア株式会社 半導体装置
KR20210017635A (ko) * 2019-08-09 2021-02-17 삼성전자주식회사 전원공급 보조장치를 구비한 인쇄회로기판, 및 이를 구비한 전자기기
JP7362380B2 (ja) 2019-09-12 2023-10-17 キヤノン株式会社 配線基板及び半導体装置
JP2021082786A (ja) 2019-11-22 2021-05-27 ルネサスエレクトロニクス株式会社 半導体装置
US11495536B2 (en) * 2020-11-24 2022-11-08 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method for forming thereof
US11537154B2 (en) 2020-12-09 2022-12-27 Samsung Electronics Co., Ltd. Mobile devices and methods controlling power in mobile devices
US11616019B2 (en) * 2020-12-21 2023-03-28 Nvidia Corp. Semiconductor assembly
CN112885808B (zh) * 2021-01-21 2022-03-08 长鑫存储技术有限公司 封装基板以及封装结构
US11889616B2 (en) * 2021-03-09 2024-01-30 Mitsubishi Electric Corporation Circuit board

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5068631A (en) * 1990-08-09 1991-11-26 At&T Bell Laboratories Sub power plane to provide EMC filtering for VLSI devices
JP2001015885A (ja) * 1999-07-02 2001-01-19 Murata Mfg Co Ltd 高周波用電子回路及び高周波用電子回路へのチップ三端子コンデンサの実装構造
JP4387076B2 (ja) * 2001-10-18 2009-12-16 株式会社ルネサステクノロジ 半導体装置
JP3646098B2 (ja) * 2002-03-27 2005-05-11 コニカミノルタビジネステクノロジーズ株式会社 回路基板
JP4047351B2 (ja) * 2005-12-12 2008-02-13 キヤノン株式会社 多層プリント回路板
US7292450B2 (en) * 2006-01-31 2007-11-06 Microsoft Corporation High density surface mount part array layout and assembly technique
JP2007305642A (ja) * 2006-05-09 2007-11-22 Murata Mfg Co Ltd 多層回路基板及び電子装置
JP2007317888A (ja) * 2006-05-25 2007-12-06 Murata Mfg Co Ltd 電源ライン回路
JP5354949B2 (ja) * 2007-06-19 2013-11-27 キヤノン株式会社 プリント回路板
JP5402830B2 (ja) * 2010-05-24 2014-01-29 株式会社村田製作所 多層配線基板
JP2012064892A (ja) * 2010-09-17 2012-03-29 Toshiba Corp 半導体装置

Also Published As

Publication number Publication date
KR20150098190A (ko) 2015-08-27
US9549461B2 (en) 2017-01-17
JP2015154062A (ja) 2015-08-24
CN104851862B (zh) 2018-09-07
JP6207422B2 (ja) 2017-10-04
TW201601261A (zh) 2016-01-01
US20150237731A1 (en) 2015-08-20
CN104851862A (zh) 2015-08-19

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