HK1036367A1 - Encapsulated surface wave component and method formaking same. - Google Patents

Encapsulated surface wave component and method formaking same.

Info

Publication number
HK1036367A1
HK1036367A1 HK01106831A HK01106831A HK1036367A1 HK 1036367 A1 HK1036367 A1 HK 1036367A1 HK 01106831 A HK01106831 A HK 01106831A HK 01106831 A HK01106831 A HK 01106831A HK 1036367 A1 HK1036367 A1 HK 1036367A1
Authority
HK
Hong Kong
Prior art keywords
surface wave
wave component
encapsulated surface
same
method formaking
Prior art date
Application number
HK01106831A
Other languages
English (en)
Inventor
Agnes Bidard
Jean-Marc Bureau
Original Assignee
Thomson Csf
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Csf filed Critical Thomson Csf
Publication of HK1036367A1 publication Critical patent/HK1036367A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1078—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a foil covering the non-active sides of the SAW device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/08—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1071—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the SAW device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/42—Piezoelectric device making
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
HK01106831A 1998-12-08 2001-09-27 Encapsulated surface wave component and method formaking same. HK1036367A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9815478A FR2786959B1 (fr) 1998-12-08 1998-12-08 Composant a ondes de surface encapsule et procede de fabrication collective
FR9930336 1999-12-07

Publications (1)

Publication Number Publication Date
HK1036367A1 true HK1036367A1 (en) 2001-12-28

Family

ID=9533716

Family Applications (1)

Application Number Title Priority Date Filing Date
HK01106831A HK1036367A1 (en) 1998-12-08 2001-09-27 Encapsulated surface wave component and method formaking same.

Country Status (10)

Country Link
US (1) US6852561B2 (de)
EP (1) EP1053592B1 (de)
JP (1) JP2002532934A (de)
KR (1) KR20010040597A (de)
CN (1) CN1158757C (de)
CA (1) CA2320343A1 (de)
DE (1) DE69920407T2 (de)
FR (1) FR2786959B1 (de)
HK (1) HK1036367A1 (de)
WO (1) WO2000035085A1 (de)

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US7230512B1 (en) * 2003-08-19 2007-06-12 Triquint, Inc. Wafer-level surface acoustic wave filter package with temperature-compensating characteristics
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DE102005026243B4 (de) * 2005-06-07 2018-04-05 Snaptrack, Inc. Elektrisches Bauelement und Herstellungsverfahren
US7807550B2 (en) * 2005-06-17 2010-10-05 Dalsa Semiconductor Inc. Method of making MEMS wafers
US8053872B1 (en) 2007-06-25 2011-11-08 Rf Micro Devices, Inc. Integrated shield for a no-lead semiconductor device package
US8186048B2 (en) 2007-06-27 2012-05-29 Rf Micro Devices, Inc. Conformal shielding process using process gases
US8062930B1 (en) 2005-08-08 2011-11-22 Rf Micro Devices, Inc. Sub-module conformal electromagnetic interference shield
US8959762B2 (en) 2005-08-08 2015-02-24 Rf Micro Devices, Inc. Method of manufacturing an electronic module
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US20070048887A1 (en) * 2005-08-26 2007-03-01 Innovative Micro Technology Wafer level hermetic bond using metal alloy
KR100653089B1 (ko) * 2005-10-31 2006-12-04 삼성전자주식회사 탄성 표면파 디바이스 웨이퍼 레벨 패키지 및 그 패키징방법
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WO2009096563A1 (ja) * 2008-01-30 2009-08-06 Kyocera Corporation 弾性波装置およびその製造方法
US8372674B2 (en) * 2008-02-01 2013-02-12 Honeywell International Inc. Method for chemical sensor fabrication and related sensor
US8101460B2 (en) * 2008-06-04 2012-01-24 Stats Chippac, Ltd. Semiconductor device and method of shielding semiconductor die from inter-device interference
TWI406382B (zh) * 2010-03-09 2013-08-21 Txc Corp Welded - type vibrator device wafer - level package structure
CN101820264B (zh) * 2010-04-06 2012-06-06 台晶(宁波)电子有限公司 一种贯孔式振子装置晶圆级封装结构
CN101807898B (zh) * 2010-04-06 2012-05-09 台晶(宁波)电子有限公司 一种振子装置三维晶圆级封装结构
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US9627230B2 (en) 2011-02-28 2017-04-18 Qorvo Us, Inc. Methods of forming a microshield on standard QFN package
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US9324659B2 (en) * 2011-08-01 2016-04-26 Stats Chippac, Ltd. Semiconductor device and method of forming POP with stacked semiconductor die and bumps formed directly on the lower die
US8866285B2 (en) * 2012-09-05 2014-10-21 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out package comprising bulk metal
US9807890B2 (en) 2013-05-31 2017-10-31 Qorvo Us, Inc. Electronic modules having grounded electromagnetic shields
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KR102556333B1 (ko) * 2015-12-18 2023-07-17 (주)와이솔 표면 탄성파 웨이퍼 레벨 패키지 및 이를 위한 pcb 제작 방법
US20180269853A1 (en) * 2017-03-14 2018-09-20 Wisol Co., Ltd. Surface acoustic wave wafer level package and method of manufacturing pcb for the same
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US11114363B2 (en) 2018-12-20 2021-09-07 Qorvo Us, Inc. Electronic package arrangements and related methods
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Also Published As

Publication number Publication date
JP2002532934A (ja) 2002-10-02
FR2786959A1 (fr) 2000-06-09
CN1290424A (zh) 2001-04-04
CA2320343A1 (fr) 2000-06-15
CN1158757C (zh) 2004-07-21
US20040103509A1 (en) 2004-06-03
DE69920407D1 (de) 2004-10-28
DE69920407T2 (de) 2005-09-29
US6852561B2 (en) 2005-02-08
KR20010040597A (ko) 2001-05-15
WO2000035085A1 (fr) 2000-06-15
EP1053592A1 (de) 2000-11-22
FR2786959B1 (fr) 2001-05-11
EP1053592B1 (de) 2004-09-22

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Legal Events

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PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20081207