GB2247780A - Fabricating a bipolar transistor - Google Patents

Fabricating a bipolar transistor Download PDF

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Publication number
GB2247780A
GB2247780A GB9100672A GB9100672A GB2247780A GB 2247780 A GB2247780 A GB 2247780A GB 9100672 A GB9100672 A GB 9100672A GB 9100672 A GB9100672 A GB 9100672A GB 2247780 A GB2247780 A GB 2247780A
Authority
GB
United Kingdom
Prior art keywords
forming
layer
oxide layer
etching
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9100672A
Other languages
English (en)
Other versions
GB9100672D0 (en
Inventor
Kim Kyouchul
Jongmil Youn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB9100672D0 publication Critical patent/GB9100672D0/en
Publication of GB2247780A publication Critical patent/GB2247780A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
GB9100672A 1990-09-04 1991-01-11 Fabricating a bipolar transistor Withdrawn GB2247780A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900013935A KR920007124A (ko) 1990-09-04 1990-09-04 폴리 에미터 바이폴라 트랜지스터의 제조방법

Publications (2)

Publication Number Publication Date
GB9100672D0 GB9100672D0 (en) 1991-02-27
GB2247780A true GB2247780A (en) 1992-03-11

Family

ID=19303215

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9100672A Withdrawn GB2247780A (en) 1990-09-04 1991-01-11 Fabricating a bipolar transistor

Country Status (6)

Country Link
JP (1) JPH0629302A (enExample)
KR (1) KR920007124A (enExample)
DE (1) DE4103594A1 (enExample)
FR (1) FR2666450A1 (enExample)
GB (1) GB2247780A (enExample)
IT (1) IT1245092B (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995002898A1 (en) * 1993-07-12 1995-01-26 National Semiconductor Corporation Process for fabricating semiconductor devices having arsenic emitters
US6249031B1 (en) * 1998-02-09 2001-06-19 Chartered Semiconductor Manufacturing Ltd. High gain lateral PNP and NPN bipolar transistor and process compatible with CMOS for making BiCMOS circuits
US7737049B2 (en) 2007-07-31 2010-06-15 Qimonda Ag Method for forming a structure on a substrate and device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4240738A1 (en) * 1992-12-03 1993-08-26 Siemens Ag Bipolar transistor prodn. for long service life - by forming base in surface of substrate, short term temp. adjusting, and forming emitter
KR19980054454A (ko) * 1996-12-27 1998-09-25 김영환 폴리실키콘층 형성 방법
KR100382725B1 (ko) * 2000-11-24 2003-05-09 삼성전자주식회사 클러스터화된 플라즈마 장치에서의 반도체소자의 제조방법

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0062725B1 (de) * 1981-04-14 1984-09-12 Deutsche ITT Industries GmbH Verfahren zum Herstellen eines integrierten Planartransistors
WO1983002314A1 (en) * 1981-12-31 1983-07-07 Chye, Patrick, W. Method for reducing oxygen precipitation in silicon wafers
DE3304642A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit bipolartransistor-strukturen und verfahren zu ihrer herstellung
DE3580206D1 (de) * 1984-07-31 1990-11-29 Toshiba Kawasaki Kk Bipolarer transistor und verfahren zu seiner herstellung.
KR880000483B1 (ko) * 1985-08-05 1988-04-07 재단법인 한국전자통신 연구소 반도체소자의 제조방법
US4693782A (en) * 1985-09-06 1987-09-15 Matsushita Electric Industrial Co., Ltd. Fabrication method of semiconductor device
EP0239825B1 (de) * 1986-03-21 1993-08-25 Siemens Aktiengesellschaft Verfahren zur Herstellung einer Bipolartransistorstruktur für Höchstgeschwindigkeitsschaltung
JPS6353928A (ja) * 1986-08-22 1988-03-08 Anelva Corp ドライエツチング方法
US4839302A (en) * 1986-10-13 1989-06-13 Matsushita Electric Industrial Co., Ltd. Method for fabricating bipolar semiconductor device
JPS63182860A (ja) * 1987-01-26 1988-07-28 Toshiba Corp 半導体装置とその製造方法
JP2654011B2 (ja) * 1987-03-31 1997-09-17 株式会社東芝 半導体装置の製造方法
JPH01157565A (ja) * 1987-12-14 1989-06-20 Nec Corp Ｂｉ−ＭＯＳ集積回路装置の製造方法
JPH0736389B2 (ja) * 1988-11-10 1995-04-19 三菱電機株式会社 半導体装置の電極配線の形成方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995002898A1 (en) * 1993-07-12 1995-01-26 National Semiconductor Corporation Process for fabricating semiconductor devices having arsenic emitters
US6249031B1 (en) * 1998-02-09 2001-06-19 Chartered Semiconductor Manufacturing Ltd. High gain lateral PNP and NPN bipolar transistor and process compatible with CMOS for making BiCMOS circuits
US7737049B2 (en) 2007-07-31 2010-06-15 Qimonda Ag Method for forming a structure on a substrate and device

Also Published As

Publication number Publication date
FR2666450B1 (enExample) 1993-02-26
ITMI910068A1 (it) 1992-07-11
FR2666450A1 (fr) 1992-03-06
DE4103594A1 (de) 1992-03-05
KR920007124A (ko) 1992-04-28
GB9100672D0 (en) 1991-02-27
JPH0629302A (ja) 1994-02-04
ITMI910068A0 (it) 1991-01-11
IT1245092B (it) 1994-09-13

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