GB1597726A - Extremely low current load device for integrated circuit - Google Patents

Extremely low current load device for integrated circuit Download PDF

Info

Publication number
GB1597726A
GB1597726A GB39787/78A GB3978778A GB1597726A GB 1597726 A GB1597726 A GB 1597726A GB 39787/78 A GB39787/78 A GB 39787/78A GB 3978778 A GB3978778 A GB 3978778A GB 1597726 A GB1597726 A GB 1597726A
Authority
GB
United Kingdom
Prior art keywords
conductive path
substrate
defining
conductivity type
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB39787/78A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CTU of Delaware Inc
Original Assignee
Mostek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mostek Corp filed Critical Mostek Corp
Publication of GB1597726A publication Critical patent/GB1597726A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H10D84/817—Combinations of field-effect devices and resistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
GB39787/78A 1976-11-22 1977-11-21 Extremely low current load device for integrated circuit Expired GB1597726A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74381076A 1976-11-22 1976-11-22

Publications (1)

Publication Number Publication Date
GB1597726A true GB1597726A (en) 1981-09-09

Family

ID=24990283

Family Applications (2)

Application Number Title Priority Date Filing Date
GB39787/78A Expired GB1597726A (en) 1976-11-22 1977-11-21 Extremely low current load device for integrated circuit
GB48383/77A Expired GB1597725A (en) 1976-11-22 1977-11-21 Integrated circuit memory

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB48383/77A Expired GB1597725A (en) 1976-11-22 1977-11-21 Integrated circuit memory

Country Status (5)

Country Link
JP (6) JPS5389382A (https=)
DE (1) DE2751481C2 (https=)
FR (2) FR2382744A1 (https=)
GB (2) GB1597726A (https=)
IT (1) IT1090938B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4453175A (en) * 1979-09-19 1984-06-05 Tokyo Shibaura Denki Kabushiki Kaisha MOS Static RAM layout with polysilicon resistors over FET gates
EP0032608A1 (en) * 1980-01-22 1981-07-29 Mostek Corporation Column line powered static ram cell
JPS57130461A (en) * 1981-02-06 1982-08-12 Hitachi Ltd Semiconductor memory storage
US4446613A (en) * 1981-10-19 1984-05-08 Intel Corporation Integrated circuit resistor and method of fabrication
JPS61134054A (ja) * 1984-12-04 1986-06-21 Nec Corp 半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3576478A (en) * 1969-07-22 1971-04-27 Philco Ford Corp Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode
GB1318856A (en) * 1971-03-18 1973-05-31 Ferranti Ltd Semiconductor devices
JPS5710578B2 (https=) * 1972-06-20 1982-02-26
GB1391959A (en) * 1972-07-20 1975-04-23 Ferranti Ltd Semiconductor devices
JPS584459B2 (ja) 1973-06-01 1983-01-26 株式会社日立製作所 フリツプフロツプ回路装置
GB1501114A (en) * 1974-04-25 1978-02-15 Rca Corp Method of making a semiconductor device
CH581904A5 (https=) * 1974-08-29 1976-11-15 Centre Electron Horloger
DE2733514A1 (de) * 1976-07-26 1978-02-09 Hitachi Ltd Halbleiter-vorrichtungen

Also Published As

Publication number Publication date
FR2382744A1 (fr) 1978-09-29
FR2382771A1 (fr) 1978-09-29
JP2696110B2 (ja) 1998-01-14
JPS60181055U (ja) 1985-12-02
JP2692439B2 (ja) 1997-12-17
JPH0613577A (ja) 1994-01-21
FR2382744B1 (https=) 1984-01-06
IT1090938B (it) 1985-06-26
JPS5389382A (en) 1978-08-05
GB1597725A (en) 1981-09-09
JPS6159360U (https=) 1986-04-21
JPH06188389A (ja) 1994-07-08
FR2382771B1 (https=) 1985-04-19
DE2751481C2 (de) 1986-10-23
JPS5886763A (ja) 1983-05-24
DE2751481A1 (de) 1978-06-08

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]

Free format text: FOR PRINTING ERROR 1596726 READ 1597726

PE20 Patent expired after termination of 20 years

Effective date: 19971120