GB1391959A - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB1391959A
GB1391959A GB3404472A GB3404472A GB1391959A GB 1391959 A GB1391959 A GB 1391959A GB 3404472 A GB3404472 A GB 3404472A GB 3404472 A GB3404472 A GB 3404472A GB 1391959 A GB1391959 A GB 1391959A
Authority
GB
United Kingdom
Prior art keywords
igfet
resistor
gate
gated
overall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3404472A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ferranti International PLC
Original Assignee
Ferranti PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ferranti PLC filed Critical Ferranti PLC
Priority to GB3404472A priority Critical patent/GB1391959A/en
Publication of GB1391959A publication Critical patent/GB1391959A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

1391959 Integrated circuits FERRANTI Ltd 13 July 1973 [20 July 1972] 34044/72 Heading H1K An integrated circuit includes a first IGFET formed in a monocrystalline semiconductor body and a gated resistor formed in a polycrystalline layer disposed on and separated from said body by an insulating layer. As described the IGFET and gated resistor are connected in series across a power supply with their junction connected to the gate of a further IGFET which with its series resistive load is likewise connected. In operation application of a suitable potential to the gate of the first IGFET charges the gate capacitance of the further IGFET via the gated resistor, a potential being applied to the gate of the resistor to render it non-conductive on completion of charging to prevent wasteful topping up of the capacitance prior to its discharge via the first IGFET in a rapidly following operation. The first IGFET gated resistor combination shown in plan in Fig. 3 is formed on an N-type silicon wafer by suitably aperturing an overall silicon oxide layer, regrowing thinner oxide in the apertures, depositing 20 ohm. cm. polycrystalline P-type silicon overall and selectively etching it to define the self-registering gate 28 of the first IGFET and its associated conductive track 30 and the body 17 in which the resistor is formed, providing a further oxide mask exposing the source and drain sites of the IGFET and resistor and the gate of the IGFET, and the sites of associated conductive tracks 14, 15 and 30, and diffusing these with acceptor impurity, reforming the oxides and etching contact apertures 41-44 and then depositing aluminium overall and etching back to provide the contacts and interconnections shown and the gate 17 of the resistor.
GB3404472A 1972-07-20 1972-07-20 Semiconductor devices Expired GB1391959A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB3404472A GB1391959A (en) 1972-07-20 1972-07-20 Semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3404472A GB1391959A (en) 1972-07-20 1972-07-20 Semiconductor devices

Publications (1)

Publication Number Publication Date
GB1391959A true GB1391959A (en) 1975-04-23

Family

ID=10360673

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3404472A Expired GB1391959A (en) 1972-07-20 1972-07-20 Semiconductor devices

Country Status (1)

Country Link
GB (1) GB1391959A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2733514A1 (en) * 1976-07-26 1978-02-09 Hitachi Ltd MISFET control electrode produced on semiconductor substrate - is formed on top of insulator layer overlapping source and drain areas
FR2382771A1 (en) * 1976-11-22 1978-09-29 Mostek Corp SEMICONDUCTOR STRUCTURE FOR INTEGRATED CIRCUIT
EP0002364A1 (en) * 1977-12-01 1979-06-13 Fujitsu Limited Integrated semiconductor device and process for producing it
DE2947311A1 (en) * 1978-11-24 1980-05-29 Hitachi Ltd INTEGRATED SEMICONDUCTOR CIRCUIT
EP0054471A2 (en) * 1980-12-12 1982-06-23 Fujitsu Limited Semiconductor resistor element

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2733514A1 (en) * 1976-07-26 1978-02-09 Hitachi Ltd MISFET control electrode produced on semiconductor substrate - is formed on top of insulator layer overlapping source and drain areas
FR2382771A1 (en) * 1976-11-22 1978-09-29 Mostek Corp SEMICONDUCTOR STRUCTURE FOR INTEGRATED CIRCUIT
FR2382744A1 (en) * 1976-11-22 1978-09-29 Mostek Corp EXTREMELY LOW CURRENT CHARGING DEVICE FOR AN INTEGRATED CIRCUIT
EP0002364A1 (en) * 1977-12-01 1979-06-13 Fujitsu Limited Integrated semiconductor device and process for producing it
DE2947311A1 (en) * 1978-11-24 1980-05-29 Hitachi Ltd INTEGRATED SEMICONDUCTOR CIRCUIT
EP0054471A2 (en) * 1980-12-12 1982-06-23 Fujitsu Limited Semiconductor resistor element
EP0054471A3 (en) * 1980-12-12 1984-07-18 Fujitsu Limited Semiconductor resistor element

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees