FR2661557B1 - Procede pour preparer des circuits integres supraconducteurs. - Google Patents

Procede pour preparer des circuits integres supraconducteurs.

Info

Publication number
FR2661557B1
FR2661557B1 FR9014863A FR9014863A FR2661557B1 FR 2661557 B1 FR2661557 B1 FR 2661557B1 FR 9014863 A FR9014863 A FR 9014863A FR 9014863 A FR9014863 A FR 9014863A FR 2661557 B1 FR2661557 B1 FR 2661557B1
Authority
FR
France
Prior art keywords
layer
superconducting
resin
substrate
active regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9014863A
Other languages
English (en)
Other versions
FR2661557A1 (fr
Inventor
Jeong Ju-Young
Ju-Young Jeong
Song I Hun
I Hun Song
Yoon Seok-Yeol
Seok-Yeol Yoon
Park Sang-Cheol
Sang-Cheol Park
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electro Mechanics Co Ltd
Original Assignee
Samsung Electro Mechanics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electro Mechanics Co Ltd filed Critical Samsung Electro Mechanics Co Ltd
Publication of FR2661557A1 publication Critical patent/FR2661557A1/fr
Application granted granted Critical
Publication of FR2661557B1 publication Critical patent/FR2661557B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0268—Manufacture or treatment of devices comprising copper oxide
    • H10N60/0296—Processes for depositing or forming copper oxide superconductor layers
    • H10N60/0576—Processes for depositing or forming copper oxide superconductor layers characterised by the substrate
    • H10N60/0632—Intermediate layers, e.g. for growth control
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0268—Manufacture or treatment of devices comprising copper oxide
    • H10N60/0661—Processes performed after copper oxide formation, e.g. patterning
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/70—High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701—Coated or thin film device, i.e. active or passive
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/725—Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/728—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/725—Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/742—Annealing

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)

Abstract

Selon ce procédé, on fait diffuser de façon sélective de l'oxygène dans la surface d'un substrat en Yba2 Cu3 Oy tétragonal pour former une couche mince possédant la phase orthorhombique, en polissant un substrat pour former une pastille (1), en déposant une couche formant masque isolant (2) sur la pastille et une résine photosensible (3) sur cette couche, en éliminant des parties sélectives de la résine, en éliminant la couche (2) déposée sur des régions actives (4) par corrosion chimique et la résine, et en faisant diffuser de l'oxygène dans les régions actives en formant des îlots orthorhombiques supraconducteurs isolés et entourés par des phases tétragonales non supraconductrices. Application notamment à la fabrication économique de circuits intégrés supraconducteurs de grande qualité.
FR9014863A 1990-04-27 1990-11-28 Procede pour preparer des circuits integres supraconducteurs. Expired - Fee Related FR2661557B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900005997A KR930004024B1 (ko) 1990-04-27 1990-04-27 초전도 집적회로소자의 제조방법

Publications (2)

Publication Number Publication Date
FR2661557A1 FR2661557A1 (fr) 1991-10-31
FR2661557B1 true FR2661557B1 (fr) 1995-10-13

Family

ID=19298462

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9014863A Expired - Fee Related FR2661557B1 (fr) 1990-04-27 1990-11-28 Procede pour preparer des circuits integres supraconducteurs.

Country Status (7)

Country Link
US (1) US5219830A (fr)
JP (1) JP2614942B2 (fr)
KR (1) KR930004024B1 (fr)
DE (1) DE4040053A1 (fr)
FR (1) FR2661557B1 (fr)
GB (1) GB2244882B (fr)
NL (1) NL9100725A (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05251777A (ja) * 1991-12-13 1993-09-28 Sumitomo Electric Ind Ltd 超電導電界効果型素子およびその作製方法
US7068618B2 (en) 2001-08-10 2006-06-27 Interdigital Technology Corp. Dynamic link adaption for time division duplex (TDD)

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3850580T2 (de) * 1987-01-30 1994-10-27 Hitachi Ltd Supraleiteranordnung.
JPH0638525B2 (ja) * 1987-05-06 1994-05-18 株式会社半導体エネルギ−研究所 超電導装置の作製方法
CA1328242C (fr) * 1987-05-18 1994-04-05 Nobuhiko Fujita Procede de fabrication d'un supraconducteur et methode de production d'un circuit supraconducteur
US5041420A (en) * 1987-06-26 1991-08-20 Hewlett-Packard Company Method for making superconductor films from organometallic precursors
DK160382C (da) * 1987-09-22 1991-08-12 Ib Johannsen Fremgangsmaade til tilvejebringelse af et elektrisk kredsloeb indeholdende josephson dioder
JP2707499B2 (ja) * 1987-11-26 1998-01-28 住友電気工業株式会社 酸化物超電導体の製造方法
JPH01160888A (ja) * 1987-12-15 1989-06-23 Mitsubishi Electric Corp ビームを用いた局部熱処理方法
NL8703039A (nl) * 1987-12-16 1989-07-17 Philips Nv Werkwijze voor het patroonmatig vervaardigen van een dunne laag uit een oxidisch supergeleidend materiaal.
US4939308A (en) * 1988-04-29 1990-07-03 Allied-Signal Inc. Method of forming crystallite-oriented superconducting ceramics by electrodeposition and thin film superconducting ceramic made thereby
JPH0354875A (ja) * 1989-07-24 1991-03-08 Furukawa Electric Co Ltd:The 超電導体回路の形成方法

Also Published As

Publication number Publication date
GB9108001D0 (en) 1991-06-05
GB2244882B (en) 1994-12-21
JP2614942B2 (ja) 1997-05-28
KR930004024B1 (ko) 1993-05-19
KR910019170A (ko) 1991-11-30
JPH04226089A (ja) 1992-08-14
FR2661557A1 (fr) 1991-10-31
US5219830A (en) 1993-06-15
GB2244882A (en) 1991-12-11
DE4040053A1 (de) 1991-10-31
NL9100725A (nl) 1991-11-18

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Legal Events

Date Code Title Description
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ST Notification of lapse