FR2549641B1 - Ensemble a integration a grande echelle comportant un substrat en ceramique multicouche - Google Patents
Ensemble a integration a grande echelle comportant un substrat en ceramique multicoucheInfo
- Publication number
- FR2549641B1 FR2549641B1 FR8411352A FR8411352A FR2549641B1 FR 2549641 B1 FR2549641 B1 FR 2549641B1 FR 8411352 A FR8411352 A FR 8411352A FR 8411352 A FR8411352 A FR 8411352A FR 2549641 B1 FR2549641 B1 FR 2549641B1
- Authority
- FR
- France
- Prior art keywords
- ceramic substrate
- multilayer ceramic
- scale integration
- integration assembly
- assembly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0286—Programmable, customizable or modifiable circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49004—Electrical device making including measuring or testing of device or component part
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58131422A JPS6022396A (ja) | 1983-07-19 | 1983-07-19 | 回路基板 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2549641A1 FR2549641A1 (fr) | 1985-01-25 |
| FR2549641B1 true FR2549641B1 (fr) | 1986-06-20 |
Family
ID=15057587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR8411352A Expired FR2549641B1 (fr) | 1983-07-19 | 1984-07-18 | Ensemble a integration a grande echelle comportant un substrat en ceramique multicouche |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4894708A (https=) |
| JP (1) | JPS6022396A (https=) |
| FR (1) | FR2549641B1 (https=) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6253000A (ja) * | 1985-08-31 | 1987-03-07 | 日本電気株式会社 | 半導体の実装構造 |
| JPS63245952A (ja) * | 1987-04-01 | 1988-10-13 | Hitachi Ltd | マルチチップモジュ−ル構造体 |
| JP2592308B2 (ja) * | 1988-09-30 | 1997-03-19 | 株式会社日立製作所 | 半導体パッケージ及びそれを用いたコンピュータ |
| US5288949A (en) * | 1992-02-03 | 1994-02-22 | Ncr Corporation | Connection system for integrated circuits which reduces cross-talk |
| US5264729A (en) * | 1992-07-29 | 1993-11-23 | Lsi Logic Corporation | Semiconductor package having programmable interconnect |
| US5410107A (en) * | 1993-03-01 | 1995-04-25 | The Board Of Trustees Of The University Of Arkansas | Multichip module |
| JP3330468B2 (ja) * | 1995-06-30 | 2002-09-30 | 富士通株式会社 | 配線基板及び半導体装置 |
| WO2000057477A1 (fr) * | 1999-03-23 | 2000-09-28 | Pyrchenkov Vladislav Nikolaevi | Module polycristallin et procede de fabrication d'un module semiconducteur |
| RU2140688C1 (ru) * | 1999-03-23 | 1999-10-27 | Пырченков Владислав Николаевич | Многокристальный модуль |
| US6323045B1 (en) | 1999-12-08 | 2001-11-27 | International Business Machines Corporation | Method and structure for top-to-bottom I/O nets repair in a thin film transfer and join process |
| JP2001168225A (ja) * | 1999-12-13 | 2001-06-22 | Seiko Epson Corp | 半導体チップのパッケージ |
| US20050149783A1 (en) * | 2003-12-11 | 2005-07-07 | International Business Machines Corporation | Methods and apparatus for testing an IC |
| CN116711182A (zh) | 2021-01-07 | 2023-09-05 | 松下知识产权经营株式会社 | 电力变换装置 |
| WO2022149525A1 (ja) | 2021-01-07 | 2022-07-14 | パナソニックIpマネジメント株式会社 | 電力変換装置 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5276680A (en) * | 1976-10-26 | 1977-06-28 | Fujitsu Ltd | Multiilayer printed board |
| FR2404990A1 (fr) * | 1977-10-03 | 1979-04-27 | Cii Honeywell Bull | Substrat d'interconnexion de composants electroniques a circuits integres, muni d'un dispositif de reparation |
| JPS552913A (en) * | 1978-06-23 | 1980-01-10 | Hitachi Ltd | Device to test composite equivalence of circuit breaker |
| US4221047A (en) * | 1979-03-23 | 1980-09-09 | International Business Machines Corporation | Multilayered glass-ceramic substrate for mounting of semiconductor device |
| US4245273A (en) * | 1979-06-29 | 1981-01-13 | International Business Machines Corporation | Package for mounting and interconnecting a plurality of large scale integrated semiconductor devices |
| DE2935428A1 (de) * | 1979-09-01 | 1981-03-26 | Henkel KGaA, 40589 Düsseldorf | Waessrige tensidkonzentrate und verfahren zur verbesserung des fliessverhaltens schwer beweglicher waessriger tensidkonzentrate |
| US4407007A (en) * | 1981-05-28 | 1983-09-27 | International Business Machines Corporation | Process and structure for minimizing delamination in the fabrication of multi-layer ceramic substrate |
-
1983
- 1983-07-19 JP JP58131422A patent/JPS6022396A/ja active Granted
-
1984
- 1984-07-12 US US06/630,266 patent/US4894708A/en not_active Expired - Lifetime
- 1984-07-18 FR FR8411352A patent/FR2549641B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6022396A (ja) | 1985-02-04 |
| JPH029472B2 (https=) | 1990-03-02 |
| FR2549641A1 (fr) | 1985-01-25 |
| US4894708A (en) | 1990-01-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |