FR2449973A1 - Structure de circuit integre formant cellule de memoire cmos/sos contenant des diodes - Google Patents
Structure de circuit integre formant cellule de memoire cmos/sos contenant des diodesInfo
- Publication number
- FR2449973A1 FR2449973A1 FR8004080A FR8004080A FR2449973A1 FR 2449973 A1 FR2449973 A1 FR 2449973A1 FR 8004080 A FR8004080 A FR 8004080A FR 8004080 A FR8004080 A FR 8004080A FR 2449973 A1 FR2449973 A1 FR 2449973A1
- Authority
- FR
- France
- Prior art keywords
- igfets
- silicon
- integrated circuit
- insulating substrate
- inverter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title abstract 4
- 239000000758 substrate Substances 0.000 title abstract 2
- 229920005591 polysilicon Polymers 0.000 abstract 3
- 230000015572 biosynthetic process Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Thin Film Transistor (AREA)
Abstract
LA PRESENTE INVENTION CONCERNE UNE STRUCTURE DE CIRCUIT INTEGRE FORMANT UNE CELLULE DE MEMOIRE, UTILISANT DES TRANSISTORS A EFFET DE CHAMP A PORTE ISOLEE CMOS DANS LA TECHNOLOGIE SILICIUM SUR SAPHIR EMPLOYANT DES INTERCONNEXIONS EN SILICIUM POLYCRISTALLIN DOPEES AVEC DES CONTACTS ENFOUIS. DES DIODES 22, 24 SONT FORMEES OU LE SILICIUM EPITAXIE ET DOPE DU TYPE N RENCONTRE LE SILICIUM EPITAXIE ET DOPE DU TYPE P ET OU UNE INTERCONNEXION EN SILICIUM POLYCRISTALLIN DOPEE DU TYPE N RENCONTRE UNE INTERCONNEXION EN SILICIUM POLYCRISTALLIN DOPEE DU TYPE P. LA PRESENCE DE CES DIODES N'AFFECTE PAS LE FONCTIONNEMENT DE LA CELLULE. L'INVENTION S'APPLIQUE NOTAMMENT A LA FORMATION DE MEMOIRES.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US1520379A | 1979-02-26 | 1979-02-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2449973A1 true FR2449973A1 (fr) | 1980-09-19 |
FR2449973B1 FR2449973B1 (fr) | 1984-10-19 |
Family
ID=21770084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8004080A Granted FR2449973A1 (fr) | 1979-02-26 | 1980-02-25 | Structure de circuit integre formant cellule de memoire cmos/sos contenant des diodes |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS55117266A (fr) |
DE (1) | DE3006442A1 (fr) |
FR (1) | FR2449973A1 (fr) |
IT (1) | IT1141377B (fr) |
SE (1) | SE444484B (fr) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0081208A2 (fr) * | 1981-12-03 | 1983-06-15 | Siemens Aktiengesellschaft | Cellule de mémoire statique |
EP0192093A1 (fr) * | 1985-01-30 | 1986-08-27 | Kabushiki Kaisha Toshiba | Dispositif semi-conducteur et procédé pour sa fabrication |
EP0575188A1 (fr) * | 1992-06-17 | 1993-12-22 | Aptix Corporation | Cellule de mémoire de haute tension à accès aléatoire incorporant circuit de décalage de niveau |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5678157A (en) * | 1979-11-29 | 1981-06-26 | Toshiba Corp | Semiconductor device |
JPS59130459A (ja) * | 1983-01-17 | 1984-07-27 | Hitachi Ltd | 半導体メモリ集積回路装置 |
JPH065714B2 (ja) * | 1983-07-26 | 1994-01-19 | 日本電気株式会社 | 半導体メモリセル |
US4805148A (en) * | 1985-11-22 | 1989-02-14 | Diehl Nagle Sherra E | High impendance-coupled CMOS SRAM for improved single event immunity |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1054714A (fr) * | 1974-10-09 | 1979-05-15 | James A. Luisi | Cellule de memoire rapide |
-
1980
- 1980-02-15 SE SE8001225A patent/SE444484B/sv not_active IP Right Cessation
- 1980-02-21 JP JP2149980A patent/JPS55117266A/ja active Granted
- 1980-02-21 DE DE19803006442 patent/DE3006442A1/de active Granted
- 1980-02-22 IT IT20130/80A patent/IT1141377B/it active
- 1980-02-25 FR FR8004080A patent/FR2449973A1/fr active Granted
Non-Patent Citations (1)
Title |
---|
EXBK/78 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0081208A2 (fr) * | 1981-12-03 | 1983-06-15 | Siemens Aktiengesellschaft | Cellule de mémoire statique |
EP0081208A3 (en) * | 1981-12-03 | 1985-05-29 | Siemens Aktiengesellschaft | Static memory cell |
EP0192093A1 (fr) * | 1985-01-30 | 1986-08-27 | Kabushiki Kaisha Toshiba | Dispositif semi-conducteur et procédé pour sa fabrication |
US4907059A (en) * | 1985-01-30 | 1990-03-06 | Kabushiki Kaisha Toshiba | Semiconductor bipolar-CMOS inverter |
EP0575188A1 (fr) * | 1992-06-17 | 1993-12-22 | Aptix Corporation | Cellule de mémoire de haute tension à accès aléatoire incorporant circuit de décalage de niveau |
Also Published As
Publication number | Publication date |
---|---|
SE444484B (sv) | 1986-04-14 |
IT8020130A0 (it) | 1980-02-22 |
JPS55117266A (en) | 1980-09-09 |
DE3006442C2 (fr) | 1990-06-07 |
IT1141377B (it) | 1986-10-01 |
SE8001225L (sv) | 1980-08-27 |
JPH0117264B2 (fr) | 1989-03-29 |
FR2449973B1 (fr) | 1984-10-19 |
DE3006442A1 (de) | 1980-09-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |