JPS5650558A - Complementary mos integrated circuit - Google Patents
Complementary mos integrated circuitInfo
- Publication number
- JPS5650558A JPS5650558A JP12652179A JP12652179A JPS5650558A JP S5650558 A JPS5650558 A JP S5650558A JP 12652179 A JP12652179 A JP 12652179A JP 12652179 A JP12652179 A JP 12652179A JP S5650558 A JPS5650558 A JP S5650558A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- reduced
- type
- cmos
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000000295 complement effect Effects 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 4
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 230000003068 static effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To improve the integrity of a CMOS-IC by forming a V-shaped groove on the junction surface between a substrate and a well and applying said technique to the isolation between elements. CONSTITUTION:A substrate is cut with a V shape in the vicinity of the junction surface between an N<-> type substrate 1 and a P<-> type well 10 becoming a P channel substrate, thereby removing the portion where a depletion layer may become broadended easily due to low density caused by the lateral expansion of diffusion, and the depletion layer is erased horizontally with each other. Accordingly, contact of the depletion hardly occur with a result that the minimum interval W becomes reduced between the P<+> type layer 11 and N channel side N<+> type layer 14 of P channel side. When the static memory cell of CMOS is applied with this, the distance between the P<-> and N<-> can be reduced from 16 to 6mum, and the isolating distance between the transistors can be reduced from 5 to 3mum.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12652179A JPS5650558A (en) | 1979-10-01 | 1979-10-01 | Complementary mos integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12652179A JPS5650558A (en) | 1979-10-01 | 1979-10-01 | Complementary mos integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5650558A true JPS5650558A (en) | 1981-05-07 |
JPS6253952B2 JPS6253952B2 (en) | 1987-11-12 |
Family
ID=14937257
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12652179A Granted JPS5650558A (en) | 1979-10-01 | 1979-10-01 | Complementary mos integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5650558A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61501736A (en) * | 1984-03-29 | 1986-08-14 | ヒユ−ズ・エアクラフト・カンパニ− | Latch-up resistant CMOS structure for VLSI |
US6780713B2 (en) | 2001-06-29 | 2004-08-24 | Atmel Germany Gmbh | Process for manufacturing a DMOS transistor |
US6806131B2 (en) | 2001-06-29 | 2004-10-19 | Atmel Germany Gmbh | Process for manufacturing a DMOS transistor |
US6878603B2 (en) | 2001-06-29 | 2005-04-12 | Atmel Germany Gmbh | Process for manufacturing a DMOS transistor |
US6933215B2 (en) | 2001-06-29 | 2005-08-23 | Atmel Germany Gmbh | Process for doping a semiconductor body |
US7064385B2 (en) | 2003-09-19 | 2006-06-20 | Atmel Germany Gmbh | DMOS-transistor with lateral dopant gradient in drift region and method of producing the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50151080A (en) * | 1974-05-23 | 1975-12-04 | ||
JPS53147469A (en) * | 1977-05-27 | 1978-12-22 | Nippon Telegr & Teleph Corp <Ntt> | Vertical field effect transistor and production of the same |
-
1979
- 1979-10-01 JP JP12652179A patent/JPS5650558A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50151080A (en) * | 1974-05-23 | 1975-12-04 | ||
JPS53147469A (en) * | 1977-05-27 | 1978-12-22 | Nippon Telegr & Teleph Corp <Ntt> | Vertical field effect transistor and production of the same |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61501736A (en) * | 1984-03-29 | 1986-08-14 | ヒユ−ズ・エアクラフト・カンパニ− | Latch-up resistant CMOS structure for VLSI |
US6780713B2 (en) | 2001-06-29 | 2004-08-24 | Atmel Germany Gmbh | Process for manufacturing a DMOS transistor |
US6806131B2 (en) | 2001-06-29 | 2004-10-19 | Atmel Germany Gmbh | Process for manufacturing a DMOS transistor |
US6878603B2 (en) | 2001-06-29 | 2005-04-12 | Atmel Germany Gmbh | Process for manufacturing a DMOS transistor |
US6933215B2 (en) | 2001-06-29 | 2005-08-23 | Atmel Germany Gmbh | Process for doping a semiconductor body |
US7064385B2 (en) | 2003-09-19 | 2006-06-20 | Atmel Germany Gmbh | DMOS-transistor with lateral dopant gradient in drift region and method of producing the same |
Also Published As
Publication number | Publication date |
---|---|
JPS6253952B2 (en) | 1987-11-12 |
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