JPS56114381A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56114381A
JPS56114381A JP1752080A JP1752080A JPS56114381A JP S56114381 A JPS56114381 A JP S56114381A JP 1752080 A JP1752080 A JP 1752080A JP 1752080 A JP1752080 A JP 1752080A JP S56114381 A JPS56114381 A JP S56114381A
Authority
JP
Japan
Prior art keywords
regions
layer
polarities
junction
constructed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1752080A
Other languages
Japanese (ja)
Inventor
Shigeru Komatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1752080A priority Critical patent/JPS56114381A/en
Priority to GB8102334A priority patent/GB2069756B/en
Priority to DE19813104192 priority patent/DE3104192A1/en
Publication of JPS56114381A publication Critical patent/JPS56114381A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/764Air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283Lateral isolation by refilling of trenches with dielectric material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76289Lateral isolation by air gap
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To give the device a forward characteristic with respect to both polarities and improve an integration degree by a method wherein the device is constructed in such that a P-N junction is formed between regions adjacent to each other, and regions located in diagonal direction are insulation-separated by an isolation region formed between the regions. CONSTITUTION:A polycrystalline Si layer 12 is selectively formed on an insulating layer 11. The layer 12 is constructed by P type regions 12a, 12b and N type regions 12c, 12d which are formed by, for example, an ion injecting method. The isolation region 13 is formed between the regions 12a, 12b and 12c, 12d. In the thus formed regions 12a, 12b and 12c, 12d, the junction is formed between the regions adjacent to each other and the regions located in diagonal direction are separated from each other by the region 13. Whereby the device is provided with the forward characteristic with respect to the both polarities and the integration can be improved.
JP1752080A 1980-02-15 1980-02-15 Semiconductor device Pending JPS56114381A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP1752080A JPS56114381A (en) 1980-02-15 1980-02-15 Semiconductor device
GB8102334A GB2069756B (en) 1980-02-15 1981-01-26 Arrangement of diodes integrated on an insulating substrate
DE19813104192 DE3104192A1 (en) 1980-02-15 1981-02-06 SEMICONDUCTOR DEVICE

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1752080A JPS56114381A (en) 1980-02-15 1980-02-15 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS56114381A true JPS56114381A (en) 1981-09-08

Family

ID=11946223

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1752080A Pending JPS56114381A (en) 1980-02-15 1980-02-15 Semiconductor device

Country Status (3)

Country Link
JP (1) JPS56114381A (en)
DE (1) DE3104192A1 (en)
GB (1) GB2069756B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5879746A (en) * 1981-11-05 1983-05-13 Nec Corp Semiconductor integrated circuit
JPS63226075A (en) * 1986-10-08 1988-09-20 Nippon Denso Co Ltd Semiconductor device and manufacture thereof
JPH0750303A (en) * 1994-04-15 1995-02-21 Nippondenso Co Ltd Manufacture of semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077595A (en) * 1990-01-25 1991-12-31 Mitsubishi Denki Kabushiki Kaisha Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51118378A (en) * 1975-04-10 1976-10-18 Matsushita Electric Ind Co Ltd Semiconductor unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51118378A (en) * 1975-04-10 1976-10-18 Matsushita Electric Ind Co Ltd Semiconductor unit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5879746A (en) * 1981-11-05 1983-05-13 Nec Corp Semiconductor integrated circuit
JPS63226075A (en) * 1986-10-08 1988-09-20 Nippon Denso Co Ltd Semiconductor device and manufacture thereof
JPH0750303A (en) * 1994-04-15 1995-02-21 Nippondenso Co Ltd Manufacture of semiconductor device

Also Published As

Publication number Publication date
DE3104192C2 (en) 1987-01-29
GB2069756B (en) 1984-10-10
DE3104192A1 (en) 1981-12-10
GB2069756A (en) 1981-08-26

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