JPS57120371A - Manufacture of complementary type mos semiconductor - Google Patents

Manufacture of complementary type mos semiconductor

Info

Publication number
JPS57120371A
JPS57120371A JP56007070A JP707081A JPS57120371A JP S57120371 A JPS57120371 A JP S57120371A JP 56007070 A JP56007070 A JP 56007070A JP 707081 A JP707081 A JP 707081A JP S57120371 A JPS57120371 A JP S57120371A
Authority
JP
Japan
Prior art keywords
region
mosfet
regions
drain
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56007070A
Other languages
Japanese (ja)
Inventor
Hiroyuki Oyabu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP56007070A priority Critical patent/JPS57120371A/en
Publication of JPS57120371A publication Critical patent/JPS57120371A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS

Abstract

PURPOSE:To permit MOSFET to form in a high withstand voltage by forming at the same time a source, a drain and a well region of the MOSFET to be formed in a substrate region. CONSTITUTION:On a main face of N type semiconductor substrate 11 are formed a P type well region 12 and a source region 13 and a drain region 14 of the first MOSFET through an ion implantation. Subsequently, a source contact region 17 and drain contact region 18 and guard region 19 are formed in the regions 13, 14 and region 12 respectively. subsequently, an N type source and drain regions 21, 22 of a second MOSFET are formed on the surface of the substrate 11 and an N type guard region 23 is formed ont the surface of the substrate 11. subsequently, a gate oxide film 26 is formed on a channel region 24 between the regions 13 and 14 and on a channel region 25 between the regions 21 and 22, thereafter gate electrodes 27, 28 are provided in the foregoing channel regions 24, 25 respectively. In C-MOSFET manufactured by the foregoing method, since the regions 13, 14 of the first MOSFET are formed at the same as the depth of the region 12, a bonding curvature becomes great and accordingly the MOSFET can be formed in a high withstand voltage.
JP56007070A 1981-01-19 1981-01-19 Manufacture of complementary type mos semiconductor Pending JPS57120371A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56007070A JPS57120371A (en) 1981-01-19 1981-01-19 Manufacture of complementary type mos semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56007070A JPS57120371A (en) 1981-01-19 1981-01-19 Manufacture of complementary type mos semiconductor

Publications (1)

Publication Number Publication Date
JPS57120371A true JPS57120371A (en) 1982-07-27

Family

ID=11655810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56007070A Pending JPS57120371A (en) 1981-01-19 1981-01-19 Manufacture of complementary type mos semiconductor

Country Status (1)

Country Link
JP (1) JPS57120371A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61140164A (en) * 1984-12-12 1986-06-27 Fuji Electric Co Ltd Manufacture of semiconductor ic
JP2007059932A (en) * 2006-10-11 2007-03-08 Renesas Technology Corp Semiconductor memory device and manufacturing method thereof
JP2008166788A (en) * 2006-12-29 2008-07-17 Dongbu Hitek Co Ltd Dmos device and method for manufacturing same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4857587A (en) * 1971-11-18 1973-08-13

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4857587A (en) * 1971-11-18 1973-08-13

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61140164A (en) * 1984-12-12 1986-06-27 Fuji Electric Co Ltd Manufacture of semiconductor ic
JPH0369184B2 (en) * 1984-12-12 1991-10-31 Fuji Electric Co Ltd
JP2007059932A (en) * 2006-10-11 2007-03-08 Renesas Technology Corp Semiconductor memory device and manufacturing method thereof
JP2008166788A (en) * 2006-12-29 2008-07-17 Dongbu Hitek Co Ltd Dmos device and method for manufacturing same

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