JPS5617073A - Manufacture of semiconductor integrated circuit - Google Patents

Manufacture of semiconductor integrated circuit

Info

Publication number
JPS5617073A
JPS5617073A JP9308879A JP9308879A JPS5617073A JP S5617073 A JPS5617073 A JP S5617073A JP 9308879 A JP9308879 A JP 9308879A JP 9308879 A JP9308879 A JP 9308879A JP S5617073 A JPS5617073 A JP S5617073A
Authority
JP
Japan
Prior art keywords
type
diffused
forming
integrated circuit
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9308879A
Other languages
Japanese (ja)
Inventor
Isamu Kawanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP9308879A priority Critical patent/JPS5617073A/en
Publication of JPS5617073A publication Critical patent/JPS5617073A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce a through type current, junction leakage current and drain capacity of the semiconductor integrated circuit by implanting O2 ion to the drain, source and isolation portion of an MOS transistor forming an inverter of an oscillator circuit and forming a selective oxide films and shallow diffused layer. CONSTITUTION:A P<->-type region is diffused in an N<->-type semiconductor substrate, and when forming P-channel and N-channel transistors 9 upon formation of shallow N<+>-type diffused regions in the P<->-type region and in the substrate surface layer isolated from the P<->-type region, they are formed by an O2<+> ion implantation. Oxide films 8a, 8b becoming channel stoppers disposed between the regions are simultaneously formed by the O2 ion implantation. In this manner, two transistors can be simultaneously conducted to reduce the through type current to be adapted for an IC for a watch.
JP9308879A 1979-07-20 1979-07-20 Manufacture of semiconductor integrated circuit Pending JPS5617073A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9308879A JPS5617073A (en) 1979-07-20 1979-07-20 Manufacture of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9308879A JPS5617073A (en) 1979-07-20 1979-07-20 Manufacture of semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5617073A true JPS5617073A (en) 1981-02-18

Family

ID=14072763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9308879A Pending JPS5617073A (en) 1979-07-20 1979-07-20 Manufacture of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5617073A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05344898A (en) * 1982-03-16 1993-12-27 Rhone Poulenc Inc Production of useful substance by microbial cells immobilized to polyazetidine polymer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05344898A (en) * 1982-03-16 1993-12-27 Rhone Poulenc Inc Production of useful substance by microbial cells immobilized to polyazetidine polymer

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