FR2449973A1 - Structure de circuit integre formant cellule de memoire cmos/sos contenant des diodes - Google Patents

Structure de circuit integre formant cellule de memoire cmos/sos contenant des diodes

Info

Publication number
FR2449973A1
FR2449973A1 FR8004080A FR8004080A FR2449973A1 FR 2449973 A1 FR2449973 A1 FR 2449973A1 FR 8004080 A FR8004080 A FR 8004080A FR 8004080 A FR8004080 A FR 8004080A FR 2449973 A1 FR2449973 A1 FR 2449973A1
Authority
FR
France
Prior art keywords
silicon
integrated circuit
igfets
buried contacts
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8004080A
Other languages
English (en)
French (fr)
Other versions
FR2449973B1 (en, 2012
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of FR2449973A1 publication Critical patent/FR2449973A1/fr
Application granted granted Critical
Publication of FR2449973B1 publication Critical patent/FR2449973B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
FR8004080A 1979-02-26 1980-02-25 Structure de circuit integre formant cellule de memoire cmos/sos contenant des diodes Granted FR2449973A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1520379A 1979-02-26 1979-02-26

Publications (2)

Publication Number Publication Date
FR2449973A1 true FR2449973A1 (fr) 1980-09-19
FR2449973B1 FR2449973B1 (en, 2012) 1984-10-19

Family

ID=21770084

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8004080A Granted FR2449973A1 (fr) 1979-02-26 1980-02-25 Structure de circuit integre formant cellule de memoire cmos/sos contenant des diodes

Country Status (5)

Country Link
JP (1) JPS55117266A (en, 2012)
DE (1) DE3006442A1 (en, 2012)
FR (1) FR2449973A1 (en, 2012)
IT (1) IT1141377B (en, 2012)
SE (1) SE444484B (en, 2012)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0081208A3 (en) * 1981-12-03 1985-05-29 Siemens Aktiengesellschaft Static memory cell
EP0192093A1 (en) * 1985-01-30 1986-08-27 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
EP0575188A1 (en) * 1992-06-17 1993-12-22 Aptix Corporation High voltage random-access memory cell incorporating level shifter

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5678157A (en) * 1979-11-29 1981-06-26 Toshiba Corp Semiconductor device
JPS59130459A (ja) * 1983-01-17 1984-07-27 Hitachi Ltd 半導体メモリ集積回路装置
JPH065714B2 (ja) * 1983-07-26 1994-01-19 日本電気株式会社 半導体メモリセル
US4805148A (en) * 1985-11-22 1989-02-14 Diehl Nagle Sherra E High impendance-coupled CMOS SRAM for improved single event immunity

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1054714A (en) * 1974-10-09 1979-05-15 James A. Luisi High speed memory cell

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/78 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0081208A3 (en) * 1981-12-03 1985-05-29 Siemens Aktiengesellschaft Static memory cell
EP0192093A1 (en) * 1985-01-30 1986-08-27 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US4907059A (en) * 1985-01-30 1990-03-06 Kabushiki Kaisha Toshiba Semiconductor bipolar-CMOS inverter
EP0575188A1 (en) * 1992-06-17 1993-12-22 Aptix Corporation High voltage random-access memory cell incorporating level shifter

Also Published As

Publication number Publication date
JPH0117264B2 (en, 2012) 1989-03-29
SE444484B (sv) 1986-04-14
FR2449973B1 (en, 2012) 1984-10-19
JPS55117266A (en) 1980-09-09
SE8001225L (sv) 1980-08-27
IT1141377B (it) 1986-10-01
IT8020130A0 (it) 1980-02-22
DE3006442A1 (de) 1980-09-04
DE3006442C2 (en, 2012) 1990-06-07

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Legal Events

Date Code Title Description
ST Notification of lapse