JPH0117264B2 - - Google Patents
Info
- Publication number
- JPH0117264B2 JPH0117264B2 JP55021499A JP2149980A JPH0117264B2 JP H0117264 B2 JPH0117264 B2 JP H0117264B2 JP 55021499 A JP55021499 A JP 55021499A JP 2149980 A JP2149980 A JP 2149980A JP H0117264 B2 JPH0117264 B2 JP H0117264B2
- Authority
- JP
- Japan
- Prior art keywords
- channel
- field effect
- polycrystalline silicon
- effect transistor
- insulated gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US1520379A | 1979-02-26 | 1979-02-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55117266A JPS55117266A (en) | 1980-09-09 |
| JPH0117264B2 true JPH0117264B2 (en, 2012) | 1989-03-29 |
Family
ID=21770084
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2149980A Granted JPS55117266A (en) | 1979-02-26 | 1980-02-21 | Integrated circuit structure |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS55117266A (en, 2012) |
| DE (1) | DE3006442A1 (en, 2012) |
| FR (1) | FR2449973A1 (en, 2012) |
| IT (1) | IT1141377B (en, 2012) |
| SE (1) | SE444484B (en, 2012) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5678157A (en) * | 1979-11-29 | 1981-06-26 | Toshiba Corp | Semiconductor device |
| DE3147951A1 (de) * | 1981-12-03 | 1983-06-16 | Siemens AG, 1000 Berlin und 8000 München | Statische speicherzelle |
| JPS59130459A (ja) * | 1983-01-17 | 1984-07-27 | Hitachi Ltd | 半導体メモリ集積回路装置 |
| JPH065714B2 (ja) * | 1983-07-26 | 1994-01-19 | 日本電気株式会社 | 半導体メモリセル |
| EP0349021B1 (en) * | 1985-01-30 | 1994-12-28 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
| US4805148A (en) * | 1985-11-22 | 1989-02-14 | Diehl Nagle Sherra E | High impendance-coupled CMOS SRAM for improved single event immunity |
| US5239503A (en) * | 1992-06-17 | 1993-08-24 | Aptix Corporation | High voltage random-access memory cell incorporating level shifter |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1054714A (en) * | 1974-10-09 | 1979-05-15 | James A. Luisi | High speed memory cell |
-
1980
- 1980-02-15 SE SE8001225A patent/SE444484B/sv not_active IP Right Cessation
- 1980-02-21 JP JP2149980A patent/JPS55117266A/ja active Granted
- 1980-02-21 DE DE19803006442 patent/DE3006442A1/de active Granted
- 1980-02-22 IT IT20130/80A patent/IT1141377B/it active
- 1980-02-25 FR FR8004080A patent/FR2449973A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| SE444484B (sv) | 1986-04-14 |
| FR2449973B1 (en, 2012) | 1984-10-19 |
| JPS55117266A (en) | 1980-09-09 |
| FR2449973A1 (fr) | 1980-09-19 |
| SE8001225L (sv) | 1980-08-27 |
| IT1141377B (it) | 1986-10-01 |
| IT8020130A0 (it) | 1980-02-22 |
| DE3006442A1 (de) | 1980-09-04 |
| DE3006442C2 (en, 2012) | 1990-06-07 |
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