FI121774B - Monikerroksinen levy ja menetelmä sen valmistamiseksi - Google Patents

Monikerroksinen levy ja menetelmä sen valmistamiseksi Download PDF

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Publication number
FI121774B
FI121774B FI20050815A FI20050815A FI121774B FI 121774 B FI121774 B FI 121774B FI 20050815 A FI20050815 A FI 20050815A FI 20050815 A FI20050815 A FI 20050815A FI 121774 B FI121774 B FI 121774B
Authority
FI
Finland
Prior art keywords
layer
base material
inner layer
circuit
layers
Prior art date
Application number
FI20050815A
Other languages
English (en)
Finnish (fi)
Swedish (sv)
Other versions
FI20050815A (fi
Inventor
Osamu Nakano
Reiji Higuchi
Syouji Ito
Masahiro Okamoto
Original Assignee
Fujikura Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujikura Ltd filed Critical Fujikura Ltd
Publication of FI20050815A publication Critical patent/FI20050815A/fi
Application granted granted Critical
Publication of FI121774B publication Critical patent/FI121774B/fi

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0397—Tab
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969—Apertured conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
FI20050815A 2003-02-13 2005-08-12 Monikerroksinen levy ja menetelmä sen valmistamiseksi FI121774B (fi)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2003035330 2003-02-13
JP2003035330 2003-02-13
JP2004001544 2004-02-13
PCT/JP2004/001544 WO2004073370A1 (ja) 2003-02-13 2004-02-13 多層基板およびその製造方法

Publications (2)

Publication Number Publication Date
FI20050815A FI20050815A (fi) 2005-08-12
FI121774B true FI121774B (fi) 2011-03-31

Family

ID=32866292

Family Applications (2)

Application Number Title Priority Date Filing Date
FI20050815A FI121774B (fi) 2003-02-13 2005-08-12 Monikerroksinen levy ja menetelmä sen valmistamiseksi
FI20115084A FI126775B (fi) 2003-02-13 2011-01-27 Monikerroksinen levy ja menetelmä sen valmistamiseksi

Family Applications After (1)

Application Number Title Priority Date Filing Date
FI20115084A FI126775B (fi) 2003-02-13 2011-01-27 Monikerroksinen levy ja menetelmä sen valmistamiseksi

Country Status (7)

Country Link
US (2) US7421779B2 (zh)
JP (2) JP4110170B2 (zh)
KR (1) KR100751470B1 (zh)
CN (2) CN1751547B (zh)
FI (2) FI121774B (zh)
TW (1) TW200420203A (zh)
WO (1) WO2004073370A1 (zh)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
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TWI298608B (en) * 2006-05-19 2008-07-01 Foxconn Advanced Tech Inc Method for manufacturing stack via of hdi printed circuit board
JP4816442B2 (ja) * 2006-12-25 2011-11-16 日立電線株式会社 半導体装置実装パッケージ用多層配線板の製造方法
US7892441B2 (en) * 2007-06-01 2011-02-22 General Dynamics Advanced Information Systems, Inc. Method and apparatus to change solder pad size using a differential pad plating
JP5359939B2 (ja) * 2010-03-08 2013-12-04 株式会社デンソー 樹脂フィルムおよびそれを用いた多層回路基板とその製造方法
KR20110113980A (ko) * 2010-04-12 2011-10-19 삼성전자주식회사 필름을 포함한 다층 인쇄회로기판 및 그 제조 방법
JP2013038231A (ja) * 2011-08-08 2013-02-21 Fujikura Ltd 配線基板およびその製造方法
WO2014188945A1 (ja) * 2013-05-22 2014-11-27 三菱製紙株式会社 配線基板の製造方法
US9699921B2 (en) 2014-08-01 2017-07-04 Fujikura Ltd. Multi-layer wiring board
CN106658959A (zh) * 2015-10-28 2017-05-10 富葵精密组件(深圳)有限公司 柔性电路板及其制作方法
WO2018034161A1 (ja) * 2016-08-18 2018-02-22 株式会社村田製作所 積層コイルおよびその製造方法
JP6819268B2 (ja) * 2016-12-15 2021-01-27 凸版印刷株式会社 配線基板、多層配線基板、及び配線基板の製造方法
JP7066528B2 (ja) * 2018-05-31 2022-05-13 日東電工株式会社 配線回路基板、その製造方法および配線回路シート
CN114080088B (zh) * 2020-08-10 2024-05-31 鹏鼎控股(深圳)股份有限公司 电路板及其制备方法
US11950378B2 (en) * 2021-08-13 2024-04-02 Harbor Electronics, Inc. Via bond attachment
KR20240028734A (ko) 2022-08-25 2024-03-05 (주)엘엑스하우시스 손 끼임 방지 및 창틀 정렬용 장치를 적용한 스윙도어
KR20240028960A (ko) 2022-08-25 2024-03-05 (주)엘엑스하우시스 스윙 제어 장치를 포함하는 스윙도어

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US4935584A (en) * 1988-05-24 1990-06-19 Tektronix, Inc. Method of fabricating a printed circuit board and the PCB produced
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JP3197213B2 (ja) * 1996-05-29 2001-08-13 松下電器産業株式会社 プリント配線板およびその製造方法
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JPH11298105A (ja) * 1998-04-07 1999-10-29 Asahi Chem Ind Co Ltd ビアホール充填型プリント基板およびその製造方法
JP3656484B2 (ja) * 1999-03-03 2005-06-08 株式会社村田製作所 セラミック多層基板の製造方法
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JP2001127389A (ja) * 1999-11-01 2001-05-11 Matsushita Electric Ind Co Ltd 回路基板用絶縁材と回路基板および回路基板の製造方法
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JP2002261444A (ja) * 2001-03-06 2002-09-13 Sony Corp 積層配線基板およびその製造方法
JP2002353621A (ja) 2001-03-23 2002-12-06 Fujikura Ltd 多層配線板、多層配線用基材及びその製造方法
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JP4487448B2 (ja) * 2001-06-25 2010-06-23 日立化成工業株式会社 配線回路付き樹脂材料及びそれらの製造方法と多層プリント配線板
JP4037697B2 (ja) * 2002-06-19 2008-01-23 イビデン株式会社 多層化回路基板およびその製造方法

Also Published As

Publication number Publication date
WO2004073370A1 (ja) 2004-08-26
CN101562953B (zh) 2011-12-07
FI126775B (fi) 2017-05-15
CN101562953A (zh) 2009-10-21
FI20115084A (fi) 2011-01-27
US20060191133A1 (en) 2006-08-31
JP4538486B2 (ja) 2010-09-08
KR100751470B1 (ko) 2007-08-23
KR20050095893A (ko) 2005-10-04
JP4110170B2 (ja) 2008-07-02
US8726495B2 (en) 2014-05-20
TWI329474B (zh) 2010-08-21
CN1751547B (zh) 2011-11-16
US7421779B2 (en) 2008-09-09
US20080250634A1 (en) 2008-10-16
JP2008060609A (ja) 2008-03-13
FI20050815A (fi) 2005-08-12
CN1751547A (zh) 2006-03-22
JPWO2004073370A1 (ja) 2006-06-01
TW200420203A (en) 2004-10-01

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