FI111197B - Multichip-modul - Google Patents

Multichip-modul Download PDF

Info

Publication number
FI111197B
FI111197B FI20001654A FI20001654A FI111197B FI 111197 B FI111197 B FI 111197B FI 20001654 A FI20001654 A FI 20001654A FI 20001654 A FI20001654 A FI 20001654A FI 111197 B FI111197 B FI 111197B
Authority
FI
Finland
Prior art keywords
substrate
components
multichip module
module according
module
Prior art date
Application number
FI20001654A
Other languages
English (en)
Finnish (fi)
Other versions
FI20001654A0 (sv
FI20001654A (sv
Inventor
Pekka Laukkala
Original Assignee
Nokia Oyj
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Oyj filed Critical Nokia Oyj
Priority to FI20001654A priority Critical patent/FI111197B/sv
Publication of FI20001654A0 publication Critical patent/FI20001654A0/sv
Priority to PCT/FI2001/000657 priority patent/WO2002005603A1/en
Priority to AU2001284066A priority patent/AU2001284066A1/en
Publication of FI20001654A publication Critical patent/FI20001654A/sv
Application granted granted Critical
Publication of FI111197B publication Critical patent/FI111197B/sv

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Claims (5)

1. Multichip-modul, omfattande ett substrat (1, 11) bestyckat med komponenter (2a - 2f), och vilken modul är försedd med fogdelar med vilka den kopplas till 5 kopplingsunderlaget, vilket substrat (1,11) är väsentligen folielikt och böjligt, vilka komponenter (2a - 2f) är anslutna till substratets (1,11) bada sidor och ' 10 vilket substrat (1, 11) pa bada sidor är försett med fyllmedelsskikt (4, 5) som avstyvar konstruktionen, kännetecknad av, att substratet (1,11) nar utanför fyllmedelsskiktet och är böjt 15 mot en av fyllmedelsskiktets ytterytor sä att det bildar modulens elektriska anslutningsdelar (7a, 7b, 12a, 12b).
2. Multichipmodul enligt patentkravet 1, kännetecknad av, att komponentema (2a - 2c) i det översta lagret är anordnade med sin ovanyta i samma plan och att 20 ovanpa dem är anordnad en kylkomponent som innehaller en skivformig del (6).
3. Multichipmodul enligt patentkravet 1, kännetecknad av, att substratet (11) är böjt sä att det bildar en väsentligen sluten konstruktion, varvid inne i den slutna konstruktionen bildas ett elektriskt och magnetiskt avskärmat utrymme. 25
4. Multichipmodul enligt patentkravet 1, kännetecknad av, att fyllmedelsskikten (4,5) är av gjutplast.
5. Multichipmodul enligt patentkravet 1, kännetecknad av, att fyllmedelsskikten 30 tillsammans med komponentema (2a - 2f) bildar en ladformig konstruktion.
FI20001654A 2000-07-12 2000-07-12 Multichip-modul FI111197B (sv)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FI20001654A FI111197B (sv) 2000-07-12 2000-07-12 Multichip-modul
PCT/FI2001/000657 WO2002005603A1 (en) 2000-07-12 2001-07-10 Multichip module connected to flexible, film-like substrate
AU2001284066A AU2001284066A1 (en) 2000-07-12 2001-07-10 Multichip module connected to flexible, film-like substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20001654A FI111197B (sv) 2000-07-12 2000-07-12 Multichip-modul
FI20001654 2000-07-12

Publications (3)

Publication Number Publication Date
FI20001654A0 FI20001654A0 (sv) 2000-07-12
FI20001654A FI20001654A (sv) 2002-01-13
FI111197B true FI111197B (sv) 2003-06-13

Family

ID=8558772

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20001654A FI111197B (sv) 2000-07-12 2000-07-12 Multichip-modul

Country Status (3)

Country Link
AU (1) AU2001284066A1 (sv)
FI (1) FI111197B (sv)
WO (1) WO2002005603A1 (sv)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7610310B2 (en) 2006-06-30 2009-10-27 Intel Corporation Method and system for the protected storage of downloaded media content via a virtualized platform
WO2009156970A1 (en) * 2008-06-26 2009-12-30 Nxp B.V. Packaged semiconductor product and method for manufacture thereof
GB2475563A (en) 2009-11-24 2011-05-25 Concepts For Success Pants style garment formed with a centre strip and associated side panels

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5031027A (en) * 1990-07-13 1991-07-09 Motorola, Inc. Shielded electrical circuit
DE4035526A1 (de) * 1990-11-08 1992-05-14 Bosch Gmbh Robert Elektrisches geraet, insbesondere schalt- und steuergeraet fuer kraftfahrzeuge, und verfahren zur herstellung
DE19626126C2 (de) * 1996-06-28 1998-04-16 Fraunhofer Ges Forschung Verfahren zur Ausbildung einer räumlichen Chipanordnung und räumliche Chipanordung

Also Published As

Publication number Publication date
FI20001654A0 (sv) 2000-07-12
WO2002005603A1 (en) 2002-01-17
FI20001654A (sv) 2002-01-13
AU2001284066A1 (en) 2002-01-21

Similar Documents

Publication Publication Date Title
US10128214B2 (en) Substrate and the method to fabricate thereof
US4618739A (en) Plastic chip carrier package
US6091143A (en) Stacked leads-over chip multi-chip module
US4819041A (en) Surface mounted integrated circuit chip package and method for making same
US20080303125A1 (en) Three-dimensional package structure
JP2547637B2 (ja) ピン格子配列パッケージ構造
KR950030321A (ko) 반도체장치 및 그 제조방법 및 기판
US20060081980A1 (en) Integrated circuit package employing a heat-spreader member
KR102607649B1 (ko) 반도체 패키지들
KR100647090B1 (ko) 다수의 반도체 칩을 포함하는 반도체 소자
CN107452696B (zh) 电磁屏蔽封装体以及制造方法
JPH0870059A (ja) 分離されたダイパッドを有する半導体パッケージ
FI111197B (sv) Multichip-modul
CN106358415B (zh) 电子装置模块及其制造方法
JPH11243175A (ja) 複合半導体装置
GB2396963A (en) Semiconductor packaging structure
JP2925722B2 (ja) ハーメチックシール型電気回路装置
JP2780424B2 (ja) 混成集積回路
JPS60171754A (ja) 回路素子付半導体チツプキヤリア
KR102272112B1 (ko) 반도체 패키지
JPS63179537A (ja) 半導体装置の実装方法
JPH10335576A (ja) 複数のｉｃチップを備えた半導体装置の構造
GB2379330A (en) Package for electronic components and method for forming a package for electronic components
KR950003904B1 (ko) 반도체 패키지
KR200283907Y1 (ko) 볼 그리드 어레이 패키지 적층형 반도체 소자