ES551775A0 - Memoria semiconductora con linea de palabras reforzadas. - Google Patents

Memoria semiconductora con linea de palabras reforzadas.

Info

Publication number
ES551775A0
ES551775A0 ES551775A ES551775A ES551775A0 ES 551775 A0 ES551775 A0 ES 551775A0 ES 551775 A ES551775 A ES 551775A ES 551775 A ES551775 A ES 551775A ES 551775 A0 ES551775 A0 ES 551775A0
Authority
ES
Spain
Prior art keywords
reinforced
words
line
semiconductive memory
semiconductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES551775A
Other languages
English (en)
Other versions
ES8800776A1 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of ES8800776A1 publication Critical patent/ES8800776A1/es
Publication of ES551775A0 publication Critical patent/ES551775A0/es
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/24Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using capacitors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
ES551775A 1985-02-08 1986-02-08 Memoria semiconductora con linea de palabras reforzadas. Expired ES8800776A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/699,661 US4649523A (en) 1985-02-08 1985-02-08 Semiconductor memory with boosted word line

Publications (2)

Publication Number Publication Date
ES8800776A1 ES8800776A1 (es) 1987-12-01
ES551775A0 true ES551775A0 (es) 1987-12-01

Family

ID=24810329

Family Applications (1)

Application Number Title Priority Date Filing Date
ES551775A Expired ES8800776A1 (es) 1985-02-08 1986-02-08 Memoria semiconductora con linea de palabras reforzadas.

Country Status (8)

Country Link
US (1) US4649523A (es)
EP (1) EP0210260B1 (es)
JP (1) JPS62501807A (es)
KR (1) KR970009099B1 (es)
CA (1) CA1241444A (es)
DE (1) DE3671314D1 (es)
ES (1) ES8800776A1 (es)
WO (1) WO1986004726A1 (es)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0817032B2 (ja) * 1986-03-12 1996-02-21 株式会社日立製作所 半導体集積回路装置
JPH02247892A (ja) * 1989-03-20 1990-10-03 Fujitsu Ltd ダイナミックランダムアクセスメモリ
JPH0442494A (ja) * 1990-06-08 1992-02-13 Nec Corp Mosダイナミックram
JPH04129089A (ja) * 1990-09-19 1992-04-30 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
US5289025A (en) * 1991-10-24 1994-02-22 At&T Bell Laboratories Integrated circuit having a boosted node
JPH05151773A (ja) * 1991-11-29 1993-06-18 Mitsubishi Electric Corp ダイナミツク型半導体記憶装置
US5255224A (en) * 1991-12-18 1993-10-19 International Business Machines Corporation Boosted drive system for master/local word line memory architecture
JP3179848B2 (ja) * 1992-03-27 2001-06-25 三菱電機株式会社 半導体記憶装置
JP3413298B2 (ja) * 1994-12-02 2003-06-03 三菱電機株式会社 半導体記憶装置
JPH10228773A (ja) * 1997-02-14 1998-08-25 Hitachi Ltd ダイナミック型ram
US5914908A (en) * 1997-03-14 1999-06-22 Hyundai Electronics America Method of operating a boosted wordline
KR100468718B1 (ko) * 2001-12-07 2005-01-29 삼성전자주식회사 외부 리프레쉬 명령을 사용하지 않는 메모리장치의리프레쉬 제어회로 및 그 방법
TWI551044B (zh) * 2015-05-15 2016-09-21 華邦電子股份有限公司 電源閘電路及其電源閘開關控制方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4208730A (en) * 1978-08-07 1980-06-17 Rca Corporation Precharge circuit for memory array
US4291393A (en) * 1980-02-11 1981-09-22 Mostek Corporation Active refresh circuit for dynamic MOS circuits
DE3169127D1 (en) * 1981-05-13 1985-04-04 Ibm Deutschland Input circuit for an integrated monolithic semiconductor memory using field effect transistors
JPS5823387A (ja) * 1981-07-31 1983-02-12 Toshiba Corp Mosダイナミツクメモリ
JPS58122692A (ja) * 1982-01-14 1983-07-21 Toshiba Corp 能動昇圧回路
US4449207A (en) * 1982-04-29 1984-05-15 Intel Corporation Byte-wide dynamic RAM with multiplexed internal buses
JPS59188885A (ja) * 1983-04-11 1984-10-26 Hitachi Ltd ダイナミツク型ram

Also Published As

Publication number Publication date
DE3671314D1 (de) 1990-06-21
US4649523A (en) 1987-03-10
ES8800776A1 (es) 1987-12-01
EP0210260B1 (en) 1990-05-16
KR880700428A (ko) 1988-03-15
CA1241444A (en) 1988-08-30
WO1986004726A1 (en) 1986-08-14
JPH0413796B2 (es) 1992-03-10
EP0210260A1 (en) 1987-02-04
KR970009099B1 (ko) 1997-06-05
JPS62501807A (ja) 1987-07-16

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