ES443346A1 - Procedimiento de formacion de conductores electricos en un sustrato aislante. - Google Patents

Procedimiento de formacion de conductores electricos en un sustrato aislante.

Info

Publication number
ES443346A1
ES443346A1 ES443346A ES443346A ES443346A1 ES 443346 A1 ES443346 A1 ES 443346A1 ES 443346 A ES443346 A ES 443346A ES 443346 A ES443346 A ES 443346A ES 443346 A1 ES443346 A1 ES 443346A1
Authority
ES
Spain
Prior art keywords
layer
stage
methods
electrodeposited
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES443346A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/531,430 external-priority patent/US4068022A/en
Priority claimed from US05/576,711 external-priority patent/US4016050A/en
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of ES443346A1 publication Critical patent/ES443346A1/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/623Porosity of the layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/707Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016Thin-film circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/243Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0367Metallic bump or raised conductor not used as solder bump
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/0723Electroplating, e.g. finish plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/062Etching masks consisting of metals or alloys or metallic inorganic compounds
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Electrochemistry (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)
ES443346A 1974-12-10 1975-12-10 Procedimiento de formacion de conductores electricos en un sustrato aislante. Expired ES443346A1 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/531,430 US4068022A (en) 1974-12-10 1974-12-10 Methods of strengthening bonds
US05/576,711 US4016050A (en) 1975-05-12 1975-05-12 Conduction system for thin film and hybrid integrated circuits

Publications (1)

Publication Number Publication Date
ES443346A1 true ES443346A1 (es) 1977-08-16

Family

ID=27063541

Family Applications (1)

Application Number Title Priority Date Filing Date
ES443346A Expired ES443346A1 (es) 1974-12-10 1975-12-10 Procedimiento de formacion de conductores electricos en un sustrato aislante.

Country Status (8)

Country Link
JP (1) JPS6032311B2 (es)
DE (1) DE2554691C2 (es)
ES (1) ES443346A1 (es)
FR (1) FR2294610A1 (es)
GB (1) GB1527108A (es)
IT (1) IT1051461B (es)
NL (1) NL185249C (es)
SE (1) SE427400B (es)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4153518A (en) * 1977-11-18 1979-05-08 Tektronix, Inc. Method of making a metalized substrate having a thin film barrier layer
JPS54127572A (en) * 1978-03-28 1979-10-03 Oki Electric Ind Co Ltd Thin film circuit
DE2833919C2 (de) * 1978-08-02 1982-06-09 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung von elektrischen Schichtschaltungen auf Kunststoffolien
JPS5559795A (en) * 1978-10-30 1980-05-06 Nippon Electric Co Printed circuit board and method of manufacturing same
EP0016263B1 (de) * 1979-03-21 1983-07-06 BBC Brown Boveri AG Dünnschichtwiderstand mit grossem Temperaturkoeffizienten und Verfahren zu dessen Herstellung
FR2476913B1 (fr) * 1980-02-25 1985-09-13 Nippon Electric Co Circuit a plusieurs couches pour integration a grande echelle et procede de fabrication de ce circuit
DE3029382A1 (de) * 1980-08-01 1982-03-04 Siemens AG, 1000 Berlin und 8000 München Aufbau von metallschichten und verfahren zur herstellung dieses aufbaus
DE3029277C2 (de) * 1980-08-01 1983-10-20 Siemens AG, 1000 Berlin und 8000 München Aufbau von Metallschichten
DE3107943A1 (de) * 1981-03-02 1982-09-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung von loetbaren und temperfaehigen edelmetallfreien duennschichtleiterbahnen
JPS57198696A (en) * 1981-06-01 1982-12-06 Shimada Rika Kogyo Kk Method of producing thin film circuit
DE3207659A1 (de) * 1982-03-03 1983-09-15 Siemens AG, 1000 Berlin und 8000 München Duennfilmschaltungen mit durchkontaktierungen
US4463059A (en) * 1982-06-30 1984-07-31 International Business Machines Corporation Layered metal film structures for LSI chip carriers adapted for solder bonding and wire bonding
JPS59167096A (ja) * 1983-03-11 1984-09-20 日本電気株式会社 回路基板
JPS60140897A (ja) * 1983-12-28 1985-07-25 日本電気株式会社 樹脂絶縁多層基板
DE3433251A1 (de) * 1984-08-16 1986-02-27 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zur herstellung von galvanischen lotschichten auf anorganischen substraten
US4808274A (en) * 1986-09-10 1989-02-28 Engelhard Corporation Metallized substrates and process for producing
EP0264648B1 (en) * 1986-09-25 1993-05-05 Kabushiki Kaisha Toshiba Method of producing a film carrier
JPH03108797A (ja) * 1989-09-22 1991-05-08 Ngk Spark Plug Co Ltd 多層配線基板およびその製造方法
DE4017181C2 (de) * 1990-05-29 1998-08-27 Daimler Benz Aerospace Ag Elektrisches Bauelement
EP0526656B1 (en) * 1991-02-25 1996-01-10 Sumitomo Electric Industries, Ltd. Wiring board
US5449955A (en) * 1994-04-01 1995-09-12 At&T Corp. Film circuit metal system for use with bumped IC packages
DE10004453B4 (de) * 2000-02-03 2009-08-13 Ust Umweltsensortechnik Gmbh Elektrische Sicherung und Verfahren zu deren Herstellung
JP2003101222A (ja) * 2001-09-21 2003-04-04 Sony Corp 薄膜回路基板装置及びその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE7106898U (de) * 1970-03-06 1971-05-27 Motorola Inc Integrierter Hybrid Schaltkreis

Also Published As

Publication number Publication date
IT1051461B (it) 1981-04-21
GB1527108A (en) 1978-10-04
DE2554691C2 (de) 1982-11-18
FR2294610B1 (es) 1980-03-21
NL7514325A (nl) 1976-06-14
SE427400B (sv) 1983-03-28
DE2554691A1 (de) 1976-06-16
FR2294610A1 (fr) 1976-07-09
JPS6032311B2 (ja) 1985-07-27
SE7513853L (sv) 1976-06-11
NL185249B (nl) 1989-09-18
NL185249C (nl) 1990-02-16
JPS51101864A (en) 1976-09-08

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