GB1527108A - Methods of forming conductors on substrates involving electroplating - Google Patents

Methods of forming conductors on substrates involving electroplating

Info

Publication number
GB1527108A
GB1527108A GB50291/75A GB5029175A GB1527108A GB 1527108 A GB1527108 A GB 1527108A GB 50291/75 A GB50291/75 A GB 50291/75A GB 5029175 A GB5029175 A GB 5029175A GB 1527108 A GB1527108 A GB 1527108A
Authority
GB
United Kingdom
Prior art keywords
layer
thick
layers
substrate
dec
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB50291/75A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/531,430 external-priority patent/US4068022A/en
Priority claimed from US05/576,711 external-priority patent/US4016050A/en
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of GB1527108A publication Critical patent/GB1527108A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60—Electroplating characterised by the structure or texture of the layers
    • C25D5/623—Porosity of the layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/707—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016—Thin-film circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Metallurgy (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electrochemistry (AREA)
  • Computer Hardware Design (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

1527108 Forming multi-layer conductors by electro-plating WESTERN ELECTRIC CO Inc 8 Dec 1975 [10 Dec 1974 12 May 1975] 50291/75 Heading C7B Electrical conductors are formed on an insulating substrate for the inter-connect pattern of an integrated circuit by forming over the substrate in turn a Ti layer e.g. 1500-3000Š thick in a desired pattern, a Pd layer e.g. 200-3000A thick, a Cu layer e.g. 3000-7000A thick, then electroplating in turn additional Cu on to a portion of the first Cu layer e.g. to a total thickness of 25000- 40000Š, a Ni layer e.g. 8000-20000Š, a Au layer e.g. 15000-25000Š on at least a portion of the Ni layer, and removing those portions of the Ti, Pd and Cu layers not covered by the electro-plated metals, e.g. by immersion in ammonium persulphate solution (for Cu) and HF solution (for Ti). The Ti, Pd and first Cu layers may be formed by electron gun evaporation or sputtering. The substrate may be alumina on which is deposited Ta or Ti nitride resistor/capacitor elements. The resulting structure may be heated at 200 to 400‹C. A photo-resist may be applied, exposed and developed after the first Cu and the Ni layers.
GB50291/75A 1974-12-10 1975-12-08 Methods of forming conductors on substrates involving electroplating Expired GB1527108A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/531,430 US4068022A (en) 1974-12-10 1974-12-10 Methods of strengthening bonds
US05/576,711 US4016050A (en) 1975-05-12 1975-05-12 Conduction system for thin film and hybrid integrated circuits

Publications (1)

Publication Number Publication Date
GB1527108A true GB1527108A (en) 1978-10-04

Family

ID=27063541

Family Applications (1)

Application Number Title Priority Date Filing Date
GB50291/75A Expired GB1527108A (en) 1974-12-10 1975-12-08 Methods of forming conductors on substrates involving electroplating

Country Status (8)

Country Link
JP (1) JPS6032311B2 (en)
DE (1) DE2554691C2 (en)
ES (1) ES443346A1 (en)
FR (1) FR2294610A1 (en)
GB (1) GB1527108A (en)
IT (1) IT1051461B (en)
NL (1) NL185249C (en)
SE (1) SE427400B (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2476913A1 (en) * 1980-02-25 1981-08-28 Nippon Electric Co MULTI-LAYERED CIRCUIT FOR LARGE-SCALE INTEGRATION AND METHOD FOR MANUFACTURING THE SAME
EP0060436A1 (en) * 1981-03-02 1982-09-22 Siemens Aktiengesellschaft Method of manufacturing noble metal-free thin-film conductors with good bonding and annealing properties
EP0097833A2 (en) * 1982-06-30 1984-01-11 International Business Machines Corporation Substrate for integrated circuit packages
FR2557755A1 (en) * 1983-12-28 1985-07-05 Nec Corp MULTI-LAYER WIRING SUBSTRATE
EP0264648A1 (en) * 1986-09-25 1988-04-27 Kabushiki Kaisha Toshiba Method of producing a film carrier
EP0266877A2 (en) * 1986-09-10 1988-05-11 Engelhard Corporation Metallized substrates and process for their production
EP0526656A1 (en) * 1991-02-25 1993-02-10 Sumitomo Electric Industries, Ltd. Wiring board
EP0675674A1 (en) * 1994-04-01 1995-10-04 AT&T Corp. Film circuit metal system for use with bumped IC packages
EP1429590A1 (en) * 2001-09-21 2004-06-16 Sony Corporation Thin film circuit board device and its manufacturing method
CN116093573A (en) * 2022-12-14 2023-05-09 北京航天微电科技有限公司 Microstrip circuit preparation method and microstrip ring spacer

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4153518A (en) * 1977-11-18 1979-05-08 Tektronix, Inc. Method of making a metalized substrate having a thin film barrier layer
JPS54127572A (en) * 1978-03-28 1979-10-03 Oki Electric Ind Co Ltd Thin film circuit
DE2833919C2 (en) * 1978-08-02 1982-06-09 Siemens AG, 1000 Berlin und 8000 München Process for the production of electrical layer circuits on plastic foils
JPS5559795A (en) * 1978-10-30 1980-05-06 Nippon Electric Co Printed circuit board and method of manufacturing same
DE2965814D1 (en) * 1979-03-21 1983-08-11 Bbc Brown Boveri & Cie Thin film resistor having a high temperature coefficient and method of manufacturing the same
DE3029382A1 (en) * 1980-08-01 1982-03-04 Siemens AG, 1000 Berlin und 8000 München Conductor pattern for semiconductor device on insulating substrate - where multilayer pattern includes palladium covered by palladium oxide and then gold
DE3029277C2 (en) * 1980-08-01 1983-10-20 Siemens AG, 1000 Berlin und 8000 München Build-up of metal layers
JPS57198696A (en) * 1981-06-01 1982-12-06 Shimada Rika Kogyo Kk Method of producing thin film circuit
DE3207659A1 (en) * 1982-03-03 1983-09-15 Siemens AG, 1000 Berlin und 8000 München Thin-film circuits with through-contact holes
JPS59167096A (en) * 1983-03-11 1984-09-20 日本電気株式会社 Circuit board
DE3433251A1 (en) * 1984-08-16 1986-02-27 Robert Bosch Gmbh, 7000 Stuttgart METHOD FOR PRODUCING GALVANIC SOLDER LAYERS ON INORGANIC SUBSTRATES
JPH03108797A (en) * 1989-09-22 1991-05-08 Ngk Spark Plug Co Ltd Multilayer wiring board and manufacture thereof
DE4017181C2 (en) * 1990-05-29 1998-08-27 Daimler Benz Aerospace Ag Electrical component
DE10004453B4 (en) * 2000-02-03 2009-08-13 Ust Umweltsensortechnik Gmbh Electric fuse and method for its manufacture

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2108730A1 (en) * 1970-03-06 1971-09-16 Motorola Inc Integrated hybrid circuit

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2476913A1 (en) * 1980-02-25 1981-08-28 Nippon Electric Co MULTI-LAYERED CIRCUIT FOR LARGE-SCALE INTEGRATION AND METHOD FOR MANUFACTURING THE SAME
EP0060436A1 (en) * 1981-03-02 1982-09-22 Siemens Aktiengesellschaft Method of manufacturing noble metal-free thin-film conductors with good bonding and annealing properties
EP0097833A2 (en) * 1982-06-30 1984-01-11 International Business Machines Corporation Substrate for integrated circuit packages
EP0097833A3 (en) * 1982-06-30 1985-10-30 International Business Machines Corporation Substrate for integrated circuit packages
EP0270752A1 (en) * 1982-06-30 1988-06-15 International Business Machines Corporation Substrates for integrated circuit packages
FR2557755A1 (en) * 1983-12-28 1985-07-05 Nec Corp MULTI-LAYER WIRING SUBSTRATE
EP0266877A3 (en) * 1986-09-10 1989-12-13 Engelhard Corporation Metallized substrates and process for their production
EP0266877A2 (en) * 1986-09-10 1988-05-11 Engelhard Corporation Metallized substrates and process for their production
US4808769A (en) * 1986-09-25 1989-02-28 Kabushiki Kaisha Toshiba Film carrier and bonding method using the film carrier
US4857671A (en) * 1986-09-25 1989-08-15 Kabushiki Kaisha Toshiba Film carrier and bonding method using the film carrier
EP0264648A1 (en) * 1986-09-25 1988-04-27 Kabushiki Kaisha Toshiba Method of producing a film carrier
EP0526656A1 (en) * 1991-02-25 1993-02-10 Sumitomo Electric Industries, Ltd. Wiring board
EP0526656A4 (en) * 1991-02-25 1993-04-14 Sumitomo Electric Industries, Ltd. Wiring board
EP0675674A1 (en) * 1994-04-01 1995-10-04 AT&T Corp. Film circuit metal system for use with bumped IC packages
EP1429590A1 (en) * 2001-09-21 2004-06-16 Sony Corporation Thin film circuit board device and its manufacturing method
EP1429590A4 (en) * 2001-09-21 2007-07-11 Sony Corp Thin film circuit board device and its manufacturing method
CN116093573A (en) * 2022-12-14 2023-05-09 北京航天微电科技有限公司 Microstrip circuit preparation method and microstrip ring spacer

Also Published As

Publication number Publication date
DE2554691A1 (en) 1976-06-16
IT1051461B (en) 1981-04-21
DE2554691C2 (en) 1982-11-18
NL7514325A (en) 1976-06-14
NL185249B (en) 1989-09-18
JPS6032311B2 (en) 1985-07-27
NL185249C (en) 1990-02-16
ES443346A1 (en) 1977-08-16
FR2294610B1 (en) 1980-03-21
FR2294610A1 (en) 1976-07-09
JPS51101864A (en) 1976-09-08
SE427400B (en) 1983-03-28
SE7513853L (en) 1976-06-11

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PE20 Patent expired after termination of 20 years

Effective date: 19951207