ES2896013T3 - Acoplamiento trasero con TSV parcial superconductor para qubits transmon - Google Patents

Acoplamiento trasero con TSV parcial superconductor para qubits transmon Download PDF

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Publication number
ES2896013T3
ES2896013T3 ES18795343T ES18795343T ES2896013T3 ES 2896013 T3 ES2896013 T3 ES 2896013T3 ES 18795343 T ES18795343 T ES 18795343T ES 18795343 T ES18795343 T ES 18795343T ES 2896013 T3 ES2896013 T3 ES 2896013T3
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Spain
Prior art keywords
superconducting
layer
substrate
trench
capacitive coupling
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ES18795343T
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English (en)
Spanish (es)
Inventor
Rasit Topaloglu
Sami Rosenblatt
Jared Hertzberg
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International Business Machines Corp
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International Business Machines Corp
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32058—Deposition of superconductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53285—Conductive materials containing superconducting materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0912—Manufacture or treatment of Josephson-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/12—Josephson-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/80—Constructional details
    • H10N60/805—Constructional details for Josephson-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Manufacturing & Machinery (AREA)
  • Mathematical Analysis (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Software Systems (AREA)
  • Artificial Intelligence (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
ES18795343T 2017-11-27 2018-10-19 Acoplamiento trasero con TSV parcial superconductor para qubits transmon Active ES2896013T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/822,338 US10446736B2 (en) 2017-11-27 2017-11-27 Backside coupling with superconducting partial TSV for transmon qubits
PCT/EP2018/078707 WO2019101448A1 (en) 2017-11-27 2018-10-19 Backside coupling with superconducting partial tsv for transmon qubits

Publications (1)

Publication Number Publication Date
ES2896013T3 true ES2896013T3 (es) 2022-02-23

Family

ID=64049089

Family Applications (1)

Application Number Title Priority Date Filing Date
ES18795343T Active ES2896013T3 (es) 2017-11-27 2018-10-19 Acoplamiento trasero con TSV parcial superconductor para qubits transmon

Country Status (6)

Country Link
US (3) US10446736B2 (enExample)
EP (1) EP3707647B1 (enExample)
JP (1) JP7212439B2 (enExample)
CN (1) CN111295678B (enExample)
ES (1) ES2896013T3 (enExample)
WO (1) WO2019101448A1 (enExample)

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US10446736B2 (en) * 2017-11-27 2019-10-15 International Business Machines Corporation Backside coupling with superconducting partial TSV for transmon qubits
US10811588B2 (en) * 2018-08-06 2020-10-20 International Business Machines Corporation Vertical dispersive readout of qubits of a lattice surface code architecture
US11088310B2 (en) * 2019-04-29 2021-08-10 International Business Machines Corporation Through-silicon-via fabrication in planar quantum devices
WO2021178042A1 (en) * 2020-03-02 2021-09-10 Massachusetts Institute Of Technology Qubit circuits with deep, in-substrate components
US11289638B2 (en) * 2020-06-22 2022-03-29 International Business Machines Corporation Superconducting qubit lifetime and coherence improvement via backside etching
US11152707B1 (en) * 2020-07-02 2021-10-19 International Business Machines Corporation Fast radio frequency package
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US12033981B2 (en) 2020-12-16 2024-07-09 International Business Machines Corporation Create a protected layer for interconnects and devices in a packaged quantum structure
WO2022143809A1 (zh) * 2020-12-31 2022-07-07 合肥本源量子计算科技有限责任公司 超导量子芯片结构以及超导量子芯片制备方法
EP4053865B1 (en) 2021-03-02 2024-04-24 Imec VZW Trench capacitor device for a superconducting electronic circuit, superconducting qubit device and method for forming a trench capacitor device for a qubit device
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Also Published As

Publication number Publication date
JP7212439B2 (ja) 2023-01-25
US10446736B2 (en) 2019-10-15
US10804454B2 (en) 2020-10-13
CN111295678B (zh) 2023-07-28
JP2021504936A (ja) 2021-02-15
WO2019101448A1 (en) 2019-05-31
US10529908B2 (en) 2020-01-07
CN111295678A (zh) 2020-06-16
US20190165237A1 (en) 2019-05-30
US20200052181A1 (en) 2020-02-13
EP3707647B1 (en) 2021-09-29
US20190181325A1 (en) 2019-06-13
EP3707647A1 (en) 2020-09-16

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