ES2080724T3 - Sistema para generar una señal de sincronizacion. - Google Patents

Sistema para generar una señal de sincronizacion.

Info

Publication number
ES2080724T3
ES2080724T3 ES88307472T ES88307472T ES2080724T3 ES 2080724 T3 ES2080724 T3 ES 2080724T3 ES 88307472 T ES88307472 T ES 88307472T ES 88307472 T ES88307472 T ES 88307472T ES 2080724 T3 ES2080724 T3 ES 2080724T3
Authority
ES
Spain
Prior art keywords
pll
signal
phase
clock signal
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES88307472T
Other languages
English (en)
Inventor
Kazuo Fukazawa
Toshio Kaneuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Licensing Corp
Original Assignee
RCA Licensing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22184369&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ES2080724(T3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by RCA Licensing Corp filed Critical RCA Licensing Corp
Application granted granted Critical
Publication of ES2080724T3 publication Critical patent/ES2080724T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/20—Circuitry for controlling amplitude response
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/79—Processing of colour television signals in connection with recording
    • H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
    • H04N9/804—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
    • H04N5/126—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof
    • H04N5/932—Regeneration of analogue synchronisation signals

Abstract

UN RECEPTOR DE TELEVISION INCLUYE UN CIRCUITO DE BLOQUEO DE FASE (PLL) (226-232) QUE GENERA UNA SEÑAL DE RELOJ (CLK) QUE TIENE UNA FRECUENCIA N VECES LA FRECUENCIA DE LINEA Y QUE ESTA BLOQUEADA EN FASE A LA SEÑAL DE SINCRONIZACION DE LA LINEA HORIZONTAL (HSYNC). LA SEÑAL DE RELOJ PRODUCIDA POR ESTE CIRCUITO DE BLOQUEO DE FASE TIENE UNA FRECUENCIA QUE TIENDE A OSCILAR ENTRE N+1 Y N-1 VECES LA FRECUENCIA DE LINEA. PARA COMPENSAR ESTA OSCILACION EN LA FRECUENCIA DE LA SEÑAL DE RELOJ, UN CIRCUITO DE ALINEAMIENTO DE FASE (2,3,6) VA ACOPLADO AL CIRCUITO DE BLOQUEO DE FASE PARA ALINEAR LA FASE DE LA SEÑAL DE RELOJ A LA SEÑAL DE EXCITACION HORIZONTAL (HD) GENERADA POR DICHO CIRCUITO DE BLOQUEO DE FASE EN CADA IMPULSO DE EXCITACION HORIZONTAL. EL CIRCUITO DE BLOQUEO DE FASE PUEDE INCLUIR TAMBIEN UN RETARDADOR (2,3,4) QUE DEMORA LA SEÑAL DE EXCITACION HORIZONTAL APLICADA AL COMPARADOR DE FASE DEL CIRCUITO PLL. ESTE ELEMENTO RETARDADOR AVANZA LA FASE DE LA SEÑAL DE EXCITACION HORIZONTAL Y LA SEÑALDE RELOJ DE BLOQUEO DE LINEA RESPECTO A LA SEÑAL DE SINCRONIZAICON HORIZONTAL PARA COMPENSAR LAS DEMORAS EN EL PROCESAMIENTO DE SEÑALES QUE TIENE LUGAR EN LA GENERACION DE LA SEÑAL DE EXCITACION HORIZONTAL Y LA SEÑAL DE RELOJ.
ES88307472T 1987-08-12 1988-08-11 Sistema para generar una señal de sincronizacion. Expired - Lifetime ES2080724T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/084,346 US4791488A (en) 1987-08-12 1987-08-12 Line-locked clock signal generation system

Publications (1)

Publication Number Publication Date
ES2080724T3 true ES2080724T3 (es) 1996-02-16

Family

ID=22184369

Family Applications (1)

Application Number Title Priority Date Filing Date
ES88307472T Expired - Lifetime ES2080724T3 (es) 1987-08-12 1988-08-11 Sistema para generar una señal de sincronizacion.

Country Status (12)

Country Link
US (1) US4791488A (es)
EP (1) EP0303494B1 (es)
JP (1) JPS6481407A (es)
KR (1) KR0129532B1 (es)
CN (1) CN1013724B (es)
AT (1) ATE131670T1 (es)
AU (1) AU611696B2 (es)
CA (1) CA1260607A (es)
DE (1) DE3854772T2 (es)
ES (1) ES2080724T3 (es)
FI (1) FI94691C (es)
SG (1) SG44557A1 (es)

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AU6713696A (en) * 1995-08-01 1997-02-26 Auravision Corporation Transition aligned video synchronization system
JP2836555B2 (ja) * 1995-12-15 1998-12-14 日本電気株式会社 Ｐｌｌ回路
JP3823420B2 (ja) 1996-02-22 2006-09-20 セイコーエプソン株式会社 ドットクロック信号を調整するための方法及び装置
US5663992A (en) * 1996-03-14 1997-09-02 Trimble Navigation Limited Method and apparatus for correction of GPS carrier phase measurement
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KR101710351B1 (ko) 2015-02-25 2017-03-08 이영숙 생강 절단장치
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Also Published As

Publication number Publication date
AU611696B2 (en) 1991-06-20
DE3854772T2 (de) 1996-09-05
US4791488A (en) 1988-12-13
CN1031304A (zh) 1989-02-22
KR0129532B1 (ko) 1998-04-10
CA1260607A (en) 1989-09-26
KR890004576A (ko) 1989-04-22
SG44557A1 (en) 1997-12-19
CN1013724B (zh) 1991-08-28
EP0303494A2 (en) 1989-02-15
FI883670A0 (fi) 1988-08-05
DE3854772D1 (de) 1996-01-25
ATE131670T1 (de) 1995-12-15
FI883670A (fi) 1989-02-13
JPS6481407A (en) 1989-03-27
FI94691C (fi) 1995-10-10
AU1909488A (en) 1989-02-16
FI94691B (fi) 1995-06-30
EP0303494A3 (en) 1990-07-18
EP0303494B1 (en) 1995-12-13

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