EP2698819A1 - Boîtier haute fréquence - Google Patents

Boîtier haute fréquence Download PDF

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Publication number
EP2698819A1
EP2698819A1 EP12771789.0A EP12771789A EP2698819A1 EP 2698819 A1 EP2698819 A1 EP 2698819A1 EP 12771789 A EP12771789 A EP 12771789A EP 2698819 A1 EP2698819 A1 EP 2698819A1
Authority
EP
European Patent Office
Prior art keywords
dielectric substrate
frequency
dielectric
back side
frequency element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP12771789.0A
Other languages
German (de)
English (en)
Other versions
EP2698819A4 (fr
EP2698819B1 (fr
Inventor
Yusuke Kitsukawa
Takuya Suzuki
Tomoyuki Unno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of EP2698819A1 publication Critical patent/EP2698819A1/fr
Publication of EP2698819A4 publication Critical patent/EP2698819A4/fr
Application granted granted Critical
Publication of EP2698819B1 publication Critical patent/EP2698819B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00Screening of apparatus or components against electric or magnetic fields
    • H05K9/0007Casings
    • H05K9/006Casings specially adapted for signal processing applications, e.g. CATV, tuner, antennas amplifier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/15321Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Signal Processing (AREA)
  • Waveguides (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
EP12771789.0A 2011-04-14 2012-01-31 Emballage haute fréquence Active EP2698819B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011090259 2011-04-14
PCT/JP2012/052117 WO2012140934A1 (fr) 2011-04-14 2012-01-31 Boîtier haute fréquence

Publications (3)

Publication Number Publication Date
EP2698819A1 true EP2698819A1 (fr) 2014-02-19
EP2698819A4 EP2698819A4 (fr) 2014-10-01
EP2698819B1 EP2698819B1 (fr) 2019-08-14

Family

ID=47009120

Family Applications (1)

Application Number Title Priority Date Filing Date
EP12771789.0A Active EP2698819B1 (fr) 2011-04-14 2012-01-31 Emballage haute fréquence

Country Status (5)

Country Link
US (1) US9693492B2 (fr)
EP (1) EP2698819B1 (fr)
JP (1) JP5693710B2 (fr)
CN (1) CN103460377B (fr)
WO (1) WO2012140934A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9508676B1 (en) 2015-08-10 2016-11-29 Chipbond Technology Corporation Semiconductor package structure having hollow chamber and bottom substrate and package process thereof

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9070961B2 (en) 2008-09-05 2015-06-30 Mitsubishi Electric Corporation High-frequency circuit package and sensor module
JP6274917B2 (ja) * 2014-03-11 2018-02-07 三菱電機株式会社 高周波パッケージ
TWI663701B (zh) * 2017-04-28 2019-06-21 矽品精密工業股份有限公司 電子封裝件及其製法
WO2024084556A1 (fr) * 2022-10-18 2024-04-25 三菱電機株式会社 Boîtier de semi-conducteur haute fréquence

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6137693A (en) * 1998-07-31 2000-10-24 Agilent Technologies Inc. High-frequency electronic package with arbitrarily-shaped interconnects and integral shielding
US20080067656A1 (en) * 2006-09-15 2008-03-20 Hong Kong Applied Science Stacked multi-chip package with EMI shielding

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5869894A (en) 1997-07-18 1999-02-09 Lucent Technologies Inc. RF IC package
JP3609935B2 (ja) * 1998-03-10 2005-01-12 シャープ株式会社 高周波半導体装置
US6297551B1 (en) * 1999-09-22 2001-10-02 Agere Systems Guardian Corp. Integrated circuit packages with improved EMI characteristics
US6486534B1 (en) 2001-02-16 2002-11-26 Ashvattha Semiconductor, Inc. Integrated circuit die having an interference shield
JP2003163304A (ja) 2001-11-29 2003-06-06 Mitsubishi Electric Corp 高周波パッケージ
WO2003049149A2 (fr) * 2001-11-30 2003-06-12 Vitesse Semiconductor Corporation Dispositif et procede de connexion inter-puces ou puce-substrat par l'intermediaire d'un support intermediaire
JP3858854B2 (ja) * 2003-06-24 2006-12-20 富士通株式会社 積層型半導体装置
US7613010B2 (en) * 2004-02-02 2009-11-03 Panasonic Corporation Stereoscopic electronic circuit device, and relay board and relay frame used therein
JP4403977B2 (ja) * 2005-01-26 2010-01-27 ソニー株式会社 機能素子体及びその製造方法並びに回路モジュール
KR100998499B1 (ko) 2005-11-16 2010-12-06 쿄세라 코포레이션 전자 부품 밀봉용 기판, 복수개 분할 형태의 전자 부품밀봉용 기판, 전자 부품 밀봉용 기판을 사용한 전자 장치,및 전자 장치의 제조 방법
JP4833192B2 (ja) * 2007-12-27 2011-12-07 新光電気工業株式会社 電子装置
US9070961B2 (en) 2008-09-05 2015-06-30 Mitsubishi Electric Corporation High-frequency circuit package and sensor module
JP2010258137A (ja) 2009-04-23 2010-11-11 Panasonic Corp 高周波モジュールおよびその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6137693A (en) * 1998-07-31 2000-10-24 Agilent Technologies Inc. High-frequency electronic package with arbitrarily-shaped interconnects and integral shielding
US20080067656A1 (en) * 2006-09-15 2008-03-20 Hong Kong Applied Science Stacked multi-chip package with EMI shielding

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2012140934A1 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9508676B1 (en) 2015-08-10 2016-11-29 Chipbond Technology Corporation Semiconductor package structure having hollow chamber and bottom substrate and package process thereof

Also Published As

Publication number Publication date
JPWO2012140934A1 (ja) 2014-07-28
EP2698819A4 (fr) 2014-10-01
CN103460377B (zh) 2017-09-22
EP2698819B1 (fr) 2019-08-14
JP5693710B2 (ja) 2015-04-01
CN103460377A (zh) 2013-12-18
US20140085858A1 (en) 2014-03-27
WO2012140934A1 (fr) 2012-10-18
US9693492B2 (en) 2017-06-27

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