EP2047525A2 - Dünnfilm-halbleiterbauelement und bauelement-verbund - Google Patents
Dünnfilm-halbleiterbauelement und bauelement-verbundInfo
- Publication number
- EP2047525A2 EP2047525A2 EP07785643A EP07785643A EP2047525A2 EP 2047525 A2 EP2047525 A2 EP 2047525A2 EP 07785643 A EP07785643 A EP 07785643A EP 07785643 A EP07785643 A EP 07785643A EP 2047525 A2 EP2047525 A2 EP 2047525A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- thin
- film semiconductor
- semiconductor device
- heat dissipation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 118
- 239000010409 thin film Substances 0.000 title claims abstract description 101
- 230000005855 radiation Effects 0.000 claims abstract description 37
- 239000000463 material Substances 0.000 claims abstract description 19
- 230000017525 heat dissipation Effects 0.000 claims description 74
- 239000002131 composite material Substances 0.000 claims description 30
- 239000004020 conductor Substances 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 239000011888 foil Substances 0.000 claims description 9
- 239000004033 plastic Substances 0.000 claims description 8
- 229920003023 plastic Polymers 0.000 claims description 8
- 239000010408 film Substances 0.000 claims description 7
- 238000001816 cooling Methods 0.000 claims description 6
- 230000003287 optical effect Effects 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004642 Polyimide Substances 0.000 claims description 2
- 229920001721 polyimide Polymers 0.000 claims description 2
- 239000012780 transparent material Substances 0.000 claims description 2
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 239000011521 glass Substances 0.000 claims 1
- 230000000007 visual effect Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 311
- 238000000034 method Methods 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 239000002985 plastic film Substances 0.000 description 4
- 239000010949 copper Substances 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229920006255 plastic film Polymers 0.000 description 3
- -1 polyethylene terephthalate Polymers 0.000 description 3
- 239000012790 adhesive layer Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000007766 curtain coating Methods 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 2
- 239000012777 electrically insulating material Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000006059 cover glass Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/642—Heat extraction or cooling elements characterized by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Definitions
- the optical structure can be arranged on a side of the cover layer facing or facing away from the layer stack.
- a two-sided arrangement of the carrier layer and the cover layer can advantageously replace a housing body.
- a contact pad for an outcoupling-side electrical contact of the layer stacks on the carrier layer is applied between the layer stacks.
- the thin-film semiconductor devices may be electrically connected in various ways.
- the thin-film semiconductor devices are connected in series.
- the second connection region of a first thin-film semiconductor component for example by means of a bonding wire, is particularly preferably electrically connected to the heat-dissipation layer of a second thin-film semiconductor component, the heat-dissipation layer serving as an electrical contact.
- the first and the second connection region may be arranged on a side of the layer stack facing the carrier layer, wherein the first connection region is electrically connected to a first heat-dissipating layer serving as electrical contact and the second connection region is electrically connected to a second heat-dissipating layer serving as electrical contact.
- Figure 3 is a schematic sectional view of a second. ' .
- Embodiment of a thin-film semiconductor device according to the invention
- FIG. 4 shows a schematic sectional view of a third exemplary embodiment of a thin-film semiconductor component according to the invention
- FIG. 7 shows a schematic top view of a first exemplary embodiment of a component composite according to the invention
- Figure 9 is a schematic cross-sectional view of a fourth embodiment of a device composite according to the invention.
- Figure 10 is a schematic cross-sectional view of a fifth embodiment of a device composite according to the invention.
- the same or equivalent components are each provided with the same reference numerals.
- the illustrated components of the figures, in particular the sizes of layer thicknesses shown, are in principle not to be regarded as true to scale. Rather, they can be exaggerated in size for clarity.
- the cover layer 10 is suitable as electrical insulation between a heat dissipation layer 3 and a conductor 9.
- the heat dissipation layer 3 can have electrical conductivity in addition to the thermal conductivity.
- a passivation layer 7 is arranged between the conductor track 9 and the semiconductor layer sequence 5. This contains, for example, silicon oxide.
- the layer sequence 5 is provided essentially for generating radiation.
- the layer sequence 5 can have a conventional pn junction, a double heterostructure, a single quantum well structure or a multiple quantum well structure.
- the layer sequence 5 is substrateless, which means that a growth substrate used for growing the layer sequence 5 is no longer present in the finished thin-film semiconductor component 1.
- the layer stack 8 (see Figure 2) comprises a first electrical connection region 5 and a second electrical connection region 6, which is arranged radiation output side.
- the layer stack 8 is arranged on a carrier layer 2 which has a heat dissipation layer 3.
- the carrier layer 2 is a film on which the heat dissipation layer 3 is patterned before the layer stack 8 is mounted on the heat dissipation layer 3.
- the layer stack 8 is bonded to the heat dissipation layer 3.
- the thickness D w of the heat dissipation layer 3 is preferably between 5 ⁇ m and 30 ⁇ m, with a metal, for example Cu, Ni or Ag, being particularly suitable as the material.
- the thickness D 3 of the layer sequence 5 and of the first electrical connection region 4, which is approximately 7 ⁇ m, can thus be less than the thickness D w of the heat dissipation layer 3.
- the small thicknesses of the carrier layer 2, the slaughterableit ⁇ ngsSchicht 3 and the layer stack 8 allow a total of a thin-film semiconductor device • 1 low overall height. It is a height D ges achievable, which is preferably less than 100 ⁇ m.
- the combination of carrier layer 2 and cover layer 10, which replace a housing body or form a housing for the thin-film semiconductor component 1, also contributes to this.
- the low height of a single thin-film semiconductor device 1 allows stacking of a plurality of thin-film semiconductor devices, whereby the luminance can be increased.
- the heat dissipation layer 3 completely covers a base area of the layer stack 8.
- the heat dissipation layer 3 it is also possible for the heat dissipation layer 3 to be offset from the layer stack, so that the radiation emitted by the layer sequence reaches the carrier layer 2 directly.
- the conductor 9, which is provided for a second electrical connection, preferably runs in steps.
- the conductor track from the first electrical connection region 6 is guided along a radiation decoupling surface 11 over a side surface of the layer stack 8 onto the carrier layer 2.
- the heat dissipation layer 3 and the conductor 9 are opposite the backing layer 2 or the covering layer 10 in the lateral direction in such a way shows that its electrical connection to a power supply 'is possible in a simple manner.
- the carrier layer 2 has a first partial layer 2 a and a second partial layer 2 b.
- the first 'part layer 2a is a thin layer, the thickness of the Partial layer 2a is chosen such that a relatively high heat flow is possible. The heat flow is antiproportional to the layer thickness.
- the thickness of the sub-layer 2a is in the single-digit micrometer range.
- the partial layer 2 a is electrically insulating and in particular contains a plastic material.
- both the conductor track 9 and the heat dissipation layer 3 can be applied to the carrier layer 2, without these being short-circuited.
- the heat dissipation layer 3 may be formed of a system of electrodeposited layers.
- the second sub-layer 2b is a film, preferably a metal foil containing copper, for example, is provided.
- a good heat transfer is possible.
- a strong expansion of the second sub-layer 2b due to the heating can be advantageously counteracted by the first sub-layer 2a, which has a lower thermal expansion coefficient than the second sub-layer 2b.
- the carrier layer 2 is arranged on a base 15.
- the pad 15 advantageously has a good thermal conductivity.
- the pad 15 is a metal foil.
- the carrier layer 2, however, may be a plastic film.
- a carrier layer 2 made of paper is conceivable.
- a thermal compound is used for the mechanical and thermal connection of the carrier layer 2 to the substrate 15.
- the thin-film component 1 shown schematically in plan view in FIG. 5 comprises a carrier layer 2 on which the heat-dissipation layer 3 and the layer stack
- the second electrical connection region 6 and the conductor 9 expediently contain an electrically conductive material.
- This may be a metal or a TCO (Transparent Conductive Oxide).
- the carrier layer 2 may be electrically conductive, so that it makes sense to remove the carrier layer 2 in the region between the heat dissipation layer 3 and the contact pad 12 in order to avoid a short circuit during operation of the thin-film semiconductor component 1.
- the thin-film semiconductor component 1 can be soldered or glued onto a printed circuit board in accordance with an SMT component with the structured carrier layer 2.
- the component composite 13 shown in FIG. 7 has a plurality of layer stacks 8, which are preferably designed as described in more detail in connection with FIGS. 2 and 6.
- the stack of layers 8 are anuß.- on a common carrier layer 2 Further, the stack of layers 8 are connected by means of the conductor tracks 9 to a common 'contact pad 12, which is arranged on the carrier layer. 2
- the size of the device array 13 can be varied by simply dicing the device array 13.
- the component composite 13 is particularly suitable for backlighting and lighting purposes.
- component circuits 13 are shown, which have a plurality of thin-film semiconductor devices 1.
- the thin-film semiconductor components 1 each comprise a layer stack 8 and a part of the common carrier layer 2, on which the layer stacks 8 are arranged.
- a heat dissipation layer 3 which serves here except for cooling as an electrical contact.
- a bonding wire 14 leads to the rear side disposed heat dissipation layer 3 of a second thin film semiconductor device 1 adjacent to the first thin film semiconductor device 1.
- the two thin film semiconductor devices 1 are connected in series.
- the number of series-connected thin-film semiconductor components 1 can be chosen arbitrarily large due to the application.
- the layer stacks 8 are arranged in a decentralized manner on the respective heat dissipation layer 3, as a result of which an improved front-side contacting of the layer stacks 8 is possible in comparison to a central arrangement.
- the base of the heat-dissipating layer 3 is formed like a scale and has in particular a recessed side edge and a side edge thereof opposite bulged.
- the layer stack 8 is preferably arranged on the indented side edge, since the current injection is better here than in the bulged side edge.
- part of the heat dissipation layers 3 may be free of layer stacks 8.
- the unpopulated heat dissipation layers 3 are preferably integrated into the series connection, so that advantageously also a layer stack 8 surrounded by unpopulated heat dissipation layers 3 can be supplied with electrical comparatively simple.
- FIG. 8c shows a cross-sectional view of the component composite 13 already described in connection with FIG. 8a.
- the component composite 13 comprises a plurality of layer stacks 8, which are arranged on a common carrier layer 2 and are each mechanically and electrically connected to a first heat dissipation layer 3 and a second heat dissipation layer 3 adjacent to the first heat dissipation layer 3. are connected. Both electrical contacts are in this case on the .jesper heat dissipation layers 3 facing side of the layer stack 8.
- a complete connection of the layer stacks 8 can take place by means of a complete bridging of adjacent heat dissipation layers 3 by means of a plurality of layer stacks 8.
- both electrical contacts of the layer stacks 8 are arranged on the side facing the carrier layer 2.
- the carrier layer 2 contains in this case electrically insulating material, in particular a plastic material, and further comprises openings for plated-through holes.
- the carrier layer 2 is a plastic film.
- the base 15, with which the carrier layer 2 is mechanically and thermally connected, is preferably a metal foil, so that a first electrical connection of the layer stacks 8 takes place by means of the base 15.
- a second electrical connection of the layer stacks 8 is possible by means of the heat dissipation layer (not shown) applied to the carrier layer 2.
- the methods for wireless contacting used in the invention require no. adjusted bonding process. Furthermore, the arrangement of the heat dissipation layer serving as a conductor track and the further conductor track on one side of the component enables a simple contacting of the thin-film semiconductor component.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Laminated Bodies (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102006036543 | 2006-08-04 | ||
DE102007004303A DE102007004303A1 (de) | 2006-08-04 | 2007-01-29 | Dünnfilm-Halbleiterbauelement und Bauelement-Verbund |
PCT/DE2007/001273 WO2008014750A2 (de) | 2006-08-04 | 2007-07-16 | Dünnfilm-halbleiterbauelement und bauelement-verbund |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2047525A2 true EP2047525A2 (de) | 2009-04-15 |
Family
ID=38596017
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07785643A Withdrawn EP2047525A2 (de) | 2006-08-04 | 2007-07-16 | Dünnfilm-halbleiterbauelement und bauelement-verbund |
Country Status (8)
Country | Link |
---|---|
US (1) | US8872330B2 (zh) |
EP (1) | EP2047525A2 (zh) |
JP (1) | JP5517616B2 (zh) |
KR (1) | KR101386303B1 (zh) |
CN (1) | CN101542752B (zh) |
DE (1) | DE102007004303A1 (zh) |
TW (1) | TWI378571B (zh) |
WO (1) | WO2008014750A2 (zh) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005055293A1 (de) | 2005-08-05 | 2007-02-15 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von Halbleiterchips und Dünnfilm-Halbleiterchip |
DE102007004303A1 (de) | 2006-08-04 | 2008-02-07 | Osram Opto Semiconductors Gmbh | Dünnfilm-Halbleiterbauelement und Bauelement-Verbund |
DE102007004304A1 (de) | 2007-01-29 | 2008-07-31 | Osram Opto Semiconductors Gmbh | Dünnfilm-Leuchtdioden-Chip und Verfahren zur Herstellung eines Dünnfilm-Leuchtdioden-Chips |
DE102007017113A1 (de) | 2007-01-31 | 2008-08-07 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement mit einer optisch aktiven Schicht, Anordnung mit einer Vielzahl von optisch aktiven Schichten und Verfahren zur Herstellung eines Halbleiterbauelements |
DE102007041896A1 (de) | 2007-09-04 | 2009-03-05 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements |
DE102008013030A1 (de) | 2007-12-14 | 2009-06-25 | Osram Opto Semiconductors Gmbh | Strahlungsemittierende Vorrichtung |
DE102008026841A1 (de) * | 2008-02-22 | 2009-08-27 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauteil |
DE102008030815A1 (de) | 2008-06-30 | 2009-12-31 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung einer Vielzahl von optoelektronischen Bauelementen |
KR101755966B1 (ko) * | 2013-02-28 | 2017-07-07 | 미쓰비시덴키 가부시키가이샤 | 방열 구조 및 광 송수신기 |
JP2014204029A (ja) * | 2013-04-08 | 2014-10-27 | 立山科学工業株式会社 | Led実装用基板 |
DE102014104230A1 (de) | 2014-03-26 | 2015-10-01 | Osram Opto Semiconductors Gmbh | Strahlungsemittierendes Bauteil und Verfahren zur Herstellung eines strahlungsemittierenden Bauteils |
US11396199B2 (en) | 2015-03-23 | 2022-07-26 | Stora Enso Oyj | Inkjet ink receptive coating comprising esterified or etherified starch and laponite |
DE102017112223A1 (de) * | 2017-06-02 | 2018-12-06 | Osram Opto Semiconductors Gmbh | Halbleiterlaser-Bauteil und Verfahren zur Herstellung eines Halbleiterlaser-Bauteils |
DE102019106546A1 (de) * | 2019-03-14 | 2020-09-17 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur herstellung von optoelektronischen halbleiterbauteilen und optoelektronisches halbleiterbauteil |
US10854530B1 (en) * | 2019-07-31 | 2020-12-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Heat dissipation structures |
WO2022053548A1 (de) * | 2020-09-14 | 2022-03-17 | Saint-Gobain Glass France | Verfahren und vorrichtung zum beschichten einer gebogenen scheibe mit einem photosensitiven material |
US11887908B2 (en) | 2021-12-21 | 2024-01-30 | International Business Machines Corporation | Electronic package structure with offset stacked chips and top and bottom side cooling lid |
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- 2007-07-16 US US12/376,425 patent/US8872330B2/en not_active Expired - Fee Related
- 2007-07-16 KR KR1020097004412A patent/KR101386303B1/ko not_active IP Right Cessation
- 2007-07-16 JP JP2009522082A patent/JP5517616B2/ja not_active Expired - Fee Related
- 2007-07-16 WO PCT/DE2007/001273 patent/WO2008014750A2/de active Application Filing
- 2007-07-16 EP EP07785643A patent/EP2047525A2/de not_active Withdrawn
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Also Published As
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KR20090035040A (ko) | 2009-04-08 |
JP5517616B2 (ja) | 2014-06-11 |
KR101386303B1 (ko) | 2014-04-17 |
TW200816524A (en) | 2008-04-01 |
DE102007004303A1 (de) | 2008-02-07 |
CN101542752B (zh) | 2014-01-22 |
JP2009545863A (ja) | 2009-12-24 |
TWI378571B (en) | 2012-12-01 |
US8872330B2 (en) | 2014-10-28 |
WO2008014750A3 (de) | 2008-06-12 |
US20100163915A1 (en) | 2010-07-01 |
WO2008014750A2 (de) | 2008-02-07 |
CN101542752A (zh) | 2009-09-23 |
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