EP1684437A1 - Empfangsvorrichtung und empfangsverfahren - Google Patents

Empfangsvorrichtung und empfangsverfahren Download PDF

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Publication number
EP1684437A1
EP1684437A1 EP04819827A EP04819827A EP1684437A1 EP 1684437 A1 EP1684437 A1 EP 1684437A1 EP 04819827 A EP04819827 A EP 04819827A EP 04819827 A EP04819827 A EP 04819827A EP 1684437 A1 EP1684437 A1 EP 1684437A1
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EP
European Patent Office
Prior art keywords
gain
reception
received signal
time slot
section
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Granted
Application number
EP04819827A
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English (en)
French (fr)
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EP1684437B1 (de
EP1684437A4 (de
Inventor
Yoshito Matsushita Electr.Ind.Co. Ltd. SHIMIZU
Noriaki Matsushita Electr.Industrial Co.Ltd SAITO
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Panasonic Corp
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Matsushita Electric Industrial Co Ltd
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Publication of EP1684437A4 publication Critical patent/EP1684437A4/de
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/04—TPC
    • H04W52/06—TPC algorithms
    • H04W52/08—Closed loop power control
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3052—Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/04—TPC
    • H04W52/06—TPC algorithms
    • H04W52/10—Open loop power control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/04—TPC
    • H04W52/06—TPC algorithms
    • H04W52/14—Separate analysis of uplink or downlink
    • H04W52/143—Downlink power control

Definitions

  • the present invention relates to a reception apparatus and a reception method, and more particularly, to a reception apparatus and a reception method for use in a system where transmit power of transmission signals varies by downlink transmit power control.
  • GSM Global System for Mobile communications
  • GPRS General Packet Radio Service
  • FIG.1 shows an allocation of time slots foramobilestation.
  • representative classes up to class 12 are excerpted and described from 29 multi-slot classes described in a GSM specification "Digital cellular telecommunications system (Phase 2+); Multiplexing and Multiple Access on the Radio Path (3GPP TS 05.02 ver 8.11.0 Release 1999)."
  • FIG.1 shows a maximum number of time slots that can be allocated to a downlink (reception), uplink (transmission) and a maximum number of time slots that can be allocated to the downlink and uplink together for a mobile station which corresponds to each multi-slot class. For example, it is possible to allocate a maximum of 5 slots to the downlink and uplink together, a maximum of 4 slots to the downlink and a maximum of 4 slots to the uplink within 1 frame for the mobile station of class 12.
  • the respective mobile stations share time slots allocated to multi-slot classes, demodulate all data in the time slots, and then decide whether the TFI (Temporary Flow Identifier) in header information of the data indicates the subject mobile station or not, and discard the data if the data is directed to other mobile stations. In this way, each mobile station receives time slots allocated to the multi-slot class.
  • TFI Temporal Flow Identifier
  • a TFI is described in 5 bits, and therefore one time slot can be shared by a maximum of 32 mobile stations.
  • the distance between the base transceiver station and each mobile station differs from one mobile station to another, and therefore it is necessary for the base transceiver station to carry out transmission to each mobile station with transmit power so that the farthest mobile station in the cell can receive data in predetermined quality.
  • unnecessary power is radiated to the cell and interference with cells covered by adjacent base transceiver stations becomes a problem.
  • FIG.2 is a GSM network configuration.
  • a GSM network is configured with telephone network 11 of fixed-line phones, mobile services switching center (MSC) 12, base station controllers (BSC) 13, 14, 15, base transceiver stations (BTS) 16, 17, 18 and mobile stations (MS) 21, 22, 23, 24, 25 which exist in respective cells 19, 20 covered by base transceiver stations 17, 18.
  • MSC mobile services switching center
  • BSC base station controllers
  • BTS base transceiver stations
  • MS mobile stations 21, 22, 23, 24, 25 which exist in respective cells 19, 20 covered by base transceiver stations 17, 18.
  • the GSM system is provided with at least one mobile services switching center 12 and mobile services switching center 12 is connected to telephone network 11.
  • a plurality of base station controllers 13, 14, 15 are provided below mobile services switching center 12 and at least one base transceiver station 16, 17, 18 is provided below base station controllers 13, 14, 15 and communication is carried out between the base transceiver stations.
  • radio communication is carried out between base transceiver stations 17, 18 and mobile stations 21, 22, 23, 24, 25 in cells 19, 20 covered by the base transceiver station 17, 18.
  • communication is possible, for example, between mobile station 22 in cell 19 and mobile station 24 in cell 20 or between mobile station 23 and telephone network 11.
  • GPRS realizes downlink transmit power control (hereinafter, referred to as "power control") to corresponding mobile stations according to the distance between base transceiver station 17 and mobile stations 21, 22, 23.
  • power control include a method of reporting a decrement value (0 to 30 dB) of transmit power from a broadcast channel (BCCH: Broadcast Control CHannel) to a mobile station using a P0 parameter in a resource allocation message of the downlink which is transmitted on a control channel.
  • BCCH is an important channel which all mobile stations existing in the cell should refer to and is transmitted with a sufficient transmission level (POWbcch: a fixed value) that even the mobile station at the maximum distance from the base transceiver station can reproduce data reliably.
  • the received signal strength indicator (RSSI) with which the specific mobile station receives data fluctuates significantly. For this reason, to prevent the mobile station from saturating or to maintain the reception quality to a predetermined value, it is necessary to perform gain switching between adj acent time slots at high speed.
  • RSSI received signal strength indicator
  • offset voltage DC offset voltage
  • FIG.3 is a block diagram of conventional offset voltagecalibrationcircuit30.
  • offset voltage calibration circuit 30 is configured with low noise amplifier 31, quadrature demodulator 32 that converts the frequency of a radio frequency to a baseband, 90-degree phase shifter 33 that outputs 2 signals having a phase difference of 90 degrees for quadrature demodulator 32, analog baseband circuit 34 made up of variable gain amplifiers and low pass filters, voltage calibration circuit 35 that calibrates offset voltage of analog baseband circuit 34 and digital signal processing section 36 that converts the signal received from analog baseband circuit 34 to a voice signal or data signal and transmits a calibration start signal to voltage calibration circuit 35 via a decoder.
  • Voltage calibration circuit 35 executes calibration operation for a certain period using a calibration start signal as a trigger immediately before the frame and pauses during the frame. Furthermore, in the calibrating period, voltage calibration circuit 35 separates a capacitor from the signal line to improve the calibration response speed.
  • FIG.4 is a block diagram of reception apparatus 40 that supports conventional multi-slot transmission.
  • reception apparatus 40 is configured with RF input section 41, automatic gain control circuit 42 that controls the gain of RF input section 41, sampling circuit 43, digital signal processor (hereinafter, referred to as "DSP") 44 and control section 45.
  • DSP digital signal processor
  • Sampling circuit 43 periodically samples RSSIs of a plurality of time slots received by RF input section 41 and transmits the sampled RSSIs to DSP 44.
  • DSP 44 generates an average RSSI of each time slot included in 1 frame and transmits the result to control section 45.
  • Control section 45 further averages the average RSSIs of all received time slots and obtains a gain value. Then, control section 45 transmits the obtained gain value to the automatic gain control circuit as an AGC signal and performs reception operation.
  • the conventional apparatus executes offset voltage calibration in frame units, such a case where the base transceiver station executes power control is not assumed. That is, when RSSI differs between time slots in the same frame according to power control, each mobile station executes gain switching such that the signal level falls within a linear operation range of the reception apparatus, but there is a problem that offset voltage that is newly generated due to high-speed gain switching is amplified by an amplifier located in circuit later than the place where the offset voltage is generated and leads to saturation and sensitivity degradation of the reception apparatus.
  • the conventional apparatus when performing power control, the conventional apparatus needs to perform gain switching of the mobile station reception section during a guard time of approximately 30 [us] provided at the rearmost of each time slot to prevent saturation and sensitivity degradation of the reception apparatus and realize accurate demodulation.
  • a guard time of approximately 30 [us] provided at the rearmost of each time slot to prevent saturation and sensitivity degradation of the reception apparatus and realize accurate demodulation.
  • offset voltage calibration is performed every time after the gain is switched to a desired value immediately before the time slot during which demodulation is performed, there is a problem that the amount of current consumption at the calibration circuit increases.
  • the conventional apparatus is not vulnerable to influences of fading or the like during multi-slot transmission and can stably receive signals of a plurality of time slots within 1 frame with the same gain setting.
  • the conventional apparatus does not assume the case where power control is performed, and, if the same gain is set in 1 frame during multi-slot reception, there is a problem that the dynamic range required for the reception apparatus expands in line with the dynamic range of power control (a maximum of 30 dB in GPRS), resulting in a problem that power consumption of the reception apparatus increases or the reception apparatus is saturated.
  • the reception apparatus of the present invention adopts a configuration having a gain estimation section that estimates a gain for amplifying a received signal in a predetermined reception period to a predetermined reference value for each time slot before the reception period, a gain control section that selects a maximum gain from gains for respective time slots estimated by the gain estimation section and performs gain control over the received signal and a voltage calibration section that calibrates offset voltage of the received signal before the reception period at the maximum gain selected by the gain control section.
  • the reception method of the present invention has steps of estimating a gain for amplifying a received signal in a predetermined reception period to a predetermined reference value for each time slot before the reception period, selecting a maximum gain from gains for respective estimated time slots and performing gain control over the received signal and calibrating offset voltage of the received signal before the reception period at the selected maximum gain.
  • the semiconductor integrated circuit apparatus of the present invention adopts a configuration having a gain estimation circuit that estimates a gain for amplifying a received signal in a predetermined reception period to a predetermined reference value for each time slot before the reception period, a gain control circuit that selects a maximum gain from gains for respective time slots estimated by the gain estimation circuit and performs gain control over the received signal and a voltage calibration circuit that calibrates offset voltage of the received signal before the reception period at the maximum gain selected by the gain control circuit.
  • the present invention it is possible to prevent saturation and sensitivity degradation of a reception apparatus and calibrate offset voltage without increasing current consumption when power control is performed in multi-slot transmission.
  • An essence of the present invention is to set a gain for each time slot in a predetermined reception period (1 frame) before the reception period, perform gain control of a received signal before a reception operation at the maximum gain out of the set gains, calibrate offset voltage of the received signal after the gain control at the maximum gain and before the reception operation and perform gain control of the received signal after the calibration operation of the offset voltage at a gain equal to or below the maximum gain set in each time slot during the reception operation for each time slot.
  • Low noise amplifier 101 amplifies a received signal and outputs the result to quadrature demodulator 103 via capacitor 102 that removes the DC component.
  • Quadrature demodulator 103 has mixer 103a and mixer 103b, converts the frequency of the received signal inputted from capacitor 102 from a radio frequency to a baseband, outputs the baseband from mixer 103a to analog baseband circuit 105a and at the same time outputs the baseband from mixer 103b to analog baseband circuit 105b.
  • Phase shifter 104 generates two signals which have a phase difference of 90 degrees mutually from a local oscillation signal inputted from a local oscillation source (not shown) and outputs the two signals to mixer 103a and mixer 103b of quadrature demodulator 103 respectively.
  • Analog baseband circuits 105a, 105b are composed of a variable gain amplifier and a low pass filter and when the reception field intensity changes from a sensitivity point to an intense electric field, analog baseband circuits 105a, 105b reduce the gain of the received signal inputted from quadrature demodulator 103 one by one starting from the later circuits based on the control of gain control circuit 110 and outputs the received signal to digital signal processing section 106.
  • analog baseband circuits 105a, 105b calibrate the offset voltage of the received signal based on the control of voltage calibration circuit 111 .
  • Analog baseband circuit 105a and analog baseband circuit 105b have the same configuration. Details of analog baseband circuits 105a, 105b will be described later.
  • Digital signal processing section 106 reproduces transmission data from the base transceiver station based on the received signal inputted from analog baseband circuits 105a, 105b and displays data on a display section (not shown) or outputs voice to a speaker (not shown) . Furthermore, digital signal processing section 106 outputs a calibration start signal to start calibration of an offset voltage at predetermined timing to voltage calibration circuit 111. Furthermore, digital signal processing section 106 measures an RSSI from the received signal of BCCH which is transmitted from the base transceiver station or time slots for data reception and outputs the measurement result to field intensity measurement section 108. Moreover, digital signal processing section 106 outputs demodulated data to transmit power information extraction section 107.
  • Transmit power information extraction section 107 extracts transmit power information (e.g., P0 parameter) for each time slot from the demodulated data inputted from digital signal processing section 106 and outputs the result to gain setting section 109.
  • P0 parameter transmit power information
  • Field intensity measurement section 108 is a reception quality measurement section and reduces the influence of fading using a publicly known method from the measurement result of the RSSI inputted from digital signal processing section 106, obtains the received signal level of BCCH which becomes the control reference of base transceiver station transmit power for each time slot and outputs the obtained information of the BCCH level to gain setting section 109.
  • Gain setting section 109 is a gain estimation section and estimates the reception field intensity of each time slot from information of the reception field intensity of BCCH which becomes the control reference of base transceiver station transmit power for each time slot inputted from field intensity measurement section 108 and transmit power information at each time slot inputted from transmit power information extraction section 107 and calculates a gain set value according to the estimated reception field intensity. For example, gain setting section 109 sets a gain to amplify the received signal of the transmit power estimated by subtracting an incremented/decremented value of the base transceiver station transmit power acquired from the transmit power information from the reception field intensity of BCCH to the reference value for each time slot. Then, gain setting section 109 outputs gain information which is information of the gains of the respective set time slots to gain control circuit 110. At this time, gain setting section 109 sets a gain for amplifying the received signal to a predetermined reference value through a plurality of stages one by one in analog baseband circuits 105a, 105b having a multi-stage circuit configuration.
  • Gain control circuit 110 is a gain control section and extracts a maximum gain from the gain information inputted from gain setting section 109 and outputs the result to analog baseband circuits 105a, 105b as a set gain for a calibration operation of the offset voltage. Furthermore, gain control circuit 110 temporarily stores the gain set value which corresponds to each time slot, sequentially outputs the gain set values corresponding to the respective time slots to analog baseband circuits 105a, 105b immediately before the respective time slots and performs gain control. Furthermore, gain control circuit 110 performs gain control every stage of analog baseband circuits 105a, 105b having the multi-stage circuit configuration. The gain setting method for the calibration operation of offset voltage will be described later.
  • voltage calibration circuit 111 When a calibration start signal is inputted at predetermined timing from digital signal processing section 106, voltage calibration circuit 111, which is a voltage calibration section, performs calibration operation of the offset voltage produced in the received signal of analog baseband circuits 105a, 105b. In this case, voltage calibration circuit 111 calibrates the offset voltage every stage of analog baseband circuits 105a, 105b having a multi-stage circuit configuration.
  • FIG. 6 is a block diagram showing the configuration of analog baseband circuit 105a. Since the configurations of analog baseband circuit 105a and analog baseband circuit 105b are the same, explanations of the configuration of analog baseband circuit 105b will be omitted.
  • Analog baseband circuit 105a is configured with multi-stage circuits in 3 stages; variable gain amplifier 201 and filter 202 constituting first stage circuit 207, variable gain amplifier 203 and filter 204 constituting second stage circuit 208 and variable gain amplifier 205 and filter 206 constituting third stage circuit 209.
  • First stage circuit 207 is a circuit before second stage circuit 208 and third stage circuit 209
  • second stage circuit 208 is a circuit after first stage circuit 207 and before third stage circuit 209
  • third stage circuit 209 is a circuit after first stage circuit 207 and second stage circuit 208.
  • Variable gain amplifier 201 calibrates the offset voltage of the received signal inputted from mixer 103a based on the control of voltage calibration circuit 111. Furthermore, variable gain amplifier 201 sets the received signal inputted from mixer 103a to a predetermined gain based on the control of gain control circuit 110 and outputs the result to filter 202.
  • Filter 202 allows only a predetermined band of the received signal inputted from variable gain amplifier 201 to pass, and outputs the result to variable gain amplifier 203.
  • Variable gain amplifier 203 calibrates the offset voltage of the received signal inputted from filter 202 based on the control of voltage calibration circuit 111. Furthermore, variable gain amplifier 203 sets the received signal inputted from filter 202 to a predetermined gain based on the control of gain control circuit 110 and outputs the result to filter 204.
  • Filter 204 allows only a predetermined band of the received signal inputted from variable gain amplifier 203 to pass, and outputs the result to variable gain amplifier 205.
  • Variable gain amplifier 205 calibrates the offset voltage of the received signal inputted from filter 204 based on the control of voltage calibration circuit 111. Furthermore, variable gain amplifier 205 sets the received signal inputted from filter 204 to a predetermined gain based on the control of gain control circuit 110, and outputs the result to filter 206.
  • Filter 206 allows only a predetermined band of the received signal inputted from variable gain amplifier 205 to pass, and outputs the result to digital signal processing section 106.
  • analog baseband circuits 105a, 105b allow the received signal to pass through first stage circuit 207, second stage circuit 208 and third stage circuit 209, thereby eliminating unnecessary band components and amplifying the received signal so as to obtain the gain set by digital signal processing section 106.
  • FIG.7 shows the downlink frame configuration in GPRS in which a plurality of mobile stations share the same frequency channel
  • FIG. 8 shows the configuration of consecutive downlink time slots in GPRS
  • FIG. 9 is a schematic view showing transmit power when power control is performed in multi-slot transmission.
  • FIG.7 shows the frame configurations of frame #301 and frame #302 which are predetermined reception periods.
  • the horizontal axis is time.
  • frame #301 contains downlink information for a desired mobile station and frame #302 is a frame immediately before frame #301.
  • frequency channels #303, #304, #305 are channels of different downlink frequencies and time slots #310 to #317 are eight time slots which make up frame #301.
  • time slot #318 is the rearmost time slot of frame #302 and a free time space which contains no effective data and which is called "guard time” is provided at the rearmost of each time slot.
  • FIG.8 shows the configurations of time slot #318 and time slot #310, where time slot #318 has guard time #401 at the rearmost and time slot #310 has guard time #402 at the rearmost.
  • Frame #301 is received later than frame #302 and the time slots and the frames are received later in accordance with described in the right in FIG.7 and FIG.8.
  • the horizontal axis is time and the vertical axis is transmit power intensity at the output end of the base transceiver station antenna corresponding to time slots #310, #311, #312, #313 in FIG.7.
  • FIG.9 as an example of power control inmulti-slot transmission, a case is assumed where data in time slots #310, #311, #312 and #313 are transmitted to mobile stations #501, #502, #503 respectively.
  • time slot #310 is allocated to mobile station #501
  • time slots #310 to #313 are allocated to mobile station #502
  • time slots #312, #313 are allocated to mobile station #503.
  • mobile stations #501, #502 receive time slot #310
  • mobile station #502 receives time slot #311
  • mobile stations #502, #503 receive time slots #312, #313.
  • the distance between the mobile station and the base transceiver station increases in the order of the mobile station to which time slot #311 is allocated, the mobile station to which time slot #312, #313 is allocated, and the mobile station to which time slot #310 is allocated. Therefore, suppose that among the time slots executing downlink transmission out of time slots #310, #311, #312, #313, #314, #315, #316, #317 of frame #301, the transmit power at time slot #310 is the largest and the transmit power at time slot #311 is the smallest.
  • reception apparatus 100 of mobile station #502 measures RSSI of BCCH transmitted from the base transceiver station communicating with reception apparatus 100 in time slots other than the downlink time slots and uplink time slot allocated to reception apparatus 100 in frame #302 or an idle frame which contains no effective data (not shown in FIG.7.)
  • Field intensity measurement section 108 reduces the influence of fading using a publicly known technology from the RSSI measurement value obtained before frame #301 and obtains the reception field intensity (POWbcch) of BCCH which becomes a control reference of the base transceiver station transmit power for each time slot in frame #301 and outputs the result to gain control circuit 110.
  • the transmit power information of time slot #310 is P0 (#310)
  • the transmit power information of time slot #311 is PO(#311)
  • the transmit power information of time slot #312 is PO(#312)
  • the transmit power information of time slot #313 is PO(#313)
  • gain setting section 109 performs calculations of POWbcch-PO(#310), PoWbcch-PO(#311), POWbcch-PO(#312) using POWbcch inputted from field intensity measurement section 108 as a reference.
  • the set gain of each corresponding time slot is obtained from the calculation result of POWbcch-PO(#310), POWbcch-PO(#311), POWbcch-PO(#312). Furthermore, as the set gain for the calibration operation of the offset voltage carried out in guard time #401 immediately before frame #301, a maximum gain (Gmax [dB]) in frame #301 is obtained using a set gain when the P0 parameter is a maximum. For example, in guard time #401 provided at the rearmost of time slot #318 in frame #302 in FIG.7, the P0 parameter which is the transmit power information of time slots #310 to #317 in frame #301 is compared.
  • gain control circuit 110 selects the gain set value which corresponds to time slot #311 and sets it as gain information (Gmax[dB]) for the calibration operation of the offset voltage.
  • gain control circuit 110 outputs gain information (Gmax[dB]) to analog baseband circuits 105a, 105b and sets a gain for the calibration operation and after that, a calibration start signal is transmitted from digital signal processing section 106.
  • Voltage calibration circuit 111 realizes a calibration operation in the above guard time using the calibration start signal as a trigger and then pauses in a period other than the guard time (not shown) at the rearmost of time slot #317 in frame #301.
  • gain control circuit 110 outputs the gain information set to a desired value (G1 [dB]) for time slot #310 to analog baseband circuits 105a, 105b and thereby sets the gain of time slot #310.
  • time slot #310 is received.
  • gain control circuit 110 After the reception of time slot #310 is completed, in a guard time (not shown) provided at the rearmost of time slot #310, gain control circuit 110 outputs the gain information set to a desired value (G2[dB]) for time slot #311 and sets gains of analog baseband circuits 105a, 105b.
  • G2[dB] desired value
  • reception of time slot #313 Similar operations are repeated.
  • the guard time included in time slot #317 at the rearmost of frame #301 calibration operation of the offset voltage is carried out following the same procedure as that carried out immediately before frame #301. The operation during frame reception after that is the same as the operation upon the reception of frame #301 and explanations thereof will be omitted.
  • Means for realizing variable gains of variable gain amplifiers 201, 203, 205 of analog baseband circuits 105a, 105b includes a method of switching the ratio of the resistance value at the input section or the output section of variable gain amplifiers 201, 203, 205.
  • variable gain amplifier 201 When only variable gain amplifier 201 is focused, if the voltage gain of variable gain amplifier 201 is G3[dB] and offset voltage ( ⁇ V0) occurs at the output of variable gain amplifier 201, the offset voltage of the input section of variable gain amplifier 201 is expressed as shown in Expression (1).
  • the gain switching method of making input resistance variable makes the above voltage drop variable, and a remaining offset voltage of the offset voltage occurs at the input section of variable gain amplifier 201. Then, the remaining offset voltage of the input section of variable gain amplifier 201 is amplified by variable gain amplifier 201 by the gain and makes the calibration operation invalid.
  • the gain switching method of making output resistance variable to prevent the occurrence of the above residual offset voltage.
  • FIG.10 and FIG. 11 show gain distribution of variable gain amplifiers 201, 203, 205 at analog baseband circuits 105a and 105b and a total gain of analog baseband circuits 105a and 105b when the gains are set.
  • FIG.10 and FIG.11 show examples where the point at which the total gain is 15 [dB] is a sensitivity point and the electric field gradually becomes more intensive in accordance with the total gain approaching 0[dB] from 15[dB].
  • variable gain amplifiers 201, 203, 205 of the respective stages are not necessarily switched in the direction in which the gain is reduced.
  • the maximum gain required for analog baseband circuits 105a, 105b is 15[dB] and the minimum gain is 0 [dB]
  • the total gain of analog baseband circuits 105a, 105b changes from 10[dB] to 5[dB]--that is, when transmit power information extraction section 107 estimates a maximum set gain for each frame and sets 10 [dB] as the gain for the calibration of the offset voltage and a set gain of 5[dB] is necessary within a desired time slot--the gain of variable gain amplifier 203 is on the increase and the remaining offset voltage may expand.
  • variable gain amplifiers 201, 203, 205 are fixed or on the decrease, and it is possible to restrain the expansion of the remaining offset voltage.
  • variable gain amplifiers 201, 203, 205 When the maximum set gain of each variable gain amplifier is greater in the actual product or when a variable gain amplifier is further connected after the variable gain amplifier 205, a big problem occurs due to the remaining offset voltage of variable gain amplifier 203. Therefore, it is desirable to set a gain upon the calibration operation of the offset voltage of variable gain amplifiers 201, 203, 205 of the respective stages so that the gain is sequentially reduced from the later circuit as shown in FIG.11.
  • a maximum gain in frame #301 is estimated based on the maximum value extracted from the transmit power information reported from the base transceiver station, gain control is performed upon the calibration operation of the offset voltage at the estimated maximum gain, and the set gain in the case of gain control upon the reception operation after the completion of the calibration operation of the offset voltage is made lower than the set gain in the case of gain control upon the calibration operation of the offset voltage. Therefore it is possible to minimize the influence of the remaining offset voltage in gain control in the reception operation. This makes it possible to prevent saturation and sensitivity degradation of the reception apparatus even when power control is performed in multi-slot transmission and calibrate the offset voltage without increasing current consumption. Furthermore, even when power control is performed in multi-slot transmission, accurate gain switching can be realized during the reception operation.
  • FIG.12 shows a time slot of a received signal in GPRS received by the reception apparatus of this Embodiment 2.
  • the reception apparatus in this Embodiment 2 has the same configuration as that in FIG.5 and detailed explanations thereof will be omitted.
  • the time slot of the received signal in GPRS is composed of header field 801 and data field 802.
  • gain control circuit 110 estimates a maximum gain (Gmax[dB]) in frame #301 using a set gain when the P0 parameter reported from the base transceiver station before the frame is a maximum.
  • gain control circuit 110 generates Gmax+10 [dB] as gain information based on set maximum gain Gmax. But, when Gmax+10 [dB] is greater than the maximum total gain (Gtotal [dB]) of analog baseband circuits 105a, 105b, Gtotal[dB] is regarded as gain information. The rest of the operations are the same as in above Embodiment 1 and explanations thereof will be omitted.
  • a maximum gain in frame #301 is estimated in frame #302 immediately before frame #301 based on the transmit power information reported from the base transceiver station and a gain higher than the estimated maximum gain by 10[dB] is set as the gain for the calibration operation of an offset voltage. Therefore it is possible to prevent saturation and sensitivity degradation of the reception apparatus even when more efficient power control satisfying the GSM specification is performed, and perform the offset voltage calibration without increasing current consumption.
  • FIG.13 is a block diagram showing the configuration of reception apparatus 1300 according to Embodiment 3 of the present invention.
  • Reception apparatus 1300 according to this Embodiment 3 is a direct conversion reception apparatus and adds comparison section 1301 as shown in FIG.13 to reception apparatus 100 according to Embodiment 1 shown in FIG.5.
  • Parts in FIG.13 having the same configuration as those in FIG.5 are assigned the same reference numerals and explanations thereof will be omitted.
  • Field intensity measurement section 108 reduces the influence of fading from the measurement result of RSSI inputted from digital signal processing section 106 using a publicly knownmethod, obtains the received signal level of BCCH which becomes control reference of base transceiver station transmit power for each time slot and outputs the obtained BCCH level information to gain setting section 109. Furthermore, when information of the time slot to be excluded, which is information of the time slot with a minimum gain which is not added upon calculation of BCCH level information is received from comparison section 1301, field intensity measurement section 108 does not include the RSSI upon reception of the time slot of the information of the time slot to be excluded when BCCH level information is calculated.
  • Gain setting section 109 estimates the reception field intensity of each time slot from the information of the reception field intensity of BCCH which becomes the control reference of base transceiver station transmit power for each time slot inputted from field intensity measurement section 108 and transmit power information at each time slot inputted from transmit power information extraction section 107 and calculates a gain set value according to the estimated reception field intensity. For example, gain setting section 109 sets a gain for amplifying the received signal of the transmit power estimated by subtracting an incremented/decremented value of the base transceiver station transmit power acquired from the transmit power information from the reception field intensity of BCCH to a reference value for each time slot. Then, gain setting section 109 outputs the gain information which is information of the set gain of each time slot to gain control circuit 110 and comparison section 1301. Time slots of the information of time slots to be excluded are excluded upon a calculation of RSSI where long-period integration is performed, but the gain of the time slot of the information of the time slot to be excluded is also set when gain of instantaneous time slots are set.
  • Comparison section 1301 calculates an average of gain values from gain values of gain information for each time slot in the frame inputted from gain setting section 109 and calculates an average gain value and at the same time obtains a minimum gain value out of the gain values of the gain information. Then, comparison section 1301 refers to the average gain value and the minimum gain value, and, when the difference between the average gain value and the minimum gain value is equal to or greater than a predetermined value (first threshold value), transmits information of the time slot to be excluded to field intensity measurement section 108 so that the RSSI upon the reception of the time slot with a minimum gain is not added when the BCCH level information is calculated assuming that the reception power has been incremented/decremented by power control.
  • first threshold value a predetermined value
  • this Embodiment 3 will show a method of excluding the RSSI during power control from the calculation of gain information.
  • this embodiment assumes a case where an interruption occurs with another mobile station at a greater distance from the base transceiver station than the subject mobile station by power control.
  • the RSSI is larger than upon a normal reception, that is, a set gain decreases.
  • comparison section 1301 When the difference between the average gain value and the minimum gain value extends to a predetermined value or above based on the average gain value indicating a normal reception time, comparison section 1301 outputs the RSSI measurement timing to be excluded to field intensity measurement section 108 as information of time slots to be excluded assuming that an anticipated urgent interruption occurs here.
  • Embodiment 4 The configuration of the reception apparatus according to Embodiment 4 of the present invention is the same as the configuration in FIG.13, and therefore this embodiment will be explained using FIG.13.
  • Comparison section 1301 obtains a maximum gain value and a minimum gain value from gain values of gain information for each time slot in a frame inputted from gain setting section 109. Then, comparison section 1301 refers to the maximum gain value and the minimum gain value, and, when the difference between the maximum gain value and the minimum gain value is a predetermined value (second threshold value) or above, comparison section 1301 assumes that an increment/decrement of reception power by power control has occurred and transmits information of time slots to be excluded to field intensity measurement section 108 so that the RSSI upon reception of time slots for which the above minimum gain value has been measured is not added when BCCH level information is calculated.
  • second threshold value predetermined value
  • This embodiment 4 will explain a method of excluding RSSI during power control from gain information calculation, which is a method different from that in Embodiment 3.
  • comparison section 1301 assumes that an urgent interruption explained in Embodiment 3 has occurred and outputs the RSSI measurement timing of time slots to be excluded to field intensity measurement section 108 as information of time slots to be excluded.
  • analog baseband circuits 105a, 105b are assumed to be constructed of multi-stage circuits having 3 stages, but the present invention is not limited to this and is applicable to multi-stage circuits having stages other than 3 stages, a circuit constructed of only one variable gain amplifier or constructed of one gain amplifier and one filter.
  • Embodiment 1 to Embodiment 4 assume that a maximum set gain at each time slot of the next 1 frame is estimated in a guard time of the time slot at the rearmost of each frame, but the present invention is not limited to this, and, it is also possible to estimate a maximum set gain in a plurality of the following frames for every plurality of frames or for every plurality of time slots or estimate a maximum gain at a plurality of the following time slots.
  • Embodiment 1 to Embodiment 4 assume that a maximum gain is estimated from a maximum value of a P0 parameter in frame #302 immediately before frame #301, but the present invention is not limited to this and if transmit power information is received in frames before frame #302, it is possible to estimate a maximum gain from a maximum value of the P0 parameter in an arbitrary frame before frame #302 after receiving transmit power information.
  • reception apparatuses 100, 1300 of above Embodiment 1 to Embodiment 4 can be applied to a communication terminal apparatus. Furthermore, reception apparatuses 100, 1300 of above Embodiment 1 to Embodiment 4 can not only use gain setting section 109 as a gain setting circuit but also be constructed as a semiconductor integrated circuit apparatus which has a circuit structure (large-scale integrated circuit (LSI)) incorporating circuits such as gain setting section 109, gain control circuit 110 and voltage calibration circuit 111 as a single unit on a single semiconductor substrate.
  • LSI large-scale integrated circuit
  • the reception apparatus and the reception method according to the present invention can prevent saturation and sensitivity degradation of a reception apparatus even when downlink transmit power control is performed and has the advantage of calibrating offset voltage without increasing current consumption and is useful in calibrating offset voltage.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Circuits Of Receivers In General (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Control Of Amplification And Gain Control (AREA)
EP04819827.9A 2003-12-01 2004-11-30 Empfangsvorrichtung und empfangsverfahren Not-in-force EP1684437B1 (de)

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PCT/JP2004/017785 WO2005055447A1 (ja) 2003-12-01 2004-11-30 受信装置及び受信方法

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009152394A1 (en) * 2008-06-12 2009-12-17 Qualcomm Incorporated Methods and systems of agc and dc calibration for ofdm/ofdma systems
WO2015070895A1 (en) * 2013-11-12 2015-05-21 Telefonaktiebolaget L M Ericsson (Publ) Improved receiver overload protection
WO2017049563A1 (en) * 2015-09-25 2017-03-30 Intel IP Corporation Circuit arrangement, mobile device and method for amplifying a signal
EP3968705A4 (de) * 2019-05-23 2022-07-06 ZTE Corporation Verstärkungsteuerungsverfahren und -vorrichtung und computerlesbares speichermedium

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007023654A1 (ja) * 2005-08-22 2007-03-01 Nec Corporation 移動体通信システム、移動体通信端末および移動体通信方法
JP4737458B2 (ja) * 2005-09-14 2011-08-03 日本電気株式会社 受信振幅補正回路及び受信振幅補正方法並びにそれを用いた受信機
KR101208526B1 (ko) * 2006-06-12 2012-12-05 엘지전자 주식회사 제어정보에 따라 통신을 수행하는 방법
US7990906B2 (en) * 2006-11-03 2011-08-02 Fujitsu Semiconductor Limited Frame structure for a relay station operating in mobile networks
US8824344B2 (en) * 2009-09-09 2014-09-02 Nec Corporation Time division duplex communication apparatus and reception interference preventing method thereof
JP5286333B2 (ja) 2010-08-06 2013-09-11 株式会社東芝 無線装置
WO2012149683A1 (zh) * 2011-05-05 2012-11-08 富士通株式会社 功率补偿的方法、用户设备及基站
JP6285396B2 (ja) * 2015-07-17 2018-02-28 ファナック株式会社 工作機械の実測定の要否を自動判定する熱変位補正装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000072441A1 (en) * 1999-05-24 2000-11-30 Level One Communications, Inc. Automatic gain control and offset correction
US20020160738A1 (en) * 2001-03-20 2002-10-31 Stephen Allott DC offset correction for use in a direct-conversion radio architecture

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05327599A (ja) 1992-05-20 1993-12-10 Fujitsu Ltd 送信電力制御方法
JPH09116360A (ja) 1995-10-20 1997-05-02 Fujitsu Ltd 自動利得制御増幅器
JP3911861B2 (ja) * 1998-07-22 2007-05-09 ソニー株式会社 通信方法、送信電力制御方法及び移動局
JP2001016638A (ja) 1999-06-30 2001-01-19 Nec Corp 無線通信装置、無線通信システム及び無線通信装置の自動利得制御方法
NO329890B1 (no) * 1999-11-15 2011-01-17 Hitachi Ltd Mobilkommunikasjonsapparat
JP4547084B2 (ja) 1999-11-15 2010-09-22 ルネサスエレクトロニクス株式会社 移動体通信機および送受信機
JP2001160835A (ja) 1999-12-02 2001-06-12 Matsushita Electric Ind Co Ltd 無線受信機
JP3636974B2 (ja) * 2000-07-03 2005-04-06 富士通株式会社 無線装置
US6654593B1 (en) * 2000-10-30 2003-11-25 Research In Motion Limited Combined discrete automatic gain control (AGC) and DC estimation
JP2002185398A (ja) 2000-12-18 2002-06-28 Sony Corp 送信電力制御方法およびシステム
JP3662527B2 (ja) * 2001-07-27 2005-06-22 松下電器産業株式会社 自動利得制御装置及び方法、無線通信装置
JP2003198404A (ja) * 2001-12-26 2003-07-11 Matsushita Electric Ind Co Ltd ダイレクトコンバージョン受信機及びこれを用いた移動無線機、並びにｒｆ信号の受信方法
US7136431B2 (en) * 2002-10-24 2006-11-14 Broadcom Corporation DC offset correcting in a direct conversion or very low IF receiver
US7295517B2 (en) * 2002-11-27 2007-11-13 Texas Instruments Incorporated Method and apparatus for channel quality metric generation within a packet-based multicarrier modulation communication system
JP4230762B2 (ja) * 2002-12-20 2009-02-25 株式会社ルネサステクノロジ ダイレクトコンバージョン受信機
JP5327599B2 (ja) * 2008-11-27 2013-10-30 シブヤマシナリー株式会社 パレット洗浄システム

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000072441A1 (en) * 1999-05-24 2000-11-30 Level One Communications, Inc. Automatic gain control and offset correction
US20020160738A1 (en) * 2001-03-20 2002-10-31 Stephen Allott DC offset correction for use in a direct-conversion radio architecture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2005055447A1 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009152394A1 (en) * 2008-06-12 2009-12-17 Qualcomm Incorporated Methods and systems of agc and dc calibration for ofdm/ofdma systems
US9219458B2 (en) 2008-06-12 2015-12-22 Qualcomm Incorporated Methods and systems of AGC and DC calibration for OFDM/OFDMA systems
WO2015070895A1 (en) * 2013-11-12 2015-05-21 Telefonaktiebolaget L M Ericsson (Publ) Improved receiver overload protection
US9814000B2 (en) 2013-11-12 2017-11-07 Telefonaktiebolaget Lm Ericsson (Publ) Receiver overload protection
WO2017049563A1 (en) * 2015-09-25 2017-03-30 Intel IP Corporation Circuit arrangement, mobile device and method for amplifying a signal
US10432160B2 (en) 2015-09-25 2019-10-01 Intel IP Corporation Circuit arrangement, mobile device and method for amplifying a signal
EP3968705A4 (de) * 2019-05-23 2022-07-06 ZTE Corporation Verstärkungsteuerungsverfahren und -vorrichtung und computerlesbares speichermedium

Also Published As

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EP1684437B1 (de) 2014-05-14
US20070082629A1 (en) 2007-04-12
CN1886900B (zh) 2014-03-12
WO2005055447A1 (ja) 2005-06-16
EP1684437A4 (de) 2013-01-23
US7907589B2 (en) 2011-03-15
CN1886900A (zh) 2006-12-27
JPWO2005055447A1 (ja) 2007-07-05
JP4220999B2 (ja) 2009-02-04

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