EP1396886A3 - Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung - Google Patents

Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung Download PDF

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Publication number
EP1396886A3
EP1396886A3 EP03027952A EP03027952A EP1396886A3 EP 1396886 A3 EP1396886 A3 EP 1396886A3 EP 03027952 A EP03027952 A EP 03027952A EP 03027952 A EP03027952 A EP 03027952A EP 1396886 A3 EP1396886 A3 EP 1396886A3
Authority
EP
European Patent Office
Prior art keywords
connector leads
semiconductor device
semiconductor chip
inner end
contact pads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03027952A
Other languages
English (en)
French (fr)
Other versions
EP1396886A2 (de
Inventor
Etsuo Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of EP1396886A2 publication Critical patent/EP1396886A2/de
Publication of EP1396886A3 publication Critical patent/EP1396886A3/de
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
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    • H01L2924/18165Exposing the passive side of the semiconductor or solid-state body of a wire bonded chip

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
EP03027952A 1995-06-21 1996-06-18 Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung Withdrawn EP1396886A3 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP17829695 1995-06-21
JP17829695 1995-06-21
EP96304531A EP0750342A3 (de) 1995-06-21 1996-06-18 Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
EP96304531A Division EP0750342A3 (de) 1995-06-21 1996-06-18 Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung

Publications (2)

Publication Number Publication Date
EP1396886A2 EP1396886A2 (de) 2004-03-10
EP1396886A3 true EP1396886A3 (de) 2004-07-07

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EP03027952A Withdrawn EP1396886A3 (de) 1995-06-21 1996-06-18 Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung
EP96304531A Ceased EP0750342A3 (de) 1995-06-21 1996-06-18 Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung

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EP96304531A Ceased EP0750342A3 (de) 1995-06-21 1996-06-18 Mit den inneren Enden der Verbindungsleiter auf der Oberfläche des Halbleiterchips aufliegende Halbleiteranordnung

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JPH10214933A (ja) * 1997-01-29 1998-08-11 Toshiba Corp 半導体装置とその製造方法
JP3638750B2 (ja) * 1997-03-25 2005-04-13 株式会社ルネサステクノロジ 半導体装置
JP3006546B2 (ja) 1997-06-12 2000-02-07 日本電気株式会社 半導体装置及びリードフレーム
JP3085278B2 (ja) * 1998-05-01 2000-09-04 日本電気株式会社 半導体装置の製造方法および半導体製造装置
JP2001156237A (ja) * 1999-11-25 2001-06-08 Mitsubishi Electric Corp リードフレーム及びそれを用いた樹脂封止型半導体装置
US6664649B2 (en) * 2001-02-28 2003-12-16 Siliconware Precision Industries Co., Ltd. Lead-on-chip type of semiconductor package with embedded heat sink
US7294533B2 (en) * 2003-06-30 2007-11-13 Intel Corporation Mold compound cap in a flip chip multi-matrix array package and process of making same
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Also Published As

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EP0750342A3 (de) 1997-10-08
KR970003884A (ko) 1997-01-29
EP0750342A2 (de) 1996-12-27
US5874783A (en) 1999-02-23
TW314650B (de) 1997-09-01
KR100473464B1 (ko) 2005-05-17
EP1396886A2 (de) 2004-03-10

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