EP1094379A1 - Régulateur de tension - Google Patents

Régulateur de tension Download PDF

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Publication number
EP1094379A1
EP1094379A1 EP00121869A EP00121869A EP1094379A1 EP 1094379 A1 EP1094379 A1 EP 1094379A1 EP 00121869 A EP00121869 A EP 00121869A EP 00121869 A EP00121869 A EP 00121869A EP 1094379 A1 EP1094379 A1 EP 1094379A1
Authority
EP
European Patent Office
Prior art keywords
voltage
vintgen
voltage generator
deactivation signal
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP00121869A
Other languages
German (de)
English (en)
Other versions
EP1094379B1 (fr
Inventor
Thilo Marx
Torsten Partsch
Thomas Hein
Patrick Heyne
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1094379A1 publication Critical patent/EP1094379A1/fr
Application granted granted Critical
Publication of EP1094379B1 publication Critical patent/EP1094379B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/465—Internal voltage generators for integrated circuits, e.g. step down generators

Definitions

  • the present invention relates to a device according to the preamble of claim 1, i.e. a voltage generator, which using a reference voltage generates a second voltage from a first voltage, and which can be deactivated using a deactivation signal is.
  • Such voltage generators are integrated, for example Circuits used to come from an unregulated external voltage to generate a regulated internal voltage.
  • a regulated internal voltage may be necessary, for example be so that the signal propagation times are independent of the external voltage are; the creation of such an internal Voltage is preferably used using a temperature and process-independent reference voltage.
  • Disable voltage generator For example, for test purposes it may be necessary to use the Disable voltage generator and / or in one high impedance state.
  • a voltage generator that uses a reference voltage a second (external) voltage generated (internal) voltage, and which one using of a deactivation signal can be deactivated in FIG. 2 shown.
  • the reference voltage Vref is from an outside of the Voltage generator VintGEN provided reference voltage generator VrefGEN generates.
  • the VintGEN voltage generator contains a differential amplifier D and transistors T1 and T2.
  • the (second) voltage generated by the voltage generator VintGEN Vint is the voltage turned on by the first transistor T1.
  • This transistor T1 is at its input terminal supplied with the first voltage Vext and by the output voltage of the differential amplifier D controlled.
  • the Differential amplifier D compares the reference voltage Vref and the second generated by the VintGEN voltage generator Voltage Vint and gives a difference corresponding to the difference Signal off.
  • the voltage generator can be deactivated by the DISABLE signal VintGEN if necessary by him (in the considered Example: supplying the differential amplifier D of the same) Supply voltage (in the example considered Vext - ground potential GROUND).
  • Supply voltage in the example considered Vext - ground potential GROUND.
  • the transistor T2 is in a conduction path provided, via which the differential amplifier D with GROUND ground potential of the supply voltage is connected; blocking the transistor T2 by the deactivation signal DISABLE causes the connection to ground and thus preventing the supply voltage supply to Voltage generator.
  • the voltage Vint generated by the voltage generator VintGEN the components that require this voltage are connected via a Vint network fed.
  • VintGEN voltage generators are provided.
  • the several Voltage generators are preferably connected in parallel and more or less evenly over the integrated Circuit distributed. Such an arrangement is schematic shown in Figure 3.
  • the present invention is therefore based on the object the voltage generator according to the preamble of the claim 1 in such a way that one or more Voltage generators of this type with minimal effort have integrated circuits integrated.
  • the voltage generator Deactivation signal is supplied via a line which is also supplied with the reference voltage.
  • That the voltage generator the reference voltage and that Deactivation signal supplied via one and the same line has no negative impact because no need for simultaneous (superimposed) transmission consists.
  • Voltage generators designed as claimed can be thus integrate into integrated circuits with minimal effort.
  • the voltage generator described in more detail below is a Voltage generator, which uses a reference voltage generates a second voltage from a first voltage, and which using a deactivation signal can be deactivated.
  • the internal structure of the voltage generator under consideration corresponds the structure of the one shown in FIG. 2 and initially voltage generator described with reference thereto. That is, the voltage generator in turn contains a differential amplifier D and transistors T1 and T2, as in the Figure 2 are connected.
  • first Tension is a tension that from the outside to the Integrated circuit containing voltage generator applied and / or that the second voltage is a voltage that internal (within the relevant integrated circuit) is needed. Basically, any first Voltage can be converted into any second voltage.
  • the voltage generator considered here stands out characterized in that the voltage generator, the deactivation signal is fed via a line, via which it too the reference voltage is supplied.
  • FIG. 1 An arrangement with several voltage generators connected in parallel the type considered here is in FIG. 1 shown.
  • FIG. 1 corresponds in many respects to Arrangement according to Figure 3; are corresponding elements designated by the same reference numerals.
  • This common line COM is connected to that of the reference voltage generator VrefGEN generated reference voltage Vref acted upon and can if necessary via one of the deactivation signal DISABLE controlled transistor T3 on itself potential differing from the reference voltage (in the considered Example: to ground potential).
  • the deactivation signal DISABLE in addition to deactivating the reference voltage generator VrefGEN used.
  • the voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 by one high disable signal DISABLE deactivated.
  • the reference voltage generator VrefGEN remains in operation and blocks the transistor T3, causing the common Reference voltage / deactivation signal line COM the reference voltage generated by the reference voltage generator VrefGEN Vref is transmitted.
  • the deactivation signal DISABLE If the deactivation signal DISABLE is high, it sets the VrefGEN reference voltage generator out of operation and causes transistor T3 to turn on, causing the common reference voltage / deactivation signal line COM is pulled to ground potential.
  • the common reference voltage / disable signal line COM is both with the reference voltage input connector (the non-inverting input of the differential amplifier D) as well as with the deactivation signal input connection (the control terminal of transistor T2) the Voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 connected.
  • the external voltage Vext is intended converted into the internal voltage Vint; who also on Transistor T2 applied reference voltage causes the Transistor T2 turns on and the respective voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 are properly connected to the supply voltage.
  • the voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 are deactivated in this state and at the same time put in a high impedance state.
  • VintGEN voltage generators 1, VintGEN 2, VintGEN 3 and VintGEN 4 operate in the same way and deactivate as is the case when separate reference voltage and deactivation signal lines are provided are.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Control Of Electrical Variables (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Logic Circuits (AREA)
EP00121869A 1999-10-20 2000-10-06 Régulateur de tension Expired - Lifetime EP1094379B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19950541 1999-10-20
DE19950541A DE19950541A1 (de) 1999-10-20 1999-10-20 Spannungsgenerator

Publications (2)

Publication Number Publication Date
EP1094379A1 true EP1094379A1 (fr) 2001-04-25
EP1094379B1 EP1094379B1 (fr) 2010-12-01

Family

ID=7926290

Family Applications (1)

Application Number Title Priority Date Filing Date
EP00121869A Expired - Lifetime EP1094379B1 (fr) 1999-10-20 2000-10-06 Régulateur de tension

Country Status (6)

Country Link
US (1) US6285176B1 (fr)
EP (1) EP1094379B1 (fr)
JP (1) JP4426081B2 (fr)
KR (1) KR100676552B1 (fr)
DE (2) DE19950541A1 (fr)
TW (1) TW500996B (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10056293A1 (de) 2000-11-14 2002-06-06 Infineon Technologies Ag Schaltungsanordnung zur Erzeugung einer steuerbaren Ausgangsspannung
US6873509B2 (en) * 2002-05-13 2005-03-29 Infineon Technologies Ag Use of an on-die temperature sensing scheme for thermal protection of DRAMS
US6809914B2 (en) 2002-05-13 2004-10-26 Infineon Technologies Ag Use of DQ pins on a ram memory chip for a temperature sensing protocol
US6711091B1 (en) 2002-09-27 2004-03-23 Infineon Technologies Ag Indication of the system operation frequency to a DRAM during power-up
US6985400B2 (en) * 2002-09-30 2006-01-10 Infineon Technologies Ag On-die detection of the system operation frequency in a DRAM to adjust DRAM operations
US20050259497A1 (en) * 2004-05-14 2005-11-24 Zmos Technology, Inc. Internal voltage generator scheme and power management method
KR100795014B1 (ko) * 2006-09-13 2008-01-16 주식회사 하이닉스반도체 반도체 메모리 장치의 내부전압 발생기
KR20100055035A (ko) * 2008-11-17 2010-05-26 주식회사 하이닉스반도체 내부전압 생성을 위한 집적회로

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0454170A2 (fr) * 1990-04-27 1991-10-30 Nec Corporation Appareil abaisseur de tension incorporé dans des circuits à grande intégration
US5552740A (en) * 1994-02-08 1996-09-03 Micron Technology, Inc. N-channel voltage regulator
US5557232A (en) * 1993-08-13 1996-09-17 Nec Corporation Semiconductor integrated circuit device having a control circuit for setting the test mode
EP0843247A2 (fr) * 1996-11-19 1998-05-20 Nec Corporation Circuit intégré semi-conducteur à régulateur intégré

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60124715A (ja) * 1983-12-12 1985-07-03 Mitsubishi Electric Corp 電源制御回路
JPH0447591A (ja) * 1990-06-14 1992-02-17 Mitsubishi Electric Corp 半導体集積回路装置
KR950012018B1 (ko) * 1992-05-21 1995-10-13 삼성전자주식회사 반도체장치의 내부전원 발생회로
US5434498A (en) * 1992-12-14 1995-07-18 United Memories, Inc. Fuse programmable voltage converter with a secondary tuning path
US5483152A (en) * 1993-01-12 1996-01-09 United Memories, Inc. Wide range power supply for integrated circuits
KR970010284B1 (en) * 1993-12-18 1997-06-23 Samsung Electronics Co Ltd Internal voltage generator of semiconductor integrated circuit
JP3234153B2 (ja) * 1996-04-19 2001-12-04 株式会社東芝 半導体装置
US6114843A (en) * 1998-08-18 2000-09-05 Xilinx, Inc. Voltage down converter for multiple voltage levels

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0454170A2 (fr) * 1990-04-27 1991-10-30 Nec Corporation Appareil abaisseur de tension incorporé dans des circuits à grande intégration
US5557232A (en) * 1993-08-13 1996-09-17 Nec Corporation Semiconductor integrated circuit device having a control circuit for setting the test mode
US5552740A (en) * 1994-02-08 1996-09-03 Micron Technology, Inc. N-channel voltage regulator
EP0843247A2 (fr) * 1996-11-19 1998-05-20 Nec Corporation Circuit intégré semi-conducteur à régulateur intégré

Also Published As

Publication number Publication date
EP1094379B1 (fr) 2010-12-01
KR20010051019A (ko) 2001-06-25
DE19950541A1 (de) 2001-06-07
JP2001166839A (ja) 2001-06-22
DE50016040D1 (de) 2011-01-13
TW500996B (en) 2002-09-01
JP4426081B2 (ja) 2010-03-03
US6285176B1 (en) 2001-09-04
KR100676552B1 (ko) 2007-01-30

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