EP1094379A1 - Voltage regulator - Google Patents
Voltage regulator Download PDFInfo
- Publication number
- EP1094379A1 EP1094379A1 EP00121869A EP00121869A EP1094379A1 EP 1094379 A1 EP1094379 A1 EP 1094379A1 EP 00121869 A EP00121869 A EP 00121869A EP 00121869 A EP00121869 A EP 00121869A EP 1094379 A1 EP1094379 A1 EP 1094379A1
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- European Patent Office
- Prior art keywords
- voltage
- vintgen
- voltage generator
- deactivation signal
- reference voltage
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- 230000009849 deactivation Effects 0.000 claims abstract description 37
- 230000001105 regulatory effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
- G05F1/465—Internal voltage generators for integrated circuits, e.g. step down generators
Definitions
- the present invention relates to a device according to the preamble of claim 1, i.e. a voltage generator, which using a reference voltage generates a second voltage from a first voltage, and which can be deactivated using a deactivation signal is.
- Such voltage generators are integrated, for example Circuits used to come from an unregulated external voltage to generate a regulated internal voltage.
- a regulated internal voltage may be necessary, for example be so that the signal propagation times are independent of the external voltage are; the creation of such an internal Voltage is preferably used using a temperature and process-independent reference voltage.
- Disable voltage generator For example, for test purposes it may be necessary to use the Disable voltage generator and / or in one high impedance state.
- a voltage generator that uses a reference voltage a second (external) voltage generated (internal) voltage, and which one using of a deactivation signal can be deactivated in FIG. 2 shown.
- the reference voltage Vref is from an outside of the Voltage generator VintGEN provided reference voltage generator VrefGEN generates.
- the VintGEN voltage generator contains a differential amplifier D and transistors T1 and T2.
- the (second) voltage generated by the voltage generator VintGEN Vint is the voltage turned on by the first transistor T1.
- This transistor T1 is at its input terminal supplied with the first voltage Vext and by the output voltage of the differential amplifier D controlled.
- the Differential amplifier D compares the reference voltage Vref and the second generated by the VintGEN voltage generator Voltage Vint and gives a difference corresponding to the difference Signal off.
- the voltage generator can be deactivated by the DISABLE signal VintGEN if necessary by him (in the considered Example: supplying the differential amplifier D of the same) Supply voltage (in the example considered Vext - ground potential GROUND).
- Supply voltage in the example considered Vext - ground potential GROUND.
- the transistor T2 is in a conduction path provided, via which the differential amplifier D with GROUND ground potential of the supply voltage is connected; blocking the transistor T2 by the deactivation signal DISABLE causes the connection to ground and thus preventing the supply voltage supply to Voltage generator.
- the voltage Vint generated by the voltage generator VintGEN the components that require this voltage are connected via a Vint network fed.
- VintGEN voltage generators are provided.
- the several Voltage generators are preferably connected in parallel and more or less evenly over the integrated Circuit distributed. Such an arrangement is schematic shown in Figure 3.
- the present invention is therefore based on the object the voltage generator according to the preamble of the claim 1 in such a way that one or more Voltage generators of this type with minimal effort have integrated circuits integrated.
- the voltage generator Deactivation signal is supplied via a line which is also supplied with the reference voltage.
- That the voltage generator the reference voltage and that Deactivation signal supplied via one and the same line has no negative impact because no need for simultaneous (superimposed) transmission consists.
- Voltage generators designed as claimed can be thus integrate into integrated circuits with minimal effort.
- the voltage generator described in more detail below is a Voltage generator, which uses a reference voltage generates a second voltage from a first voltage, and which using a deactivation signal can be deactivated.
- the internal structure of the voltage generator under consideration corresponds the structure of the one shown in FIG. 2 and initially voltage generator described with reference thereto. That is, the voltage generator in turn contains a differential amplifier D and transistors T1 and T2, as in the Figure 2 are connected.
- first Tension is a tension that from the outside to the Integrated circuit containing voltage generator applied and / or that the second voltage is a voltage that internal (within the relevant integrated circuit) is needed. Basically, any first Voltage can be converted into any second voltage.
- the voltage generator considered here stands out characterized in that the voltage generator, the deactivation signal is fed via a line, via which it too the reference voltage is supplied.
- FIG. 1 An arrangement with several voltage generators connected in parallel the type considered here is in FIG. 1 shown.
- FIG. 1 corresponds in many respects to Arrangement according to Figure 3; are corresponding elements designated by the same reference numerals.
- This common line COM is connected to that of the reference voltage generator VrefGEN generated reference voltage Vref acted upon and can if necessary via one of the deactivation signal DISABLE controlled transistor T3 on itself potential differing from the reference voltage (in the considered Example: to ground potential).
- the deactivation signal DISABLE in addition to deactivating the reference voltage generator VrefGEN used.
- the voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 by one high disable signal DISABLE deactivated.
- the reference voltage generator VrefGEN remains in operation and blocks the transistor T3, causing the common Reference voltage / deactivation signal line COM the reference voltage generated by the reference voltage generator VrefGEN Vref is transmitted.
- the deactivation signal DISABLE If the deactivation signal DISABLE is high, it sets the VrefGEN reference voltage generator out of operation and causes transistor T3 to turn on, causing the common reference voltage / deactivation signal line COM is pulled to ground potential.
- the common reference voltage / disable signal line COM is both with the reference voltage input connector (the non-inverting input of the differential amplifier D) as well as with the deactivation signal input connection (the control terminal of transistor T2) the Voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 connected.
- the external voltage Vext is intended converted into the internal voltage Vint; who also on Transistor T2 applied reference voltage causes the Transistor T2 turns on and the respective voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 are properly connected to the supply voltage.
- the voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 are deactivated in this state and at the same time put in a high impedance state.
- VintGEN voltage generators 1, VintGEN 2, VintGEN 3 and VintGEN 4 operate in the same way and deactivate as is the case when separate reference voltage and deactivation signal lines are provided are.
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- Automation & Control Theory (AREA)
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Abstract
Description
Die vorliegende Erfindung betrifft einen Vorrichtung gemäß
dem Oberbegriff des Patentanspruchs 1, d.h. einen Spannungsgenerator,
welcher unter Verwendung einer Referenzspannung
aus einer ersten Spannung eine zweite Spannung erzeugt, und
welcher unter Verwendung eines Deaktivierungssignals deaktivierbar
ist.The present invention relates to a device according to
the preamble of
Solche Spannungsgeneratoren werden beispielsweise in integrierten Schaltungen verwendet, um aus einer ungeregelten externen Spannung eine geregelte interne Spannung zu erzeugen. Eine geregelte interne Spannung kann zum Beispiel notwendig sein, damit die Signallaufzeiten unabhängig von der externen Spannung sind; die Erzeugung einer solchen internen Spannung erfolgt vorzugsweise unter Verwendung einer temperatur- und prozeßunabhängigen Referenzspannung.Such voltage generators are integrated, for example Circuits used to come from an unregulated external voltage to generate a regulated internal voltage. A regulated internal voltage may be necessary, for example be so that the signal propagation times are independent of the external voltage are; the creation of such an internal Voltage is preferably used using a temperature and process-independent reference voltage.
Beispielsweise für Testzwecke kann es erforderlich sein, den Spannungsgenerator zu deaktivieren und/oder in einen hochohmigen Zustand zu versetzen.For example, for test purposes it may be necessary to use the Disable voltage generator and / or in one high impedance state.
Ein Spannungsgenerator, welcher unter Verwendung einer Referenzspannung aus einer ersten (externen) Spannung eine zweite (interne) Spannung erzeugt, und welcher unter Verwendung eines Deaktivierungssignals deaktivierbar ist, ist in Figur 2 dargestellt.A voltage generator that uses a reference voltage a second (external) voltage generated (internal) voltage, and which one using of a deactivation signal can be deactivated in FIG. 2 shown.
Dabei sind der Spannungsgenerator mit dem Bezugszeichen VintGEN, die erste (externe) Spannung mit dem Bezugszeichen Vext, die Referenzspannung mit dem Bezugszeichen Vref, die zweite (interne) Spannung mit dem Bezugszeichen Vint, und das Deaktivierungssignal mit dem Bezugszeichen DISABLE bezeichnet; die Referenzspannung Vref wird von einem außerhalb des Spannungsgenerators VintGEN vorgesehenen Referenzspannungsgenerator VrefGEN erzeugt. Der Spannungsgenerator VintGEN enthält einen Differenzverstärker D und Transistoren T1 und T2.The voltage generator with the reference symbol VintGEN, the first (external) voltage with the reference symbol Vext, the reference voltage with the reference symbol Vref, the second (internal) voltage with the reference symbol Vint, and that Deactivation signal with the reference symbol DISABLE; the reference voltage Vref is from an outside of the Voltage generator VintGEN provided reference voltage generator VrefGEN generates. The VintGEN voltage generator contains a differential amplifier D and transistors T1 and T2.
Die vom Spannungsgenerator VintGEN erzeugte (zweite) Spannung Vint ist die vorn ersten Transistor T1 durchgeschaltete Spannung. Dieser Transistor T1 wird an seinem Eingangsanschluß mit der ersten Spannung Vext beaufschlagt und durch die Ausgangsspannung des Differenzverstärkers D gesteuert. Der Differenzverstärker D vergleicht die Referenzspannung Vref und die vom Spannungsgenerator VintGEN erzeugte zweite Spannung Vint und gibt ein der Differenz entsprechendes Signal aus.The (second) voltage generated by the voltage generator VintGEN Vint is the voltage turned on by the first transistor T1. This transistor T1 is at its input terminal supplied with the first voltage Vext and by the output voltage of the differential amplifier D controlled. The Differential amplifier D compares the reference voltage Vref and the second generated by the VintGEN voltage generator Voltage Vint and gives a difference corresponding to the difference Signal off.
Durch das Deaktivierungssignal DISABLE kann der Spannungsgenerator VintGEN bei Bedarf von der ihn (im betrachteten Beispiel: den Differenzverstärker D desselben) versorgenden Versorgungsspannung (im betrachteten Beispiel Vext - Massepotential GROUND) getrennt werden. Im betrachteten Beispiel wird durch das Deaktivierungssignal DISABLE der zweite Transistor T2 gesteuert. Der Transistor T2 ist in einem Leitungspfad vorgesehen, über welchen der Differenzverstärker D mit Massepotential GROUND der Versorgungsspannung verbunden ist; ein Sperren des Transistors T2 durch das Deaktivierungssignal DISABLE bewirkt ein Auftrennen der Verbindung mit Masse und damit eine Unterbindung der Versorgungsspannungszufuhr zum Spannungsgenerator.The voltage generator can be deactivated by the DISABLE signal VintGEN if necessary by him (in the considered Example: supplying the differential amplifier D of the same) Supply voltage (in the example considered Vext - ground potential GROUND). In the example considered becomes the second transistor by the deactivation signal DISABLE T2 controlled. The transistor T2 is in a conduction path provided, via which the differential amplifier D with GROUND ground potential of the supply voltage is connected; blocking the transistor T2 by the deactivation signal DISABLE causes the connection to ground and thus preventing the supply voltage supply to Voltage generator.
Die vom Spannungsgenerator VintGEN erzeugte Spannung Vint wird über ein Vint-Netz den diese Spannung benötigenden Komponenten zugeführt. Bei der Verteilung der Spannung Vint über das Vint-Netz treten Spannungsverluste auf. Um dies zu vermeiden, werden in integrierten Schaltungen häufig mehrere Spannungsgeneratoren VintGEN vorgesehen. Die mehreren Spannungsgeneratoren sind dabei vorzugsweise parallel geschaltet und mehr oder weniger gleichmäßig über die integrierte Schaltung verteilt. Eine solche Anordnung ist schematisch in Figur 3 dargestellt.The voltage Vint generated by the voltage generator VintGEN the components that require this voltage are connected via a Vint network fed. When distributing the voltage Vint over the Vint network, voltage losses occur. To avoid this there are often several in integrated circuits VintGEN voltage generators are provided. The several Voltage generators are preferably connected in parallel and more or less evenly over the integrated Circuit distributed. Such an arrangement is schematic shown in Figure 3.
Wie aus der Figur 3 unschwer zu erkennen ist, ist die praktische Realisierung einer solchen Anordnung mit einem nicht unerheblichen Aufwand verbunden. Problematisch ist insbesondere, daß viele lange (sich über die gesamte integrierte Schaltung erstreckende) Leitungen vorgesehen werden müssen.As can easily be seen from FIG. 3, the practical one Realization of such an arrangement with a not inconsiderable Associated effort. The main problem is that many long (over the entire integrated Circuit extending) lines must be provided.
Der vorliegenden Erfindung liegt daher die Aufgabe zugrunde,
den Spannungsgenerator gemäß dem Oberbegriff des Patentanspruchs
1 derart weiterzubilden, daß sich ein oder mehrere
Spannungsgeneratoren dieser Art mit minimalem Aufwand in
integrierte Schaltungen integrieren lassen.The present invention is therefore based on the object
the voltage generator according to the preamble of the
Diese Aufgabe wird erfindungsgemäß durch das im kennzeichnenden
Teil des Patentanspruchs 1 beanspruchte Merkmal gelöst.This object is achieved by the characterizing
Part of
Demnach ist vorgesehen, daß dem Spannungsgenerator das Deaktivierungssignal über eine Leitung zugeführt wird, über welche ihm auch die Referenzspannung zugeführt wird.Accordingly, it is provided that the voltage generator Deactivation signal is supplied via a line which is also supplied with the reference voltage.
Dadurch läßt sich die Anzahl der Leitungen, die vorgesehen werden müssen, um dem Spannungsgenerator die zu dessen Betrieb und dessen Steuerung erforderlichen Spannungen und Signale zuzuführen, reduzieren.This allows the number of lines that are provided must be in order to operate the voltage generator and its control required voltages and Feed signals, reduce.
Daß dem Spannungsgenerator die Referenzspannung und das Deaktivierungssignal über ein- und dieselbe Leitung zugeführt werden, hat keine negativen Auswirkungen, weil keine Notwendigkeit zur gleichzeitigen (überlagerten) Übertragung besteht.That the voltage generator the reference voltage and that Deactivation signal supplied via one and the same line has no negative impact because no need for simultaneous (superimposed) transmission consists.
Wie beansprucht ausgebildete Spannungsgeneratoren lassen sich damit mit minimalem Aufwand in integrierte Schaltungen integrieren. Voltage generators designed as claimed can be thus integrate into integrated circuits with minimal effort.
Vorteilhafte Weiterbildungen der Erfindung sind den Unteransprüchen, der nachfolgenden Beschreibung und den Figuren entnehmbar.Advantageous developments of the invention are the dependent claims, the following description and the figures removable.
Die Erfindung wird nachfolgend anhand von Ausführungsbeispielen unter Bezugnahme auf die Figuren näher erläutert. Es zeigen
Figur 1- eine Anordnung, bei welcher mehrere Spannungsgeneratoren der nachfolgend näher beschriebenen Art parallel geschaltet sind,
Figur 2- einen herkömmlichen Spannungsgenerator, welcher unter Verwendung einer Referenzspannung aus einer ersten Spannung eine zweite Spannung erzeugt, und welcher unter Verwendung eines Deaktivierungssignals deaktivierbar ist, und
Figur 3- eine Anordnung, bei welcher mehrere Spannungsgeneratoren
gemäß
Figur 2 parallel geschaltet sind.
- Figure 1
- an arrangement in which a plurality of voltage generators of the type described in more detail below are connected in parallel,
- Figure 2
- a conventional voltage generator which generates a second voltage from a first voltage using a reference voltage and which can be deactivated using a deactivation signal, and
- Figure 3
- an arrangement in which a plurality of voltage generators according to Figure 2 are connected in parallel.
Der nachfolgend näher beschriebene Spannungsgenerator ist ein Spannungsgenerator, welcher unter Verwendung einer Referenzspannung aus einer ersten Spannung eine zweite Spannung erzeugt, und welcher unter Verwendung eines Deaktivierungssignals deaktivierbar ist.The voltage generator described in more detail below is a Voltage generator, which uses a reference voltage generates a second voltage from a first voltage, and which using a deactivation signal can be deactivated.
Der innere Aufbau des betrachteten Spannungsgenerators entspricht dem Aufbau des in der Figur 2 gezeigten und eingangs unter Bezugnahme darauf beschriebenen Spannungsgenerators. D.h., der Spannungsgenerator enthält wiederum einen Differenzverstärker D und Transistoren T1 und T2, die wie in der Figur 2 verschaltet sind.The internal structure of the voltage generator under consideration corresponds the structure of the one shown in FIG. 2 and initially voltage generator described with reference thereto. That is, the voltage generator in turn contains a differential amplifier D and transistors T1 and T2, as in the Figure 2 are connected.
Es sei jedoch darauf hingewiesen, daß hierauf keine Einschränkung besteht. Sowohl die Umsetzung der ersten Spannung (der externen Spannung Vext) in die zweite Spannung (in die interne Spannung Vint) unter Verwendung einer Referenzspannung als auch die Deaktivierung des Spannungsgenerators können auch unter Verwendung anderer Schaltungen und/oder anderer Prinzipien erfolgen.However, it should be noted that this is not a limitation consists. Both the implementation of the first tension (the external voltage Vext) into the second voltage (into the internal voltage Vint) using a reference voltage as well as the deactivation of the voltage generator can also use other circuits and / or others Principles.
Es besteht ferner keine Einschränkung darauf, daß die erste Spannung eine Spannung ist, die von außen an die den Spannungsgenerator enthaltende integrierte Schaltung angelegt wird, und/oder daß die zweite Spannung eine Spannung ist, die intern (innerhalb der betreffenden integrierten Schaltung) benötigt wird. Grundsätzlich kann eine beliebige erste Spannung in eine beliebige zweite Spannung umgesetzt werden.There is also no restriction that the first Tension is a tension that from the outside to the Integrated circuit containing voltage generator applied and / or that the second voltage is a voltage that internal (within the relevant integrated circuit) is needed. Basically, any first Voltage can be converted into any second voltage.
Der vorliegend betrachtete Spannungsgenerator zeichnet sich dadurch aus, daß dem Spannungsgenerator das Deaktivierungssignal über eine Leitung zugeführt wird, über welche ihm auch die Referenzspannung zugeführt wird.The voltage generator considered here stands out characterized in that the voltage generator, the deactivation signal is fed via a line, via which it too the reference voltage is supplied.
Dadurch ist es nicht mehr nötig, dem Spannungsgenerator die Referenzspannung und das Deaktivierungssignal auf separaten Leitungen zuzuführen.This eliminates the need for the voltage generator Reference voltage and the deactivation signal on separate Feed lines.
Dies wirkt sich insbesondere dann, wenn mehrere Spannungsgeneratoren parallel geschaltet werden müssen, als sehr vorteilhaft aus; dadurch läßt sich nämlich die Anzahl der Leitungen zu den jeweiligen Spannungsgeneratoren reduzieren.This is particularly effective when several voltage generators must be connected in parallel as very advantageous out; this allows the number of Reduce cables to the respective voltage generators.
Eine Anordnung mit mehreren parallel geschalteten Spannungsgeneratoren der vorliegend betrachteten Art ist in Figur 1 dargestellt.An arrangement with several voltage generators connected in parallel the type considered here is in FIG. 1 shown.
Die Anordnung gemäß Figur 1 entspricht in vielen Punkten der Anordnung gemäß Figur 3; einander entsprechende Elemente sind mit den selben Bezugszeichen bezeichnet. The arrangement according to FIG. 1 corresponds in many respects to Arrangement according to Figure 3; are corresponding elements designated by the same reference numerals.
Bei der in der Figur 1 gezeigten Anordnung sind wie bei der Anordnung gemäß Figur 3 vier Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und VintGEN 4 parallel geschaltet.In the arrangement shown in Figure 1 are like in the Arrangement according to FIG. 3 four voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 connected in parallel.
Insoweit herrscht Übereinstimmung mit der Anordnung gemäß Figur 3.In this respect, there is agreement with the arrangement according to Figure 3.
Im Gegensatz zur Anordnung gemäß Figur 3 werden den Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und VintGEN 4 jedoch die Referenzspannung Vref und das Deaktivierungssignal DISABLE über eine gemeinsame Leitung COM zugeführt.In contrast to the arrangement according to FIG Voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4, however, the reference voltage Vref and the deactivation signal DISABLE supplied via a common line COM.
Diese gemeinsame Leitung COM wird mit der vom Referenzspannungsgenerator VrefGEN erzeugten Referenzspannung Vref beaufschlagt und kann bei Bedarf über einen vom Deaktivierungssignal DISABLE angesteuerten Transistor T3 auf ein sich von der Referenzspannung unterscheidendes Potential (im betrachteten Beispiel: auf Massepotential) gezogen werden.This common line COM is connected to that of the reference voltage generator VrefGEN generated reference voltage Vref acted upon and can if necessary via one of the deactivation signal DISABLE controlled transistor T3 on itself potential differing from the reference voltage (in the considered Example: to ground potential).
Im betrachteten Beispiel wird das Deaktivierungssignal DISABLE zusätzlich zur Deaktivierung des Referenzspannungsgenerators VrefGEN verwendet.In the example considered, the deactivation signal DISABLE in addition to deactivating the reference voltage generator VrefGEN used.
Bei der betrachteten Anordnung werden die Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und VintGEN 4 durch ein einen hohen Pegel aufweisendes Deaktivierungssignal DISABLE deaktiviert.In the arrangement under consideration, the voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 by one high disable signal DISABLE deactivated.
Wenn und so lange das Deaktivierungssignal DISABLE niedrigen Pegel aufweist, bleibt der Referenzspannungsgenerator VrefGEN in Betrieb und sperrt der Transistor T3, wodurch über die gemeinsame Referenzspannungs-/Deaktivierungssignal-Leitung COM die vom Referenzspannungsgenerator VrefGEN erzeugte Referenzspannung Vref übertragen wird. If and so long the deactivation signal DISABLE is low Level, the reference voltage generator VrefGEN remains in operation and blocks the transistor T3, causing the common Reference voltage / deactivation signal line COM the reference voltage generated by the reference voltage generator VrefGEN Vref is transmitted.
Wenn das Deaktivierungssignal DISABLE hohen Pegel aufweist, setzt es den Referenzspannungsgenerator VrefGEN außer Betrieb und bewirkt ein Durchschalten des Transistors T3, wodurch die gemeinsame Referenzspannungs-/Deaktivierungssignal-Leitung COM auf Massepotential gezogen wird.If the deactivation signal DISABLE is high, it sets the VrefGEN reference voltage generator out of operation and causes transistor T3 to turn on, causing the common reference voltage / deactivation signal line COM is pulled to ground potential.
Die gemeinsame Referenzspannungs-/Deaktivierungssignal-Leitung COM ist sowohl mit dem Referenzspannungs-Eingangsanschluß (dem nicht invertierenden Eingang des Differenzverstärkers D) als auch mit dem Deaktivierungssignal-Eingangsanschluß (dem Steueranschluß des Transistors T2) der Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und VintGEN 4 verbunden.The common reference voltage / disable signal line COM is both with the reference voltage input connector (the non-inverting input of the differential amplifier D) as well as with the deactivation signal input connection (the control terminal of transistor T2) the Voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 connected.
Wenn und so lange die Referenzspannung Vref über die gemeinsame Referenzspannungs-/Deaktivierungssignal-Leitung COM übertragen wird, wird die externe Spannung Vext bestimmungsgemäß in die interne Spannung Vint umgesetzt; die auch am Transistor T2 anliegende Referenzspannung bewirkt, daß der Transistor T2 durchschaltet und die jeweiligen Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und VintGEN 4 ordnungsgemäß mit der Versorgungsspannung verbunden sind.If and so long the reference voltage Vref over the common Reference voltage / deactivation signal line COM is transmitted, the external voltage Vext is intended converted into the internal voltage Vint; who also on Transistor T2 applied reference voltage causes the Transistor T2 turns on and the respective voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 are properly connected to the supply voltage.
Wenn die gemeinsame Referenzspannungs-/Deaktivierungssignal-Leitung COM auf Massepotential liegt, sperrt der Transistor T2, wodurch die Spannungsversorgung der jeweiligen Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und VintGEN 4 (die Verbindung der Differenzverstärker D mit Masse) unterbrochen wird. Die Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und VintGEN 4 sind in diesem Zustand deaktiviert und zugleich in einen hochohmigen Zustand versetzt.If the common reference voltage / disable signal line COM is at ground potential, the transistor blocks T2, whereby the voltage supply of the respective voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 (the connection of the differential amplifier D to ground) interrupted becomes. The voltage generators VintGEN 1, VintGEN 2, VintGEN 3 and VintGEN 4 are deactivated in this state and at the same time put in a high impedance state.
Das Vorsehen einer gemeinsamen Referenzspannungs-/Deaktivierungssignal-Leitung
COM läßt die Spannungsgeneratoren VintGEN
1, VintGEN 2, VintGEN 3 und VintGEN 4 genauso betreiben und
deaktivieren wie es der Fall ist, wenn separate Referenzspannungs-
und Deaktivierungssignal-Leitungen vorgesehen
sind.The provision of a common reference voltage / deactivation signal line
COM leaves the
Allerdings ist die Anzahl der Leitungen, über welche die
Spannungsgeneratoren VintGEN 1, VintGEN 2, VintGEN 3 und
VintGEN 4 mit dem Referenzspannungsgenerator VrefGEN und der
Deaktivierungssignal-Quelle zu verbinden sind, reduziert.However, the number of lines over which the
Spannungsgeneratoren der vorstehend beschriebenen Art lassen sich damit bei uneingeschränkter Funktionalität mit minimalem Aufwand in integrierte Schaltungen integrieren. Leave voltage generators of the type described above with unrestricted functionality with minimal Integrate effort into integrated circuits.
- COMCOM
- gemeinsame Referenzspannungs-/Deaktivierungssignal-Leitungcommon reference voltage / deactivation signal line
- DD
- DifferenzverstärkerDifferential amplifier
- DISABLEDISABLE
- DeaktivierungssignalDeactivation signal
- TxTx
- TransistorenTransistors
- VextVext
- externe Spannungexternal voltage
- VintVint
- interne Spannunginternal voltage
- VintGENVintGEN
- SpannungsgeneratorVoltage generator
- VrefVref
- ReferenzspannungReference voltage
- VrefGENVrefGEN
- ReferenzspannungsgeneratorReference voltage generator
Claims (7)
dadurch gekennzeichnet,
daß dem Spannungsgenerator (VintGEN) das Deaktivierungssignal (DISABLE) über eine Leitung (COM) zugeführt wird, über welche ihm auch die Referenzspannung (Vref) zugeführt wird.Voltage generator which generates a second voltage (Vint) from a first voltage (Vext) using a reference voltage (Vref) and which can be deactivated using a deactivation signal (DISABLE),
characterized,
that the deactivation signal (DISABLE) is supplied to the voltage generator (VintGEN) via a line (COM) via which the reference voltage (Vref) is also supplied to it.
dadurch gekennzeichnet,
daß das Deaktivierungssignal (DISABLE) dazu verwendet wird, den Spannungsgenerator (VintGEN) in einen hochohmigen Zustand zu versetzen.Voltage generator according to claim 1,
characterized,
that the deactivation signal (DISABLE) is used to put the voltage generator (VintGEN) in a high-resistance state.
dadurch gekennzeichnet,
daß das Deaktivierungssignal (DISABLE) dazu verwendet wird, die Zufuhr einer vom Spannungsgenerator (VintGEN) benötigten Versorgungsspannung (Vref) zum Spannungsgenerator (VintGEN) zu unterbinden.Voltage generator according to claim 1 or 2,
characterized,
that the deactivation signal (DISABLE) is used to prevent the supply of a supply voltage (Vref) required by the voltage generator (VintGEN) to the voltage generator (VintGEN).
dadurch gekennzeichnet,
daß zur Deaktivierung des Spannungsgenerators (VintGEN) die Leitung (COM), über welche dem Spannungsgenerator auch die Referenzspannung (Vref) zugeführt wird, mit dem Deaktivierungssignal (DISABLE) beaufschlagt wird.Voltage generator according to one of the preceding claims,
characterized,
that to deactivate the voltage generator (VintGEN) the line (COM), via which the voltage generator also receives the reference voltage (Vref), is acted upon by the deactivation signal (DISABLE).
dadurch gekennzeichnet,
daß die Beaufschlagung der Leitung (COM) mit dem Deaktivierungssignal (DISABLE) darin besteht, daß die Leitung auf ein sich von der Referenzspannung (Vref) unterscheidendes Potential gebracht wird.Voltage generator according to claim 4,
characterized,
that the application of the deactivation signal (DISABLE) to the line (COM) consists in bringing the line to a potential different from the reference voltage (Vref).
dadurch gekennzeichnet,
daß zur Deaktivierung des Spannungsgenerators (VintGEN) der die Referenzspannung (Vref) erzeugende Referenzspannungsgenerator (VrefGEN) deaktiviert wird.Voltage generator according to one of the preceding claims,
characterized,
that to deactivate the voltage generator (VintGEN) the reference voltage generator (Vref) generating the reference voltage (VrefGEN) is deactivated.
dadurch gekennzeichnet,
daß zur Deaktivierung des Spannungsgenerators (VintGEN) der die Referenzspannung (Vref) erzeugende Referenzspannungsgenerator (VrefGEN) in einen Zustand versetzt wird, in welchem er das Deaktivierungssignal (DISABLE) ausgibt.Voltage generator according to one of claims 1 to 5,
characterized,
that for deactivating the voltage generator (VintGEN), the reference voltage generator (VrefGEN) generating the reference voltage (VrefGEN) is set in a state in which it outputs the deactivation signal (DISABLE).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19950541 | 1999-10-20 | ||
DE19950541A DE19950541A1 (en) | 1999-10-20 | 1999-10-20 | Voltage generator |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1094379A1 true EP1094379A1 (en) | 2001-04-25 |
EP1094379B1 EP1094379B1 (en) | 2010-12-01 |
Family
ID=7926290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP00121869A Expired - Lifetime EP1094379B1 (en) | 1999-10-20 | 2000-10-06 | Voltage regulator |
Country Status (6)
Country | Link |
---|---|
US (1) | US6285176B1 (en) |
EP (1) | EP1094379B1 (en) |
JP (1) | JP4426081B2 (en) |
KR (1) | KR100676552B1 (en) |
DE (2) | DE19950541A1 (en) |
TW (1) | TW500996B (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10056293A1 (en) * | 2000-11-14 | 2002-06-06 | Infineon Technologies Ag | Circuit arrangement for generating a controllable output voltage |
US6873509B2 (en) * | 2002-05-13 | 2005-03-29 | Infineon Technologies Ag | Use of an on-die temperature sensing scheme for thermal protection of DRAMS |
US6809914B2 (en) | 2002-05-13 | 2004-10-26 | Infineon Technologies Ag | Use of DQ pins on a ram memory chip for a temperature sensing protocol |
US6711091B1 (en) | 2002-09-27 | 2004-03-23 | Infineon Technologies Ag | Indication of the system operation frequency to a DRAM during power-up |
US6985400B2 (en) | 2002-09-30 | 2006-01-10 | Infineon Technologies Ag | On-die detection of the system operation frequency in a DRAM to adjust DRAM operations |
EP1826651A1 (en) * | 2004-05-14 | 2007-08-29 | Zmos Technology, Inc. | Internal voltage generator scheme and power management method |
KR100795014B1 (en) * | 2006-09-13 | 2008-01-16 | 주식회사 하이닉스반도체 | Internal voltage generator of semiconductor memory device |
KR20100055035A (en) * | 2008-11-17 | 2010-05-26 | 주식회사 하이닉스반도체 | Integrated circuit for generating internal voltage |
Citations (4)
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EP0454170A2 (en) * | 1990-04-27 | 1991-10-30 | Nec Corporation | Step-down unit incorporated in large scale integrated circuit |
US5552740A (en) * | 1994-02-08 | 1996-09-03 | Micron Technology, Inc. | N-channel voltage regulator |
US5557232A (en) * | 1993-08-13 | 1996-09-17 | Nec Corporation | Semiconductor integrated circuit device having a control circuit for setting the test mode |
EP0843247A2 (en) * | 1996-11-19 | 1998-05-20 | Nec Corporation | Regulator built-in semiconductor integrated circuit |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS60124715A (en) * | 1983-12-12 | 1985-07-03 | Mitsubishi Electric Corp | Power supply control circuit |
JPH0447591A (en) * | 1990-06-14 | 1992-02-17 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
KR950012018B1 (en) * | 1992-05-21 | 1995-10-13 | 삼성전자주식회사 | Internal voltage generating circuit of semiconductor device |
US5483152A (en) * | 1993-01-12 | 1996-01-09 | United Memories, Inc. | Wide range power supply for integrated circuits |
US5434498A (en) * | 1992-12-14 | 1995-07-18 | United Memories, Inc. | Fuse programmable voltage converter with a secondary tuning path |
KR970010284B1 (en) * | 1993-12-18 | 1997-06-23 | Samsung Electronics Co Ltd | Internal voltage generator of semiconductor integrated circuit |
JP3234153B2 (en) * | 1996-04-19 | 2001-12-04 | 株式会社東芝 | Semiconductor device |
US6114843A (en) * | 1998-08-18 | 2000-09-05 | Xilinx, Inc. | Voltage down converter for multiple voltage levels |
-
1999
- 1999-10-20 DE DE19950541A patent/DE19950541A1/en not_active Withdrawn
-
2000
- 2000-10-06 EP EP00121869A patent/EP1094379B1/en not_active Expired - Lifetime
- 2000-10-06 DE DE50016040T patent/DE50016040D1/en not_active Expired - Lifetime
- 2000-10-13 KR KR1020000060289A patent/KR100676552B1/en not_active IP Right Cessation
- 2000-10-18 JP JP2000318183A patent/JP4426081B2/en not_active Expired - Fee Related
- 2000-10-19 TW TW089121910A patent/TW500996B/en not_active IP Right Cessation
- 2000-10-20 US US09/693,778 patent/US6285176B1/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0454170A2 (en) * | 1990-04-27 | 1991-10-30 | Nec Corporation | Step-down unit incorporated in large scale integrated circuit |
US5557232A (en) * | 1993-08-13 | 1996-09-17 | Nec Corporation | Semiconductor integrated circuit device having a control circuit for setting the test mode |
US5552740A (en) * | 1994-02-08 | 1996-09-03 | Micron Technology, Inc. | N-channel voltage regulator |
EP0843247A2 (en) * | 1996-11-19 | 1998-05-20 | Nec Corporation | Regulator built-in semiconductor integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
JP4426081B2 (en) | 2010-03-03 |
KR20010051019A (en) | 2001-06-25 |
EP1094379B1 (en) | 2010-12-01 |
JP2001166839A (en) | 2001-06-22 |
TW500996B (en) | 2002-09-01 |
DE50016040D1 (en) | 2011-01-13 |
DE19950541A1 (en) | 2001-06-07 |
US6285176B1 (en) | 2001-09-04 |
KR100676552B1 (en) | 2007-01-30 |
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