EP1018155A1 - Isolement de tranchees - Google Patents

Isolement de tranchees

Info

Publication number
EP1018155A1
EP1018155A1 EP98912848A EP98912848A EP1018155A1 EP 1018155 A1 EP1018155 A1 EP 1018155A1 EP 98912848 A EP98912848 A EP 98912848A EP 98912848 A EP98912848 A EP 98912848A EP 1018155 A1 EP1018155 A1 EP 1018155A1
Authority
EP
European Patent Office
Prior art keywords
trench
trenches
insulating
island
conductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98912848A
Other languages
German (de)
English (en)
Inventor
Anders Karl Sivert SÖDERBÄRG
Nils Ola ÖGREN
Ernst Hakan SJÖDIN
Olof Mikael Zackrisson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of EP1018155A1 publication Critical patent/EP1018155A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions

Definitions

  • the present invention relates to isolating trenches and methods of producing such trenches.
  • a problem with the use of trenches for isolating components is that the small width of the trenches make them vulnerable to foreign particles or defects in the material, both of which can short circuit the desired electrical insulation. This is particularly difficult to cure in the case of components having long total trench lengths.
  • Another problem with trench structures is that the different thermal properties of the materials in and surrounding the trenches can lead to mechanical stresses occurring in the trench material or the surrounding silicon.
  • steps are often formed over trenches during their manufacture. These steps can trap conductive material in undesirable regions during subsequent processing and can cause short circuits.
  • An example of such undesirable conductive material is polysilicon strings which remain in the trench edges and can go all the way around a component. These strings can then cause short circuits between two conductors which cross the trench and are in contact with the strings.
  • An object of the invention is to produce trench structures with a reduced risk for short-circuiting crossing conductors and a greater tolerance of foreign particles and defects in the material.
  • this is achieved by means of a trench structure having a segmented structure.
  • a trench formation formed in accordance with the invention has a number of advantages.
  • One advantage is that a short circuit can only occur if two defects or foreign particles occur close to each other. This risk is considerably lower than the risk that two defects or foreign particles occur on a simple trench which completely surrounds a component.
  • Another advantage is that the reduced length of the islands of silicon surrounded by the trenches helps relieve the mechanical stresses which are generated during subsequent processing and use.
  • a further advantage is that there is a reduced risk that conducting residues, for example strings of polysilicon, remaining from later process steps surround the insulated device and short circuit conductors which cross the trench.
  • thermal insulation of the trench formation according to the invention is greater than that of a single trench and thus the conduction of heat to components surrounded by a trench formation according to the present invention is reduced.
  • figure la shows a plan view of a prior art trench structure
  • figure lb shows an enlarged view of a cross-section along line I-I in figure la
  • figure 2a shows a plan view of one embodiment of a trench structure according to the invention
  • figure 2b shows an enlarged view of a cross-section along line II-II of the trench structure show in figure 2a
  • figure 3a shows a plan view of a second embodiment of a trench structure according to the invention
  • figure 3b) shows an enlarged view of a part of the trench structure of figure 3a).
  • figure 4 shows a third embodiment of a trench structure according to the invention.
  • a wafer 1 for producing semiconductor devices has a layer 2 of, for example, doped silicon, for example, n- type doped silicon over a layer 3 of oppositely doped, in this case p-type, silicon.
  • the wafer has a continuous or closed-loop trench 4.
  • This trench 4 has a U-shaped cross-section which extends from the upper surface of wafer 1 through layer 2 into layer 3.
  • Trench 4 has insulating walls 5 made of, for example, oxidised silicon and a filling of polysilicon 6 between the trench walls 5.
  • Trench 4 extends along the boundary between an island 7 of n-type doped silicon and the rest of the n-type doped silicon 2 and insulates it from the rest of the n-type doped silicon 2.
  • This island 7 can be used as the foundation for one or more components (not shown) such as resistors, capacitors, diodes, transistors and other bipolar components.
  • components not shown
  • island 7 will be in undesired electrical contact with layer 2 and the function of any component(s) formed on or by island 7 will be adversely affected.
  • Figures 2a) and 2b) show an embodiment of a trench structure according to the present invention.
  • first closed loop trench 4 is surrounded by a second closed loop trench 4' and separated from it by an island or slice of, for example, n-type doped silicon 2'.
  • the invention is not limited to silicon based components but can be adapted as required for use with any material. It is also possible to adapt it for use with other manufacturing processes such as silicon on insulator (SOI) technology in which a layer of silicon is provided on a insulating substrate made of, for example, silicon oxide.
  • Trenches 4, 4' have insulating walls 5 made of. for example, oxidised silicon and a filling of polysilicon 6 between the trench walls 5.
  • the material of the insulating walls 5 can be any suitable material such as silicon nitrides, silicon oxides, porous silicon, sapphire, aluminium oxide, aluminium nitride, diamond, quartz, other dielectric materials and combinations of the same and it is conceivable that a material other than polysilicon or no material is present between the insulating walls 5.
  • Second trench 4' is constructed in the same way as trench 4 and is appropriately formed simultaneously with trench 4. It is joined to first trench 4 by intermediate transverse trenches 9 formed in the slice of n-type doped silicon 2' and spaced, in this example, at predetermined regular intervals around the circumference of trench 4. It is naturally also possible to have irregularly spaced transverse trenches 9.
  • transverse trenches 9 The optimum number of transverse trenches 9 depends on the expected sizes of foreign particles and how often they occur. With very rare foreign particles then it may be sufficient to have only two transverse trenches. As the risk of contamination in the form of foreign particles increases then it may become advisable to increase the number of transverse trenches 9.
  • links forming the chain-like structure do not have to be elongated links but could be any appropriate shape such as round, oval, square, trapezoidal etc.
  • Typical lengths for the trenches 4, 4' forming the sides of links could be 15-50 micro-meters with a width of 1-3 micro-meters.
  • the distance between two trenches could typically be from 3- 50 micro-meters.
  • Figures 3a) shows an embodiment of the invention in which the problem that residual conductive material, such as polysilicon 13, remaining along the trench edges can cause short-circuiting between conductors crossing the trenches can be avoided.
  • Figure 3b) is an enlargement of part of figure 3a).
  • Polysilicon 13 is represented in figures 3 a) and 3b) by solid lines on the circumference of the shaded trenches. Conductors 11, 11 ' at different potentials both cross trench structures 4, 4'. If there is any un-oxidised polysilicon remaining along the edges of the trenches then this will act as a conductor between conductors 1 1,11 ' and the island 7 will be short-circuited.
  • a break 12 is formed in trench 4 in each portion of trench 4 which joins the conductors 11, 1 1 '.
  • Each break 12 extends into one of the islands 18' formed between trenches 4, 4'.
  • a break 12' is formed in trench 4' in each portion of trench 4' which joins the conductors 11, 11 '.
  • Each break 12' extends into one of the islands 18" formed between trenches 4, 4'.
  • each trench 4 must have at least two breaks 12 in it and each trench 4' must have at least two breaks 12 in it.
  • Each pair of breaks 12,12' must be positioned on opposite sides of a conductor 11, or 11 ' such that there is no continuous conducting path between the conductors 11, 11 '. In other words, one break must be in the long path between the conductors 11,11 ' which path goes around almost all of the perimeter of island 7 and the other break must be in the shortest path between the conductors 11, 11 '.
  • the invention could also be realised with 3 trench structures 4, 4' ,4 " ' of increasing size arranged around a component to be protected.
  • the invention is not limited to the embodiments described above but could include more than 3 trench structures. These trench structures could be all interconnected by transverse trenches or alternatively could be interconnected into groups wherein each group is not interconnected to the other group or groups.
  • the islands 2' formed between the trenches 4, 4 ',9 should be designed to not be in electrical contact with any active conductors 11. 11 ' although it may be necessary to provide them with a connection to earth.
  • the masks used during processing of the wafer 1 should not have any contact holes between the islands 2' and any active conductors 11, 1 1 '.
  • a trench structure according to the invention provides increase thermal insulation between the components on either side of it.
  • transverse trenches provides multiple paths for the relief of stresses. The reduces the risk of stress damage occurring as the stress travels a shorter path before being relieved.
  • the insulating material can be any suitable material such as silicon nitrides, silicon oxides, porous silicon, sapphire, aluminium oxide, aluminium nitride, diamond, quartz, other dielectric materials and combinations of the same.
  • the trench structures surround a silicon-based or other semiconductor-based substrate and extend down to a buried isolating layer to form a complete galvanic isolation around the substrate.
  • the buried isolating layer can natural be formed of any suitable insulating material, including that used for the trench structures.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)

Abstract

L'invention concerne un îlot (7) de matière, pourvu d'organes d'isolement. Cet îlot comprend une structure en tranchées, laquelle comprend une première tranchée d'isolement (4), entourée d'une seconde tranchée d'isolement (4'), ces tranchées étant reliées l'une à l'autre par au moins deux tranchées de liaison transversales (9).
EP98912848A 1997-03-26 1998-03-20 Isolement de tranchees Withdrawn EP1018155A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE9701126A SE511826C2 (sv) 1997-03-26 1997-03-26 Dikesisolering
SE9701126 1997-03-26
PCT/SE1998/000508 WO1998043292A1 (fr) 1997-03-26 1998-03-20 Isolement de tranchees

Publications (1)

Publication Number Publication Date
EP1018155A1 true EP1018155A1 (fr) 2000-07-12

Family

ID=20406333

Family Applications (1)

Application Number Title Priority Date Filing Date
EP98912848A Withdrawn EP1018155A1 (fr) 1997-03-26 1998-03-20 Isolement de tranchees

Country Status (10)

Country Link
US (1) US5977609A (fr)
EP (1) EP1018155A1 (fr)
JP (1) JP2001519096A (fr)
KR (1) KR100374456B1 (fr)
CN (1) CN1113406C (fr)
AU (1) AU6753698A (fr)
CA (1) CA2285273A1 (fr)
SE (1) SE511826C2 (fr)
TW (1) TW404000B (fr)
WO (1) WO1998043292A1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6573565B2 (en) * 1999-07-28 2003-06-03 International Business Machines Corporation Method and structure for providing improved thermal conduction for silicon semiconductor devices
EP1213762A1 (fr) * 2000-12-05 2002-06-12 Koninklijke Philips Electronics N.V. Dispositif d'isolation d'un élement électrique
JP2007220718A (ja) * 2006-02-14 2007-08-30 Toyota Motor Corp 半導体基板、その製造方法、および半導体装置
FR2901407A1 (fr) * 2006-05-18 2007-11-23 Commissariat Energie Atomique Circuit integre sur substrat du type semiconducteur sur isolant, a evacuation laterale de la chaleur
US8866255B2 (en) * 2008-03-12 2014-10-21 Infineon Technologies Austria Ag Semiconductor device with staggered oxide-filled trenches at edge region
US8809966B2 (en) * 2008-03-12 2014-08-19 Infineon Technologies Ag Semiconductor device
JP5489791B2 (ja) 2010-03-10 2014-05-14 三菱電機株式会社 電力用半導体装置の製造方法
JP6115408B2 (ja) 2013-08-29 2017-04-19 三菱電機株式会社 半導体装置
US20160247879A1 (en) * 2015-02-23 2016-08-25 Polar Semiconductor, Llc Trench semiconductor device layout configurations
CN111902920A (zh) * 2018-03-27 2020-11-06 松下电器产业株式会社 氮化物半导体装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01185936A (ja) * 1988-01-21 1989-07-25 Fujitsu Ltd 半導体装置
GB2226445B (en) * 1988-07-06 1992-07-15 Plessey Co Plc Silicon integrated circuit
US5561073A (en) * 1992-03-13 1996-10-01 Jerome; Rick C. Method of fabricating an isolation trench for analog bipolar devices in harsh environments
KR950021600A (ko) * 1993-12-09 1995-07-26 가나이 쯔또무 반도체 집적회로장치 및 그 제조방법
JPH07297273A (ja) * 1994-04-20 1995-11-10 Hitachi Ltd 半導体集積回路装置
US5614750A (en) * 1995-06-29 1997-03-25 Northern Telecom Limited Buried layer contact for an integrated circuit structure

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9843292A1 *

Also Published As

Publication number Publication date
SE511826C2 (sv) 1999-12-06
WO1998043292A1 (fr) 1998-10-01
US5977609A (en) 1999-11-02
KR20010005592A (ko) 2001-01-15
CN1257608A (zh) 2000-06-21
CA2285273A1 (fr) 1998-10-01
CN1113406C (zh) 2003-07-02
SE9701126D0 (sv) 1997-03-26
AU6753698A (en) 1998-10-20
TW404000B (en) 2000-09-01
JP2001519096A (ja) 2001-10-16
SE9701126L (sv) 1998-09-27
KR100374456B1 (ko) 2003-03-04

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