EP0816955A1 - Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis - Google Patents
Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis Download PDFInfo
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- EP0816955A1 EP0816955A1 EP97810403A EP97810403A EP0816955A1 EP 0816955 A1 EP0816955 A1 EP 0816955A1 EP 97810403 A EP97810403 A EP 97810403A EP 97810403 A EP97810403 A EP 97810403A EP 0816955 A1 EP0816955 A1 EP 0816955A1
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- EP
- European Patent Office
- Prior art keywords
- signal
- energy dissipation
- circuit
- electronic circuit
- microgenerator
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- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C19/00—Producing optical time signals at prefixed times by electric means
-
- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C10/00—Arrangements of electric power supplies in time pieces
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G19/00—Electric power supply circuits specially adapted for use in electronic time-pieces
-
- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C11/00—Synchronisation of independently-driven clocks
Definitions
- the present invention relates to an electronic circuit according to the preamble of claim 1 and a clockwork which contains such a circuit.
- CH 597636 (Ebauches S.A.) proposed the batteries of a clockwork to be replaced by a generator and a spring driving the generator.
- the clockwork described contains a spring that a via a gear train Time display and drives an alternating voltage generator.
- the generator feeds a rectifier, the rectifier feeds capacitive component, and the capacitive component feeds one electronic reference circuit with a stable crystal oscillator and a electronic control circuit.
- the electronic control circuit has one Comparator logic circuit and one with the output of the comparator logic circuit connected and through the comparator logic circuit in their Power consumption controllable energy dissipation circuit.
- An entrance The comparator logic circuit is with the electronic reference circuit and another input of the comparator logic circuit is with that Generator connected.
- the comparator logic circuit is designed so that a clock signal coming from the electronic reference circuit compares a clock signal originating from the generator, depending on the The result of this comparison is the size of the power consumption Energy dissipation circuit controls and in this way via the controller the control circuit power consumption the gear of the generator and thus regulates the course of the time display.
- EP 0239820 and EP 679968 describe various electronic circuits to regulate the speed a microgenerator, in which a monitoring circuit constantly Angular position of the rotor is monitored and brakes as soon as its Angular position is ahead. These circuits are, because of their sensitivity on errors and phase variations of the components, difficult to handle.
- the circuit can therefore work with a lower generator voltage, which is a Reduction in the size of the generator and the spring and an increase the power reserve of the movement allowed. Means are further described to periodically interrupt braking of the microgenerator so that a optimal charging of the capacities is guaranteed.
- the aim of the present invention is to provide a propose electronic control circuit that is particularly energetic in can be operated cheaply.
- FIG 1 is a block diagram of an inventive electronic circuit 11 for speed control of a Microgenerators shown.
- the electronic circuit is from the micro-generator 1, the speed of which it regulates, via a capacitance C3, which the from Generator temporarily stores energy supplied, fed.
- C3 which the from Generator temporarily stores energy supplied, fed.
- the Microgenerator 1 which generates an alternating voltage, is not supplied via a illustrated gear train driven by a spring, not shown.
- gears drive the time display (not shown).
- the electronic circuit 11 regulates the power consumption of one with the Microgenerator connected energy dissipation circuit 9 (Fig. 11) so that the frequency of rotation of the rotor of the microgenerator with the Reference frequency at the output of a frequency divider 5, the input of a crystal oscillator 3, 4 is fed, is synchronized.
- a microgenerator is used, which is described in patent application EP 96810901.7, the disclosure of which is expressly included here by reference.
- the nominal frequency of the alternating voltage of the microgenerator 1 is preferably 2 n Hz, where n is a natural number different from zero.
- the mechanical part of the clockwork is part of the prior art and is described, for example, in CH-597636.
- the microgenerator 1 is with the two inputs G- and G + electronic circuit 11 connected. Circuit 11 is preferred built as a single IC.
- the inputs G- and G + are with one Rectifier and voltage converter circuit 2 connected, their function is described further below with reference to FIGS. 2-5.
- the rectifier and voltage converter 2 charges a storage capacitor 10 (C3) that temporarily stores the electrical energy generated by the microgenerator is generated and gives the energy in the form of an essentially continuous voltage to the IC.
- the rectifier and Voltage converter 2 also uses two further capacitors 16 (C1) and 15 (C2).
- the capacitors C1, C2 and C3 are preferred external, although they could possibly be integrated in the IC 11.
- the Energy dissipation circuit connected in parallel with the microgenerator 1.
- the Energy dissipation circuit 9 could also on the other side of Rectifier and voltage converter 2, in parallel with the capacitor C3 switched, arranged.
- the energy dissipation circuit 9 consists of an ohmic resistance, the value of which by energy dissipation control means 30 (Fig. 10) is controlled.
- the energy dissipation circuit 9 could also consist of an adjustable power source. The Rotation speed of the rotor of the microgenerator 1 is thereby controlled by varying the resistance value.
- a stabilized one, in particular with reference to FIG. 6 described current source 32 generates various stabilized currents pp, pn, which for feeding the rectifier and voltage converter 2 and the Elements 3, 7, 31 are determined.
- the stabilized current source 32 obtains its Energy from the capacitance C3, which feeds the entire IC.
- An oscillator 3.4 provides a reference signal with a predetermined frequency.
- the oscillator 3.4 has a quartz 4, which is preferably mounted outside of the IC 11 and its vibrations are a reference frequency at the output of the Define oscillator 3. This reference frequency is determined using a Frequency divider 5 divided by a predetermined factor, which in will be described in detail with reference to Figures 7 and 8.
- the IC also includes a counter 6, which is detailed below Referring to Figure 9 will be described.
- a decrement input (DOWN) of the counter 6 is connected to the output of the frequency divider 5, during the increment input (UP) of the counter 6 via a Hysteresis comparator 7, which the zero transitions of the signal at the output of the microgenerator 1, and via an anti-coincidence circuit 8 with the microgenerator 1 is connected.
- the anti-coincidence circuit 8 prevents simultaneous entry of UP and DOWN pulses both inputs of counter 6, which would otherwise be an unpredictable one could assume behavior.
- the Anti-coincidence circuit the signals UP and DOWN on signals with different phase, which come from the frequency divider 5.
- the IC further includes an internal voltage doubler 31, which it allowed the energy dissipation control means 30 and Energy dissipation circuit 9 with a higher voltage HV> Vdd and to feed and control a lower voltage LV ⁇ Vss.
- the energy dissipation control means 30 control the Energy dissipation of the energy dissipation circuit 9 as a function of Reference signal, which is generated by the quartz oscillator 3.4 and from Signal that comes from the microgenerator 1. If the rotor of the Microgenerator 1 rotates too quickly, is the frequency of the signal between the Inputs G + and G- higher than the frequency of the reference signal on Output of the frequency divider 5. The counter 6 thus receives during one Time interval more pulses on its incremental input UP than on its DOWN decrement input; its count thus increases.
- the energy dissipation control means control the function of this value Resistance value of the energy dissipation circuit 9 and consequently the Energy dissipation in such a way that the microgenerator 1 is braked. In this way, the rotational frequency of the microgenerator 1, and thus also the course of the time display with the reference frequency, which from Quartz oscillator comes, synchronized.
- the regulation value B1: B31 which of the energy dissipation circuit 9 from the energy dissipation control means circuit 30 depends in this example from the counter value 6, that is, from the difference of Number of pulses of the UP signal, which come from the microgenerator, and the number of pulses DOWN, which come from the quartz oscillator 3.4, since the Start of the clock.
- the type of regulation is thus integral.
- Other Control types for example a control which is proportional to current frequency difference or to the gradient of the Frequency difference or a PID control (proportional-integral-derivative) can also be used.
- a control which is proportional to current frequency difference or to the gradient of the Frequency difference or a PID control (proportional-integral-derivative) can also be used.
- PID control proportional-integral-derivative
- the energy dissipation control means include one Hysteresis comparator 7, which the signals G +, G- on the two with the Microgenerator 1 compares the connected inputs.
- the signal on The output of the comparator 7 is thus a rectangular signal, which is its State with every change in polarity of the signal between the inputs G +, G- changes.
- the use of a hysteresis comparator allows filtering interference of the signal between the inputs G +, G-. To avoid unwanted changes in the value of the signal Gen, which lead to incorrect Increments and thus excessive braking of the Microgenerators could lead to other filter media, for example a Low pass or band filter, or a filter that only after a predefined Time period changes its state to be provided.
- the Hysteresis comparator 7 is fed by the current source 32.
- the rectification and voltage converter circuit 2 is on the Figures 2-5 shown.
- the first switch 19 preferably consists of a Field effect transistor, which immediately after starting the movement as simple diode acts.
- the voltage drop across the switch 19 is in this moment equal to the diode threshold voltage, about 400 mV.
- the comparators can work the transistors that act as switches through the comparators controlled. If the one provided by the voltage triplet circuit Voltage is higher than the voltage of the capacitor 10, the first Field effect transistor opened.
- the voltage drop across the channel of the However, field effect transistor is only about 10 mV. The loss of tension is used when using transistors and the transistors Comparators instead of diodes are therefore significantly reduced
- the clockwork's energy reserve is used more economically and the power reserve elevated.
- the field effect transistor 19 is only blocked again when the by the voltage C2 delivered voltage C2 again below the Voltage Vdd of the first capacitor 10 drops.
- the first switch 19 is controlled by a signal / ser, which output by a first comparator circuit 21 shown in FIG becomes.
- the comparator circuit 21 has a comparator 210, which compares the voltage on both sides of the switch 19. If the Voltage C2 on the left side of the switch is higher than the voltage Vdd on the right, the output of comparator 210 goes from 0 to 1.
- the offset voltage is + 2mV
- the Voltage difference across the switch 19 be 2mV or more so the output of comparator 210 goes to 1.
- a NAND gate 3081 which the frequency divider 5 emitted signals of 16kHz, 8kHz, 4 kHz, 2kHz and 1kHz combined there a signal p off.
- the pulsation signal p therefore always has the value 1, except once per 1 kHz cycle during a 16 kHz half cycle.
- This signal at the output of NAND gate 3081 is through an inverter 3082, which is connected to an AND gate 3083, inverted.
- a power on reset Signal rud the formation of which will be explained later with reference to FIG. 8, is delivered to the other entrance to gate 3083.
- the signal is around zero, then always one. That's how it is Signal mess, which is given by gate 3083, always zero, except after start-up if p has the logical state 1.
- the signal p at the output of the NAND gate 3081 is below other to the OR gate 3084, which also has a 32 kHz signal receives, which comes from the frequency divider 5.
- the signal r coming from the gate 3084 is always set to zero, except if p and the 32 kHz signal are zero at the same time, i.e. once per 1 kHz cycle during a half 32 kHz cycle.
- This signal is through the signal was validated and inverted using a 3085 NAND gate. This is how it works the signal latch, which is given by the gate 3085, only at zero over when r has taken the value 1 and if not rud at the same time Is zero.
- the latch signal is used to determine the state at the output of the comparators 20 and 21 in the memory elements 201, 211 in the Compare circuits 20, 21 to save.
- the signals mess and latch can only be generated if the The crystal oscillator and the divider chain work.
- the circuit must be designed in such a way that when starting the system the switches directly from the comparators can be controlled:
- the switches directly from the comparators can be controlled:
- the stress tripler 15, 16, 17, 18 contains a second one Capacitor 15 (C2) and a third capacitor 16 (C1) in series with the microgenerator 1 are connected at the inputs G + and G-.
- a second switch 17 is between the input G and the to ground set end of the third capacitor 16 with respect to the microgenerator switched.
- a third switch 18 is connected between the input G + and the End of the second capacitor 15 connected to the microgenerator, which is connected to the first switch 19. Switches 17 and 18 are controlled by a second comparator circuit 20 (FIG. 3), which the electrical potential of the input G-, which corresponds to the second Capacitor 15 is connected to the potential of the ground.
- the switches 17 and 18 also consist of Field effect transistors, which act as diodes in the blocked state.
- the switches 17 and 18 also consist of Field effect transistors, which act as diodes in the blocked state.
- the Capacities 15 and 16 are started by the Diode structures of transistors 17 and 18 loaded.
- the second comparator circuit 20 toggles at the next one Edge of the signal mess, and the state of the comparator is at the Edge of the latch signal is stored in memory element 201, and the switch controlled with the stored values.
- the two transistors 15 and 16 are then leading.
- the capacitors 15 and 16 are therefore alone loaded through the channel of transistors 17 and 18, which turns out to be energetically proves favorable. It should be noted that the one with the microgenerator 1 connected input G- via the channel of transistor 17 to ground is set as soon as the transistor 17 conducts.
- Comparators 200 and 210 are used fed with the voltage Vdd stored in the capacitor C3. in the further you need a power supply pp, or pn, which is accomplished by the current source 32, which is explained in FIG. 6.
- the comparators do not work as long as the currents pp and pn do not are high enough; in this case, its output remains in the zero state, such that the controlled switches 17, 18, 19 remain locked.
- the current source 32 consists of a classic current mirror. It contains a high value resistor 321, for example 300K ⁇ , which is between the ground and the source of an N-channel field effect transistor 322 is switched.
- the drain of transistor 322 is with the drain of the field effect transistor 323a and with the gate of 3 P-channel transistors 323a, 323b, 323c connected in series, the source of the the latter is fed with the voltage generated by the voltage converter 2.
- the drain of transistor 322 is further connected to the gate of the three P-channel field effect transistors 323a, 323b, 323c connected as a mirror circuit.
- the Current pp which is the channel of transistor 322 and resistor 321 traverses, feeds the comparator 200, which is explained in Figure 3.
- the drain of transistor 323a is with the drain of the N-channel transistor 322 connected and to the gate of the N-channel transistors 322a ', 322b ', 322c', 322d 'in series and as a mirror with respect to transistor 322 switched.
- the source of transistor 322a ' is connected to ground.
- the comparator 210 which is explained in FIG. 4.
- the size of the current can therefore be determined by the characteristics of the elements in the power source, especially the number Transistors and the size of their channels. It is so possible to release the currents pp and pn through the two branches of the mirror to determine.
- Such a current mirror has two equilibrium states. Of the the first has been described and is achieved when the currents pp and pn are the have reached the desired strength. The second state corresponds to the currents pp and pn equal to zero. This second state is reached when all Transistors are blocked. This condition exists especially if that System is energized, according to which the currents pp and pn are zero.
- An N-channel initialization transistor 320 is provided to operate at the start-up phase to force a current through the current mirror 32, so that he reaches his first state of equilibrium. The gate of transistor 320 is at ground while its source is connected to the G- des input Microgenerator 1 is connected. The drain of the initialization transistor will connected to the gate of the P-channel transistors.
- the micro-generator 1 floating with respect to the mass.
- the signal G-am The input of the microgenerator therefore oscillates approximately sinusoidal in terms of mass. If the input signal G- negative is, that is below the voltage of the ground, the transistor 320 permeable and the negative voltage of G- is applied to the gate of the P-channel transistor 323a ', 323b', 323c '. These transistors will be consequently suddenly conductive, such that only a current pn circulates that the Voltage at the gate of transistor 322 rises and this too passes a current pp. This current is, as explained above, to the Comparator 20 ( Figure 3) applied in the rectification and converter circuit 2, which starts to work.
- the output signal of the comparator circuit 20 changes its state as indicated in Figure 2 when the voltage at node G- is lower than Vss, and opens transistors 17 and 18, which the input G- of the microgenerator 1 with the mass and the input G + of the Micro generator connects with C2. As soon as the input G- with the mass is connected, the transistor 320 is blocked and from now on stops current to consume. The current source 2 is initialized from now on and the currents pp and pn quickly reach the desired value.
- the power source can be easily completed, for example by means of other N-channel transistors, the gate of which is connected to the drain of the Transistor 323a 'and the source are connected to ground.
- the current through these transistors can thus easily be used for the supply of others Components are controlled, for example by components of the Quartz oscillator 3.4.
- FIG. 7 illustrates a preferred embodiment of a frequency divider 50 of the present invention.
- the frequency divider consists of ten D flip-flops connected in series. The frequency of the signal is divided by 2 for each flip-flop. If the reference signal supplied at the input of the frequency divider 50 by the oscillator 3, 4 oscillates at 32 kHz, the frequency of the signal at the output of the divider 50 is 2 -10 * 32kHz, that is 32 Hz. This signal is transmitted by the circuit 500 with the 4 kHz signal combined to generate a signal DOWN, which assumes the logic state 1 once per cycle of 32 Hz and during a half cycle of 4 kHz.
- FIG. 8 explains a circuit 51 that performs a power-on reset Signal rud delivers. This signal is determined, among other things, the counter 6 reset to a predetermined value during initialization and the Turn off energy dissipation circuit 9.
- Circuit 51 includes FIG. 3 P-channel field effect transistors 510, 511, 512, which are in series with a P-channel transistor are arranged between the mass and the feed. The The gate of the three P-channel transistors receives the signal pp, which from the Power source 32 comes. During the initialization, the 3 transistors 510, 511 and 512 blocked as long as the current source 32 does not have enough Supplies electricity. The voltage at point 516 is therefore zero.
- the inverter 550 converts this voltage into a signal POR1, which is by means of an OR gate 528 is combined with a signal POR2.
- the signal at the output of the Gate 528 is connected to one of the two NOR gates 517 and 518 Forwarded flip-flops with 2 inputs.
- the other input of the flip-flop 517, 518 is connected to the output of a frequency divider 520, which consists of five flip-flops 521-526 is composed.
- the 32 Hz output signal that emitted by the frequency divider 50 is with the input of the first Flip flops 521 connected.
- the inputs / reset for resetting the flip-flops 521-526 are through an inverter 527 to the output of inverter 515 connected.
- the POR1 signal is one as long as the Power source does not provide enough power.
- the signal is similar POR2 One as long as the frequency from the frequency divider 5 is not one predetermined value reached.
- the signal at the output of gate 528 is therefore only zero when the quartz oscillator and the power source both function.
- the 3rd Transistors 510 to 512 transparent.
- the signal at point 516 is consequently Vdd such that the inverter 515 sends a signal POR1 with a returns logical value zero.
- the frequency divider 520 begins dividing the supplied 32 Hz frequency. After a second the signal goes out of the flip-flop 560 to 1. Since the two inputs of the flip-flop 517, 518 den received logic value 1, its output goes to zero, so that the signal rud reaches the logical value 1. This value is then maintained as long as the current value pp is sufficient and the Quartz oscillator also works.
- the signal POR1 does not go to one.
- the second power-on-reset signal POR2 goes to one as soon as the frequency from the frequency divider drops below a certain value. Thus appears after a short period of time the signal rud again, so that the switches 17, 18, 19 of the voltage converter also in this case directly from the Comparators 200, 210 are controlled.
- the startup of the Ics only ensured with the signal POR2 from the frequency divider.
- the signal POR2 remains at zero.
- FIG. 9 explains a preferred embodiment the counter circuit 6.
- the counter circuit 6 comprises one 6-bit counter 60 t.
- the counter 60 can be reset, for example, by six and D-type flip-flops connected in series.
- the binary number, which by The outputs Q1 through Q6 are formed by one unit at each Leading edge, which is delivered to input 601, to.
- the counter is reset to zero when a signal rushes to reset input 603 is delivered.
- the signals Q1-Q6, which are output by the counter 6, allow the coding of 64 different braking values.
- the Energy dissipation via the braking resistor Rf the Energy dissipation circuit 9 preferably develops in such a way as shown schematically on the diagram of Figure 10A. Between 0 and 31 is the frequency difference integrated by counter 6 between the microgenerator 1 and the oscillator 3, 4 low: none Braking initiated.
- FIG. 10 explains the energy dissipation control means 30 convert the signals Q1: Q6 from the counter into signals B1: B63, which the on Drive the energy dissipation circuit 9 explained in FIG. 11 directly.
- the energy dissipation circuit 9 is direct switched between the inputs G +, G- of the microgenerator.
- she consists from a large number of resistors 910 to 916 integrated on the IC Switches 900 to 906, which are determined by the energy dissipation control means 30 originating signals B1 to B5 and B62, B63 controlled allow the number of parallel ones to be modified Resistances.
- the values of the resistors 910 to 916 are according to FIG. 10A inversely proportional to the strength of the control signals B1 - B63: the signals B62 and B63 thus control braking more effectively than, for example, the signal B1.
- the switches 900 to 906 are N-channel field effect transistors. If the voltage at the gate of the transistor is at 0 the transistor blocks, it flows so no current through the transistor. But as soon as the voltage at the source of the corresponding transistor is below Vss, the transistor becomes conductive. This means that the generator is braked because now a current flows, since the Resistors connected between the terminals (G + and G-) of the generator are.
- the Generator a significantly higher speed than the nominal speed and thus the highest possible output voltage is achieved so that the circuit can start at all. But it is possible that the voltage at G + and G- comes to be below Vss, so that the generator is then braked, because the switching transistor for the brake becomes conductive. But if the high Speed and thus the high output voltage is not reached, the Do not start the circuit due to the voltage drop across the diodes.
- the generator does not go through when the system is started the energy dissipation circuit 9 is braked, it is necessary at least a P-channel field effect transistors and at least one N-channel To connect field effect transistors in series if they are to serve as switches, to switch braking resistors between G + and G-.
- This will solved according to the invention with the P-channel field effect transistor 920.
- the P channel Field effect transistor 920 can only conduct when the voltage at the gate is lower than a threshold below the source voltage.
- N-channel and P-channel transistors can only be close to Vss and Vdd can be used as good switches.
- Vss voltage on drain and Source
- the transistors act as switches can be used, the gate of the N-channel transistor must now a voltage higher than Vdd can be driven so that the transistor is good directs.
- the P-channel transistor whose gate has a Voltage that is at least one threshold lower than Vss must be so that the transistor is conductive.
- the transistor 920 is not driven with Vss, but rather with a signal LV, which in the active state has a much lower voltage than Vss has.
- the formation of LV in circuit 30 will be discussed further below described.
- the N-channel transistors 900: 906 cannot directly use the signals Q1: Q6 are driven from the counter because these signals cannot be higher than Vdd. Therefore, these transistors with the Signals B1: B63 driven, the logic states of which of Q1: Q6 correspond, but the voltages are doubled. To this purpose, the signals Q1 - Q5 with level shifters 301 - 305 in the Energy dissipation control means 30 into the output signals B1-B5 transformed.
- the level shifters 301-305 in Figure 10 are by a voltage HV fed, which by doubling the voltage Vdd on Capacitor C3 by means of a voltage doubler 31, not shown is obtained. So that the circuit can start reliably, the Voltage doubler can be built so that it also during initialization provides a voltage that is at least equal to Vdd. For example the voltage doubler 31 rud by the signal already described can be controlled so that it has a voltage Vdd during initialization delivers, and a doubled voltage HV, only after the signal rud changed its state when the quartz oscillator and the power source both work.
- the logical state «62» is represented by an AND gate 306 proven if the signals B2, B3, B4, B5 are all 1 (62 decimal expressed corresponds to 111110 binary).
- Gate 306 multiplies signals B2 to B5 and delivers a signal B62 with the logic state 1 only if the Counter value reached levels 30 or 31.
- a second AND gate multiplies B62 with B1 in such a way that the logical state «63» by means of a Signal B63 is detected.
- the signals B62 and B63 directly control the Transistors 905 and 906, respectively.
- the circuit 30 supplies the signal LV, which for driving the P-channel transistor 920 in the Energy dissipation circuit 9 is determined.
- the LV signal is from one Levelshifter 300 generated.
- the voltage from the LV signal in the active state at least one Threshold be lower than Vss.
- a transistor 3006 that how a diode works is between the other side of capacitance 3005 and the point / rud connected.
- the transistor 3006 has a threshold value Ue, e.g. 400mV.
- the level shifter 300 If the level shifter 300 supplies a voltage HV, it is in the capacity 3005 charged voltage AU HV-Ue. When the tension on Output of the level shifter 300 suddenly drops to Vss, the voltage drops of the LV signal to Vss- (HV-Ue), which allows transistor 920 to be in the bring conductive state.
- the signal / rud is one, see above LV remains at one and transistor 920 is turned off. Of the Transistor 920 can only conduct once the signal / rud is zero.
- the level shifter 300 is controlled by a signal / b such that the energy dissipation circuit 9 brakes when the signal / b is zero.
- the signal / b is emitted by a NAND gate 3080, which the signals Q6 and p logically combined.
- the signal / b is 1 if at least one of these two signals is zero. For example, if Q6 is zero, that means if the counter 6 has not reached at least level 16, is the signal / b 1 such that the energy dissipation circuit 9 only from stage 16 of the counter can brake, according to the diagram of Fig. 10a.
- the education of the pulsation signal p by circuit 308 has already been referenced to FIG. 5a explains.
- the pulsation signal p therefore always has the value 1, except once per 1 kHz cycle during a 16 kHz half cycle. This is to recharge the capacity that the LV generates.
- the braking by the pulsation signal p once every millisecond interrupted (pulsed braking). Solutions are also conceivable, however those with LV 1 and LV 2 and accordingly with 2 P-channel transistors is worked so that the brake does not have to be interrupted.
Abstract
Description
Claims (24)
- Elektronischer Schaltkreis zur Regelung der Rotationsgeschwindigkeit eines Mikrogenerators (1) enthaltend:einen ersten Eingang (G-) und einen zweiten Eingang (G+), die mit dem Mikrogenerator (1) verbunden werden können,einen Oszillator (3, 4) welcher ein Referenzsignal einer vorbestimmten Frequenz abgibt,eine Energiedissipationsschaltung (9) zur Bremsung des Mikrogenerators (1),Energiedissipationssteuermittel (5, 6, 7, 8, 30, 31) zur Steuerung der Energiedissipation der Energiedissipationsschaltung (9) in Abhängigkeit des Referenzsignals und des Signals zwischen den genannten Eingängen (G-, G+),eine Gleichricht- und Spannungswandlerschaltung (2) zur Gleichrichtung und Vervielfachung des Signales zwischen den genannten ersten und zweiten Eingängen, wobei die Gleichricht- und Spannungswandlerschaltung mindestens einen Kondensator (C1; C2; C3) enthält, welcher durch den genannten Mikrogenerator über mindestens einen Schalter (17, 18, 19) aufgeladen werden kann,mindestens eine Steuerschaltung (20; 21) des oder der genannten Schalter (17, 18, 19),
dass die genannte Steuerschaltung (20; 21) mindestens ein Speichermittel (201; 211) enthält, welches in einer ersten Phase bei gesperrtem Schalter mindestens ein Steuersignal, das auf die genannten Schalter (17, 18, 19) anzuwenden ist, speichert, und dass in einer zweiten Phase die genannten Schalter (17, 18, 19) mit dem genannten Steuersignal (ser/par) angesteuert werden. - Elektronischer Schaltkreis zur Regelung der Rotationsgeschwindigkeit eines Mikrogenerators (1) enthaltend:einen ersten Eingang (G-) und einen zweiten Eingang (G+), die mit dem Mikrogenerator (1) verbunden werden können,einen Oszillator (3, 4) welcher ein Referenzsignal einer vorbestimmten Frequenz abgibt,eine Energiedissipationsschaltung (9) zur Bremsung des Mikrogenerators (9),Energiedissipationssteuermittel (5, 6, 7, 8, 30, 31) zur Steuerung der Energiedissipation der Energiedissipationsschaltung (9) in Abhängigkeit des Referenzsignals und des Signals zwischen den genannten Eingängen (G-, G+), wobei die genannte Energiedissipationsschaltung (9) ein Netz von parallel geschaltenen Elementen aufweist, wobei jedes Element einen Widerstand (910 bis 916) in Reihe mit einem Schalter (900 : 906) enthält, wobei der Totalwiderstand der Energiedissipationsschaltung gesteuert werden kann, indem eine vorbestimmte Kombination von Schaltern (900 : 906) eingeschaltet wird,eine Gleichricht- und Spannungswandlerschaltung (2) zur Gleichrichtung und Vervielfachung des Signales zwischen den genannten ersten und zweiten Eingängen,dass die genannten Schalter (900 bis 906) in Reihe mit den genannten Widerständen (910 : 916) N-Kanal Feldeffekttransistoren sind,dass die genannte Energiedissipationsschaltung ausserdem mindestens einen in Reihe mit dem genannten Netz von parallel geschaltenen Elementen (900 : 916) verbundenen P-Kanal Feideffekttransistor (920) enthält,und dass der genannte Schaltkreis im weiteren Steuermittel (3080, 300) des genannten P-Kanal Feldeffekttransistor (920) aufweist, um den genannten P-Kanal Feldeffekttransistor bei der Inbetriebsetzung des Schaltkreises zu sperren, derart, dass die Bremsung des Mikrogenerators aufgehoben wird.
- Elektronischer Schaltkreis gemäss dem vorhergehenden Anspruch, dadurch gekennzeichnet, dass die genannten N-Kanal Transistoren mit einer Spannung höher als Vdd angesteuert werden,
und dass der genannte P-Kanal Feldeffekttransistor mit einer Spannung, die mindestens einen Schwellwert tiefer als Vss ist, angesteuert wird. - Elektronischer Schaltkreis zur Regelung der Rotationsgeschwindikeit eines Mikrogenerators in einem Uhrwerk, enthaltend:einen ersten Eingang (G-) und einen zweiten Eingang (G+), die mit dem Mikrogenerator (1) verbunden werden können,eine Gleichricht- und Spannungswandlerschaltung (2) für die Gleichrichtung und Vervielfachung des Signals zwischen den genannten ersten und zweiten Eingängen, wobei die Gleichricht- und Spannungswandlerschaltung mindestens einen zwischen dem genannten ersten Eingang (G-) und einem Referenzpunkt in diesem Schaltkreis verbundenen Schalter (17) und einen Komparator (20) zur Steuerung des ersten Schalters enthält,einen Oszillator (3,4) welcher ein Referenzsignal einer vorbestimmten Frequenz abgibt,eine Energiedissipationsschaltung zur Bremsung des Mikrogenerators (9),Energiedissipationssteuermittel (5, 6, 7, 8, 30, 31) zur Steuerung der Energiedissipation der Energiedissipationsschaltung (9) in Abhängigkeit des Referenzsignals und des Signals zwischen den genannten Eingängen (G-, G+),eine stabilisierte Stromquelle (32), welche insbesondere den genannten Komparator (20) in der Gleichricht- und Spannungswandlerschaltung (2) speist,
dass die genannte stabilisierte Stromquelle (32) einen Initialisierungstransistor (320) enthält, welcher das Einspeisen oder Entnehmen von Strom bei der Initialisierung in der genannten Stromquelle erlaubt. - Elektronischer Schaltkreis gemäss dem Anspruch 4, dadurch gekennzeichnet, dass der genannte Initialisierungstransistor (320) mit dem genannten ersten Eingang (G-) und dem Spannungsreferenzpunkt verbunden ist, derart, dass von der genannten Stromquelle ein Strom abgegeben oder aufgenommen wird, solange der genannte erste Eingang (G-) eine Potentialdifferenz zum genannten Referenzpunkt aufweist.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass der genannte Referenzpunkt die Masse ist und der genannte Initialisierungstransistor (320) ein N-Kanal-Feldeffekttransistor ist, dessen Gate an der Masse angeschlossen ist und dessen Source mit dem genannten ersten Eingang (G-) verbunden ist.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die genannte Steuerschaltung (20, 21) einen Komparator (200, 210) enthält.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass das Bremsen während jedem zweiten Zyklus des Signals vom Mikrogenerator gesperrt wird.
- Elektronischer Schaltkreis gemäss Anspruch 3, gekennzeichnet durch Levelshifter (301 bis 305), welche die Spannung der Signale (Q1 - Q5) zur Steuerung von den genannten P-Kanal Feldeffekttransistoren (900 - 906) erhöhen.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die genannte Energiedissipationsschaltung (9) zwischen den genannten zur Verbindung mit dem Mikrogenerator bestimmten Eingängen (G-, G), verbunden ist.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die genannte Energiedissipationsschaltung (9) zwischen den zur Verbindung mit dem genannten, durch den Mikrogenerator aufgeladenen, Kondensator (10) bestimmten Eingängen verbunden ist.
- Elektronischer Schaltkreis, gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die genannten Energiedissipationssteuermittel (5, 6, 7, 30, 31) einen Zähler (6) aufweisen, dessen Wert von der Frequenzdifferenz zwischen dem Generator (1) und dem Oszillator (3, 4) abhängt, wobei die Energiedissipation der Energiedissipationsschaltung vom genannten Zählerwert abhängig ist.
- Elektronischer Schaltkreis gemäss dem vorhergehenden Anspruch, dadurch gekennzeichnet, dass der Wert des Zählers (9) bei jedem Impuls eines Inkrementationsignals (UP), welches vom Signal zwischen den beiden Eingängen (G-, G+) stammt, zunimmt, und bei jedem Impuls eines Dekrementierungssignals (DOWN), welches vom genannten Oszillator (3, 4) stammt, abnimmt.
- Elektronischer Schaltkreis gemäss dem vorhergehenden Anspruch, dadurch gekennzeichnet, dass er Mittel (51, rud) enthält, um den genannten Zähler (6) auf einen vorbestimmten Wert zurückzusetzen, wenn der Schaltkreis unter Spannung gesetzt wird.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass er Initialisierungsmittel (51) enthält, die ein Signal (POR1) eines bestimmten Wertes abgeben, solange dass der durch die genannte stabilisierte Stromquelle (32) abgegebene Strom einen vorgegebenen Wert nicht erreicht, und ein Signal des entgegengesetzten Wertes abgegeben wird, sobald der durch die genannte stabilisierte Stromquelle (32) abgegebene Strom den genannten vorbestimmten Wert überschreitet.
- Elektronischer Schaltkreis gemäss einem dem vorhergehenden Ansprüche, dadurch gekennzeichnet, dass er Initialisierungsmittel enthält, die ein Signal (POR2) eines bestimmten Wertes abgeben, solange dass der Quarzoszillator nicht funktioniert, und ein Signal des entgegengesetzten Wertes abgegeben wird, sobald der Quarzoszillator funktioniert.
- Elektronischer Schaltkreis gemäss einem dem vorhergehenden Ansprüche, dadurch gekennzeichnet, dass er Initialisierungsmittel (51) enthält, die folgende Sinale abgeben :ein erstes Power-on-reset Signal (POR1) mit einem bestimmten Wert, solange dass der durch die genannte stabilisierte Stromquelle (32) abgegebene Strom einen vorgegebenen Wert nicht erreicht, und mit dem entgegengesetzten Wert, sobald der durch die genannte stabilisierte Stromquelle (32) abgegebene Strom den genannten vorbestimmten Wert überschreitet,ein zweites Power-on-reset Signal (POR2) mit einem bestimmten Wert, solange dass der Quarzoszillator nicht funktioniert, und mit dem entgegengesetzten Wert, sobald der Quarzoszillator funktioniert,und dass die Initialisierungsmittel ausserdem Mittel (528) enthalten, die beide Power-on-reset Signal (POR1, POR2) kombinieren.
- Elektronischer Schaltkreis gemäss einem der Ansprüche 15 bis 18, dadurch gekennzeichnet, dass die genannten Initialisierungsmittel (51) Verzögerungsmittel (510) enthalten.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die Energiedissipation der genannten Energiedissipationsschaltung (9) mindestens drei bestimmte Werte annehmen kann.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, gekennzeichnet durch Mittel (51) für die Minimalisierung der Energiedissipation der genannten Energiedissipationsschaltung (9), wenn der elektronische Schaltkreis unter Spannung gesetzt wird.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass der genannte Oszillator (3, 4) mit einem Frequenzteiler (50) verbunden ist.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die genannten Energiedissipationssteuermittel (5, 6, 7, 30, 31) folgende Komponenten aufweisen:einen Hysteresiskomparator (7), der das Signal zwischen den genannten ersten und zweiten Eingängen (G-, G+) vergleicht, undeine Antikoinzidenzschaltung (8), welche mit dem Ausgang des genannten Hysteresiskomparators (7) verbunden ist und das genannte Inkrementierungssignal (UP) abgibt.
- Elektronischer Schaltkreis gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass der genannte Gleichrichter und Spannungswandler (2) mindestens einen Kondensator (10, 15, 16) enthält, welcher über einen oder mehrere passive Elemente beim unter Spannung Setzen des elektronischen Schaltkreises geladen wird, wobei das oder die genannten passiven Elemente durch aktive Elemente (17, 18, 19) ersetzt werden, sobald die in dem oder den Kondensatoren (10, 15, 16) geladene Spannung genügt, um das oder die aktiven Elemente zu aktivieren.
- Uhrwerk enthaltend einen Schaltkreis gemäss einem der vorhergehenden Ansprüche.
Priority Applications (11)
Application Number | Priority Date | Filing Date | Title |
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DK96923940T DK0848842T3 (da) | 1996-06-26 | 1996-06-26 | Urværk |
EP02022189A EP1276024B1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
EP97810403A EP0816955B1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
DE59709745T DE59709745D1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
ES97810403T ES2196288T3 (es) | 1996-06-26 | 1997-06-25 | Circuito electronico y pieza de relojeria que contiene tal circuito. |
TW087102932A TW366444B (en) | 1997-06-25 | 1998-02-27 | Speed-control circuit |
US09/035,340 US6194878B1 (en) | 1997-06-25 | 1998-03-05 | Electronic speed control circuit |
SG1998000515A SG72793A1 (en) | 1997-06-25 | 1998-03-09 | Electronic speed-control circuit |
KR1019980007891A KR100547249B1 (ko) | 1997-06-25 | 1998-03-10 | 전자식 속도-제어회로 |
JP10075010A JP2933910B2 (ja) | 1997-06-25 | 1998-03-10 | 電子速度制御回路 |
US09/634,675 US6208119B1 (en) | 1997-06-25 | 2000-08-08 | Electronic speed-control circuit |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP1996/002791 WO1997009657A1 (de) | 1995-09-07 | 1996-06-26 | Uhrwerk |
WOPCT/EP96/02791 | 1996-06-26 | ||
EP97810403A EP0816955B1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP02022189A Division EP1276024B1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
Publications (2)
Publication Number | Publication Date |
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EP0816955A1 true EP0816955A1 (de) | 1998-01-07 |
EP0816955B1 EP0816955B1 (de) | 2003-04-09 |
Family
ID=8230273
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP02022189A Expired - Lifetime EP1276024B1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
EP97810403A Expired - Lifetime EP0816955B1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP02022189A Expired - Lifetime EP1276024B1 (de) | 1996-06-26 | 1997-06-25 | Elektronischer Schaltkreis und Uhrwerk enthaltend einen solchen Schaltkreis |
Country Status (9)
Country | Link |
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US (2) | US6194878B1 (de) |
EP (2) | EP1276024B1 (de) |
JP (1) | JP2933910B2 (de) |
KR (1) | KR100547249B1 (de) |
DE (1) | DE59709745D1 (de) |
DK (1) | DK0848842T3 (de) |
ES (1) | ES2196288T3 (de) |
SG (1) | SG72793A1 (de) |
TW (1) | TW366444B (de) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0891038A1 (de) | 1996-11-13 | 1999-01-13 | Seiko Epson Corporation | Stromversorgungsvorrichtung und tragbare elektronische einrichtung |
EP0905588A2 (de) * | 1997-09-30 | 1999-03-31 | Seiko Epson Corporation | Elektronisch geregelte mechanische Uhr und Regelverfahren dafür |
WO2000029910A1 (fr) * | 1998-11-17 | 2000-05-25 | Seiko Epson Corporation | Piece d'horlogerie mecanique a commande electronique |
EP1273984A1 (de) * | 2001-07-02 | 2003-01-08 | Conseils et Manufactures VLG SA | Elektronische Regelmodule für Uhrwerk mit mechanischer Aufziehung |
US6795378B2 (en) | 1997-09-30 | 2004-09-21 | Seiko Epson Corporation | Electronic device, electronically controlled mechanical timepiece, and control method therefor |
WO2014154467A1 (fr) | 2013-03-25 | 2014-10-02 | Richemont International Sa | Organe régulateur pour montre bracelet et procédé d'assemblage d'un organe régulateur pour montre bracelet |
US9348316B2 (en) | 2012-09-25 | 2016-05-24 | Richemont International Sa | Movement for mechanical chronograph with quartz regulator |
US9746831B2 (en) | 2012-12-11 | 2017-08-29 | Richemont International Sa | Regulating body for a wristwatch |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3627653B2 (ja) * | 1998-11-19 | 2005-03-09 | セイコーエプソン株式会社 | 電子制御式機械時計およびその制御方法 |
EP1215545A1 (de) | 2000-12-18 | 2002-06-19 | Asulab S.A. | Analoge elektronische Uhr mit Vorrichtung zur Zeitkorrektur nach einer mangelhaften Energiezufuhr |
JP3627660B2 (ja) * | 2001-02-28 | 2005-03-09 | セイコーエプソン株式会社 | 電子機器、電子制御式機械時計、電子機器の制御プログラム、記録媒体、電子機器の制御方法および電子機器の設計方法 |
US6826124B2 (en) * | 2002-12-04 | 2004-11-30 | Asulab S.A. | Timepiece with power reserve indication |
EP1544692B1 (de) * | 2003-12-16 | 2007-03-14 | Asulab S.A. | Elektromechanische Uhr, die mit einer Gangreserveanzeige ausgerüstet ist |
JP5707761B2 (ja) * | 2010-07-20 | 2015-04-30 | 日産自動車株式会社 | 欠相診断装置及び欠相診断方法 |
CH705679B1 (fr) | 2011-10-28 | 2017-01-31 | Swatch Group Res & Dev Ltd | Circuit d'autorégulation de la fréquence d'oscillation d'un système mécanique oscillant, et dispositif le comprenant. |
EP2590035B1 (de) * | 2011-11-01 | 2020-12-30 | The Swatch Group Research and Development Ltd. | Schaltkreis zur Selbstregulierung der Schwingungsfrequenz eines schwingenden mechanischen Systems, und diesen umfassende Vorrichtung |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH597636B5 (de) * | 1972-11-21 | 1978-04-14 | Ebauches Sa | |
US4141064A (en) * | 1976-11-29 | 1979-02-20 | Kabushiki Kaisha Suwa Seikosha | Booster circuit |
EP0239820A1 (de) * | 1986-03-26 | 1987-10-07 | Asulab S.A. | Umformer von mechanischer in elektrische Energie |
JPS63190562A (ja) * | 1987-01-29 | 1988-08-08 | Nec Corp | 倍電圧整流回路 |
WO1997009657A1 (de) * | 1995-09-07 | 1997-03-13 | Konrad Schafroth | Uhrwerk |
DE19638616A1 (de) * | 1995-09-29 | 1997-05-15 | Citizen Watch Co Ltd | Elektronische Uhr und Verfahren zum Betreiben der elektronischen Uhr |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4519024A (en) * | 1983-09-02 | 1985-05-21 | At&T Bell Laboratories | Two-terminal transistor rectifier circuit arrangement |
US4799003A (en) * | 1987-05-28 | 1989-01-17 | Tu Xuan M | Mechanical-to-electrical energy converter |
KR940006915B1 (ko) * | 1988-01-25 | 1994-07-29 | 세이꼬 엡슨 가부시끼가이샤 | 발전 장치 부착 전자 팔목시계 |
JP3000633B2 (ja) * | 1990-07-18 | 2000-01-17 | セイコーエプソン株式会社 | 電子機器 |
US5668414A (en) | 1994-07-04 | 1997-09-16 | Seiko Epson Corporation | Spring driven electricity generator with a control circuit to regulate the release of energy in the spring |
JP3058813B2 (ja) | 1994-07-04 | 2000-07-04 | セイコーエプソン株式会社 | 発電装置およびその制御方法 |
JP3174245B2 (ja) * | 1994-08-03 | 2001-06-11 | セイコーインスツルメンツ株式会社 | 電子制御時計 |
FR2752070B1 (fr) * | 1996-08-01 | 1998-09-18 | Asulab Sa | Piece d'horlogerie electronique comportant une generatrice entrainee par un barillet a ressort |
US6041021A (en) * | 1997-09-30 | 2000-03-21 | Seiko Epson Corporation | Electronically controlled mechanical timepiece and control method therefor |
-
1996
- 1996-06-26 DK DK96923940T patent/DK0848842T3/da active
-
1997
- 1997-06-25 ES ES97810403T patent/ES2196288T3/es not_active Expired - Lifetime
- 1997-06-25 DE DE59709745T patent/DE59709745D1/de not_active Expired - Lifetime
- 1997-06-25 EP EP02022189A patent/EP1276024B1/de not_active Expired - Lifetime
- 1997-06-25 EP EP97810403A patent/EP0816955B1/de not_active Expired - Lifetime
-
1998
- 1998-02-27 TW TW087102932A patent/TW366444B/zh active
- 1998-03-05 US US09/035,340 patent/US6194878B1/en not_active Expired - Lifetime
- 1998-03-09 SG SG1998000515A patent/SG72793A1/en unknown
- 1998-03-10 JP JP10075010A patent/JP2933910B2/ja not_active Expired - Fee Related
- 1998-03-10 KR KR1019980007891A patent/KR100547249B1/ko not_active IP Right Cessation
-
2000
- 2000-08-08 US US09/634,675 patent/US6208119B1/en not_active Expired - Lifetime
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH597636B5 (de) * | 1972-11-21 | 1978-04-14 | Ebauches Sa | |
US4141064A (en) * | 1976-11-29 | 1979-02-20 | Kabushiki Kaisha Suwa Seikosha | Booster circuit |
EP0239820A1 (de) * | 1986-03-26 | 1987-10-07 | Asulab S.A. | Umformer von mechanischer in elektrische Energie |
JPS63190562A (ja) * | 1987-01-29 | 1988-08-08 | Nec Corp | 倍電圧整流回路 |
WO1997009657A1 (de) * | 1995-09-07 | 1997-03-13 | Konrad Schafroth | Uhrwerk |
DE19638616A1 (de) * | 1995-09-29 | 1997-05-15 | Citizen Watch Co Ltd | Elektronische Uhr und Verfahren zum Betreiben der elektronischen Uhr |
Non-Patent Citations (2)
Title |
---|
HAYAKAWA M: "A STUDY OF THE NEW ENERGY SYSTEM FOR QUARTZ WATCHES (II) - THE EFFECTIVE CIRCUIT FOR THE SYSTEM", ACTE DU CONGRES, no. 1, 23 September 1988 (1988-09-23), pages 81 - 85, XP000035001 * |
PATENT ABSTRACTS OF JAPAN vol. 012, no. 469 (E - 691) 8 December 1988 (1988-12-08) * |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0891038A1 (de) | 1996-11-13 | 1999-01-13 | Seiko Epson Corporation | Stromversorgungsvorrichtung und tragbare elektronische einrichtung |
EP0905588A2 (de) * | 1997-09-30 | 1999-03-31 | Seiko Epson Corporation | Elektronisch geregelte mechanische Uhr und Regelverfahren dafür |
EP0905588A3 (de) * | 1997-09-30 | 2001-01-31 | Seiko Epson Corporation | Elektronisch geregelte mechanische Uhr und Regelverfahren dafür |
US6373789B2 (en) | 1997-09-30 | 2002-04-16 | Seiko Epson Corporation | Electronically controlled mechanical timepiece and method controlling the same |
US6795378B2 (en) | 1997-09-30 | 2004-09-21 | Seiko Epson Corporation | Electronic device, electronically controlled mechanical timepiece, and control method therefor |
WO2000029910A1 (fr) * | 1998-11-17 | 2000-05-25 | Seiko Epson Corporation | Piece d'horlogerie mecanique a commande electronique |
US6633511B1 (en) | 1998-11-17 | 2003-10-14 | Seiko Epson Corporation | Electronic controlling type mechanical timepiece |
EP1273984A1 (de) * | 2001-07-02 | 2003-01-08 | Conseils et Manufactures VLG SA | Elektronische Regelmodule für Uhrwerk mit mechanischer Aufziehung |
US6744699B2 (en) | 2001-07-02 | 2004-06-01 | Richemont International Sa | Electronic regulation module for the movement of a mechanically wound watch |
US9348316B2 (en) | 2012-09-25 | 2016-05-24 | Richemont International Sa | Movement for mechanical chronograph with quartz regulator |
US9746831B2 (en) | 2012-12-11 | 2017-08-29 | Richemont International Sa | Regulating body for a wristwatch |
WO2014154467A1 (fr) | 2013-03-25 | 2014-10-02 | Richemont International Sa | Organe régulateur pour montre bracelet et procédé d'assemblage d'un organe régulateur pour montre bracelet |
Also Published As
Publication number | Publication date |
---|---|
ES2196288T3 (es) | 2003-12-16 |
JP2933910B2 (ja) | 1999-08-16 |
SG72793A1 (en) | 2000-05-23 |
EP1276024B1 (de) | 2011-12-21 |
EP1276024A2 (de) | 2003-01-15 |
DE59709745D1 (de) | 2003-05-15 |
JPH1123743A (ja) | 1999-01-29 |
KR100547249B1 (ko) | 2006-03-23 |
US6208119B1 (en) | 2001-03-27 |
US6194878B1 (en) | 2001-02-27 |
DK0848842T3 (da) | 1999-11-08 |
KR19990006361A (ko) | 1999-01-25 |
EP0816955B1 (de) | 2003-04-09 |
EP1276024A3 (de) | 2007-05-02 |
TW366444B (en) | 1999-08-11 |
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