EP0571230B1 - Tablette intégrée avec un dispositif d'affichage avec réduction de bruit pendant la détection de coordonnées - Google Patents

Tablette intégrée avec un dispositif d'affichage avec réduction de bruit pendant la détection de coordonnées Download PDF

Info

Publication number
EP0571230B1
EP0571230B1 EP93303976A EP93303976A EP0571230B1 EP 0571230 B1 EP0571230 B1 EP 0571230B1 EP 93303976 A EP93303976 A EP 93303976A EP 93303976 A EP93303976 A EP 93303976A EP 0571230 B1 EP0571230 B1 EP 0571230B1
Authority
EP
European Patent Office
Prior art keywords
detection
circuit
coordinate
segment
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP93303976A
Other languages
German (de)
English (en)
Other versions
EP0571230A1 (fr
Inventor
Takao Tagawa
Kazunari c/o Raporu Tenri-ryo Okamura
Kengo Takahama
Noritoshi Kako
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP13068592A external-priority patent/JP2798552B2/ja
Priority claimed from JP28155992A external-priority patent/JP3051270B2/ja
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to EP98100532A priority Critical patent/EP0843278B1/fr
Publication of EP0571230A1 publication Critical patent/EP0571230A1/fr
Application granted granted Critical
Publication of EP0571230B1 publication Critical patent/EP0571230B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0441—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using active external devices, e.g. active pens, for receiving changes in electrical potential transmitted by the digitiser, e.g. tablet driving signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Definitions

  • the present invention relates to a display-integrated type tablet device for use in a personal computer, a word processor, or the like.
  • a display-integrated type tablet device which is formed by laminating an electrostatic induction type tablet on a liquid crystal display and is capable of receiving an input of a letter or a figure into its electrostatic induction type tablet as if the letter or figure were written on paper by writing implements.
  • electrodes are viewed as a grating on the display screen due to a difference in reflectance or transmittance between a portion having an electrode and a portion having no electrode, which has been a cause of degrading the quality of an image displayed on the liquid crystal display screen.
  • electrodes concurrently serve as image display electrodes of a liquid crystal display (LCD) and as coordinate detection electrodes of an electrostatic type tablet device.
  • LCD liquid crystal display
  • coordinate detection electrodes of an electrostatic type tablet device There are provided in one frame period a coordinate detection period when designated coordinates on the tablet are detected and an image display period when an image is displayed as shown in Fig. 11 to time-sharingly effect the coordinate detection and image display.
  • an LCD panel 101 is constructed by interposing liquid crystals between common electrodes Y 1 through Y n (an arbitrary common electrode represented by Y hereinafter) and segment electrodes X 1 through X m (an arbitrary segment electrode represented by X hereinafter) which are arranged at right angles to each other, in which each portion where a common electrode Y and a segment electrode X cross each other constitutes each pixel.
  • n ⁇ m dot pixels are arranged in matrix in the LCD panel 101.
  • the above-mentioned display-integrated type tablet device has an advantage of permitting cost reduction as well as compact and light weight design by virtue of the concurrent use of the electrodes and drive circuits as those of the liquid crystal display and those of the electrostatic induction type tablet in addition to an advantage of making the grating-shaped electrodes invisible for a better image presentation in contrast to the conventional type formed by laminating the electrostatic induction type tablet on the liquid crystal display.
  • a common electrode drive circuit 102 for driving the common electrode Y and a segment electrode drive circuit 103 for driving the segment electrode X are connected to a display control circuit 105 and a detection control circuit 106 via a switching circuit 104.
  • the switching circuit 104 is controlled by a control circuit 107 so that it outputs an output signal from the display control circuit 105 to the common electrode drive circuit 102 and the segment electrode drive circuit 103 in an image display period or outputs an output from the detection control circuit 106 to the common electrode drive circuit 102 and the segment electrode drive circuit 103 in a coordinate detection period.
  • the switching circuit 104, the display control circuit 105, the detection control circuit 106, and the control circuit 107 are expressed dividedly in blocks in Fig. 15, the circuits are integrated in an LSI (Large Scale Integrated) circuit in practice. Therefore, the LSI cannot be strictly sectioned into such blocks in a practical circuit arrangement.
  • LSI Large Scale Integrated
  • a mode signal ( mode ) output from the control circuit 107 to the segment electrode drive circuit 103 and to the switching circuit 104 is switched to an image display mode. Consequently, the segment electrode drive circuit 103 selects the image display mode, while the switching circuit 104 switches so as to select and output an output signal from the display control circuit 105.
  • the above-mentioned clock signal cp1 is a clock signal which has a period when pixels in one line display an image, and the signal is input as a clock signal cp1o to a clock input terminal YCK of the common electrode drive circuit 102 and a latch pulse input terminal XLP of the segment electrode drive circuit 103 via an output terminal CP1O of the switching circuit 104.
  • the shift data s which is a pulse signal for selecting a specified common electrode Y is input as shift data (so) to a shift data input terminal DIO1 of the common electrode drive circuit 102 in synchronization with the clock signal cp1o via an output terminal SO of the switching circuit 104.
  • the pulse position of the shift data so is shifted in a shift register in synchronization with the clock signal cp1o, and drive pulses of a common electrode drive signal are applied to the common electrodes Y 1 through Y n from output terminals O1 through On of the common electrode drive circuit 102 in correspondence with the shift position.
  • the common electrode drive signal is generated based on bias power sources V 0 through V 5 supplied from a DC power supply circuit 112.
  • the above-mentioned clock signal cp2 is a clock signal which has a period being a division of a period when pixels in one line displays an image, and the signal is input as a clock signal cp2o to a clock input terminal XCK of the segment electrode drive circuit 103 via an output terminal CP20 of the switching circuit 104.
  • the image display data D 0 through D 3 are input as display data D 0 o through D 3 o to input terminals XD0 through XD3 of the segment electrode drive circuit 103 via output terminals D0O through D3O of the switching circuit 104, and then successively taken into a register in the segment electrode drive circuit 103 in synchronization with the clock signal cp2o .
  • the display data taken in are latched at a timing of the clock signal cp1o input to the latch pulse input terminal XLP.
  • drive pulses of the segment electrode drive signal corresponding to the display data are applied from output terminals O1 through Om of the segment electrode drive circuit 103 to the segment electrodes X 1 through X m .
  • the segment drive signal is also generated based on the bias power sources V 0 through V 5 supplied from the DC power supply circuit 112.
  • the inversion signal fr is a signal for preventing the possible deterioration of the liquid crystals due to electrolysis by periodically inverting the direction of voltage application to the liquid crystals in the image display period.
  • the inversion signal fr is input as an inversion signal fro to an inversion signal input terminal YFR of the common electrode drive circuit 102 and an inversion signal input terminal XFR of the segment electrode drive circuit 103 via an inversion signal output terminal FRO of the switching circuit 104.
  • the pixel matrix of the LCD panel 101 is line-sequentially driven by the operations of the above-mentioned common electrode drive circuit 102 and the segment electrode drive circuit 103 to display an image corresponding to the display data D 0 through D 3 on the LCD panel 101.
  • the mode signal ( mode ) output from a control circuit 107 to the segment electrode drive circuit 103 and to the switching circuit 104 is switched to a coordinate detection mode. Consequently, the segment electrode drive circuit 103 selects the coordinate detection mode, while the switching circuit 104 switches so as to select and output an output signal from the detection control circuit 106.
  • the clock signal cp1d is a clock signal which has a period when one common electrode Y or one segment electrode X is scanned, and the signal is input as the clock signal cp1o to the clock input terminal YCK of the common electrode drive circuit 102 and the latch pulse input terminal XLP of the segment electrode drive circuit 103 via the output terminal CP1O of the switching circuit 104.
  • the shift data sd which is a pulse signal for selecting a specified common electrode Y or segment electrode X is input as the shift data ( so ) to the shift data input terminal DIO1 of the common electrode drive circuit 102 or to a data input terminal EIO1 of the segment electrode drive circuit 103 via the output terminal SO of the switching circuit 104 in synchronization with the aforementioned clock signal cp1d .
  • the pulse position of the shift data so input to the common electrode drive circuit 102 is shifted in a shift register in synchronization with the clock signal cp1o, and scanning pulses of common electrode drive signals y 1 through y n (arbitrary common electrode scanning signal represented by y hereinafter) are successively applied from the output terminals O1 through On corresponding to the shift position to the common electrodes Y 1 through Y n .
  • the common electrode scanning signal y is generated based on the bias power sources V 0 through V 5 supplied from the DC power supply circuit 112.
  • the pulse position of the shift data so input to the segment electrode drive circuit 103 which has been selected to be in the coordinate detection mode is shifted in a shift register in synchronization with the clock signal cp1o, and scanning pulses of segment electrode drive signals x 1 through x n (arbitrary segment electrode scanning signal represented by x hereinafter) are successively applied from the output terminals O1 through Om corresponding to the shift position to the segment electrodes X 1 through X m .
  • the segment electrode X may be scanned in the following manner. That is, the segment electrode scanning signal x is output to the segment electrodes X 1 through X m from the output terminals O1 through Om of the segment electrode drive circuit 103 while making any bit of the drive data D 0 d through D 3 d output from the detection control circuit 106 serve as the shift data sd and making the clock signal cp2d serve as a sync signal.
  • the clock signal cp2d is a clock signal which has a period when the segment electrode X is scanned, and the signal is input as the clock signal cp2o to the clock input terminal XCK of the segment electrode drive circuit 103 via the output terminal CP2O of the switching circuit 104.
  • the drive data D 0 d through D 3 d are input as drive data D 0 o through D 3 o to the input terminals XD0 through XD3 of the segment electrode drive circuit 103 via the output terminals D0O through D30 of the switching circuit 104, and then successively taken into the register of the segment electrode drive circuit 103 in synchronization with the clock signal cp2o. Then scanning pulses of the segment electrode scanning signals x 1 through x m corresponding to the above-mentioned drive data are output from the output terminals O1 through O m of the segment electrode drive circuit 103 to segment electrodes X 1 through Xm.
  • the segment electrode scanning signal x is also generated based on the bias power sources V 0 through V 5 supplied from the DC power supply circuit 112.
  • the output terminal EIO2 of the segment electrode drive circuit 103 is the output terminal of the final stage of the shift register, and the output terminal EIO2 outputs a pulse signal seio2 having the same pulse width as that of the shift data sd as shown in Fig. 13.
  • the segment electrode scanning signal x is also generated based on the bias power sources V 0 through V 5 supplied from the DC power supply circuit 112.
  • Fig. 15 is a timing chart of the scanning signals in the coordinate detection period of the above-mentioned display-integrated type tablet device.
  • the coordinate detection period is separated into an x-coordinate detection period and a subsequent y-coordinate detection period.
  • scanning pulses of the segment electrode scanning signal x are successively applied to the segment electrode X.
  • scanning pulses of the common electrode scanning signal y are successively applied to the common electrode Y.
  • the scanning pulse voltage of the segment electrode scanning signal x or the common electrode scanning signal y for one of the segment electrode X or the common electrode Y to be scanned (the voltage referred to as the "scanning voltage” hereinafter) is set at the bias power source V 5 supplied from the DC power supply circuit 112.
  • the scanning pulse voltage of the segment electrode scanning signal x or the common electrode scanning signal y for the other of the segment electrode X or the common electrode Y to be not scanned (the voltage referred to as the "non-scanning voltage” hereinafter) is set at the bias power source V 1 supplied from the DC power supply circuit 112.
  • a voltage is induced at a designation coordinate detection pen (referred to merely as the "detection ten" hereinafter) 108 as shown in Fig.12 (b) due to a floating capacitance between the segment electrode X or the common electrode Y and a tip electrode of the detection pen 108 as shown in Fig.12 (a).
  • the voltage induced at the detection pen 108 is amplified in an amplifier 109 and then converted into a binary signal as shown in Fig. 12 (c) to be input to an x-coordinate detection circuit 110 and a y-coordinate detection circuit 111.
  • the x-coordinate detection circuit 110 and the y-coordinate detection circuit 111 detect the x-coordinate value or the y-coordinate value of a position designated by the detection pen 108 by detecting a period "T" from the time when the scanning voltage signal V 5 is applied to the time when an induction voltage takes its maximum value based on an output from the amplifier 109 and a timing signal from the control circuit 107.
  • Fig. 16 shows a relation in position between the LCD panel 101 and the detection pen 108.
  • a stress is applied to a polarizer 114 and an LCD enclosure glass plate 115 to modulate the transmittance of the LCD panel 101, and consequently so-called a Newton-ring-shaped pattern appears. Therefore, a transparent protection plate 116 such as glass or acrylic resin is interposed between the LCD panel 101 and the detection pen 108 to provide an air gap 117 so as not to apply any stress onto the LCD panel 101.
  • the stress onto the LCD panel 101 can be avoided but the transparent protection plate 116 is significantly deformed by the stress, which results in greatly varying the distance between the segment electrode X as well as the common electrode Y (referred to merely as the "scanning electrode” hereinafter) and a detection electrode 113 of the detection pen 108.
  • coordinate detection is effected taking advantage of an electrostatic induction phenomenon. Therefore, the output of the detection pen 108 varies in reverse proportion to the distance between the scanning electrodes X and Y and the detection electrode 113.
  • rcd 1 through rcd n are internal resistance values of the common electrode drive circuit 102
  • rsd 1 through rsd m are internal resistance values of the segment electrode drive circuit 103
  • rc 1'1 through rc n'm are resistance values of the common electrodes
  • rs 1'1 through rs n'm are resistance values of the segment electrodes
  • each of C 1'1 through C n'm is a capacitance of one pixel of the LCD.
  • each of the capacitors of segment electrodes to which is applied the voltage V 0 has no electric charge
  • each of the capacitors of the segment electrodes to which is applied the voltage V 5 has an electric charge of (V 5 - V 0 )/n/C. It is noted that the voltage V 5 is simultaneously applied to four segment electrodes in Fig. 18.
  • the charge and discharge currents of the capacitors flow into the common electrode drive circuit 102 at the time of starting the scanning of the segment electrode X (the voltage V 5 is applied only to the segment electrode X 1 closest to the common electrode drive circuit 102), and therefore a voltage drop takes place because of the output impedance of the common electrode drive circuit 102. Such a voltage drop is superimposed on the entire common electrodes.
  • a voltage drop due to the resistance of the common electrodes is additionally superimposed at the time of ending the scanning of the segment electrode X (the voltage V 5 is applied only to the segment electrode X m farthest from the common electrode drive circuit 102) as shown in Fig. 21, and therefore an increased amount of noise takes place at the scanning end time as compared with the scanning start time.
  • the electrostatic coupling between the detection electrode 113 of the detection pen 108 and the common electrodes is strong, and the electrostatic coupling between the detection electrode 113 and the segment electrodes is very weak. Therefore, the noise superimposed on the common electrodes exerts great influence.
  • the analog output of the detection pen 108 is converted into a binary signal with a fixed threshold to obtain a coordinate pulse
  • the detection signal induced at the detection pen 108 in scanning the segment electrodes has a degraded signal-to-noise ratio as shown in Fig. 22.
  • the detection signal of the detection pen 108 is obtained as a signal of which DC component is lost.
  • an LCD image display polarity inversion pulse, a y-coordinate detection pulse, and an x-coordinate detection pulse can be obtained as analog signals respectively in the image display period, the y-coordinate detection period, and the x-coordinate detection period.
  • Fig. 13 shows a timing chart of a segment electrode scanning signal x applied to the segment electrode X of the LCD panel 101 and waveforms of the output signal from the detection pen 108 or the amplifier 109 in the x-coordinate detection period.
  • Fig. 14 shows an equivalent circuit of the common electrode drive circuit 102 and the segment electrode drive circuit 103 in the x-coordinate detection period.
  • switch units S 1 , S 2 , ... S m in the segment electrode drive circuit 103 successively apply the scanning voltage V 5 to each segment electrode X
  • switch units S 1 ', S 2 ', ... S m ' in the common electrode drive circuit 102 successively apply the scanning voltage v 5 to each common electrode Y.
  • the switch units are each composed of a CMOS (Complementary Metal Oxide Semiconductor) silicon gate circuit.
  • resistors r c1 , r c5 , r s1 , and r s5 are on-resistors.
  • the above-mentioned switch units S 1 , S 2 , ... S m- 1 , S m in the segment electrode drive circuit 103 are switched to the voltage V 5 sequentially from S 1 to S m .
  • the scanning voltage V 5 of the segment electrode scanning signal x is applied to the segment electrode X sequentially from a segment electrode X 1 located at an end of the LCD panel 101 to a segment electrode X m located at the other end as shown in Fig. 13.
  • the switch units S 2 , S 3 , and S 4 are switched to the voltage V 5 to apply the scanning voltage to the segment electrodes X 2 , X 3 , and X 4
  • the other switch units S 1 , S 5 , ... S m are switched to the voltage V 1 to apply the non-scanning voltage to the segment electrodes X 1 , X 5 , ... X m .
  • the induction voltage actually obtained through the segment electrode scanning has a waveform as shown by a waveform (d) in Fig. 13, where noise components F and R are detected at the scanning start time and at the scanning end time.
  • Fig. 13 shows a waveform (e) obtained by differentiating twice the induction voltage signal (referred to as the "detection signal” hereinafter) as shown by a waveform (d) in Fig. 13 in the amplification stage of the amplifier 109 to obtain a binary pulse as narrow as possible.
  • the voltage induced at the detection pen 108 when the detection pen 108 is placed on the LCD panel 101 ideally has a waveform as shown by a waveform (c) in Fig. 13.
  • a detection signal having such an ideal waveform can be obtained when scanning the electrodes placed in the upper position closer to the detection pen 108 as in the case of the common electrode Y as shown in Figs. 10, 12 (a), and 14.
  • the detection signal peak S appears at the time of starting or ending the scanning in the x-coordinate detection period. Therefore, the induction noise peak F or the induction noise peak R is superimposed on the detection signal peak S to result in a problem that the accuracy in detecting the x-coordinate by means of the tip end of the detection pen is degraded.
  • the voltage at the common electrode Y which should be the non-scanning voltage V 1 shifts slightly to the scanning voltage V 5 (to the lower voltage side) of the segment electrode X as shown by a waveform (a) in Fig. 13.
  • the detection pen 108 when the detection pen 108 is put close to the LCD panel 101 in the condition as shown in Fig. 14, there is induced a voltage as shown by the waveform (d) in Fig. 13 containing the wavy induction noise peaks F and R as shown by the waveform (b) in Fig. 13 attributed to the voltage induced at the common electrode Y as shown by the waveform (a) in Fig. 13 in addition to the detection signal peak S at the detection electrode of the detection pen 108.
  • the output signal from the amplifier 109 is to have a waveform (e) as shown in Fig. 13.
  • the segment electrode X placed in the lower position faces the detection electrode of the detection pen 108 by way of a gap attributed to the common electrodes Y. Therefore, the electrostatic coupling force between the common electrode Y and the detection electrode of the detection pen 108 is much greater than the electrostatic coupling force between the segment electrode X and the detection electrode. Therefore, despite that the voltage at the common electrode Y shifted toward the side of the lower voltage is extremely low as shown by the waveform (a) in Fig. 13, the voltage induced at the detection electrode based on the slight voltage variance has the same level as that of the detection signal peak S.
  • the induction noise peaks F and R can be separable from the detection signal peak S as shown by the waveform (d) in Fig. 13, and therefore the induction noise peaks F and R exert less influence.
  • the detection pen 108 when the detection pen 108 is located near the segment electrode X 1 or the segment electrode X m , the detection signal peak S and the induction noise peaks F and R are superimposed on each other, the detection signal peak S is to have a complicatedly distorted waveform. Therefore, even when the detection signal is converted into a binary signal, the correct x-coordinate of the tip of the detection pen 108 cannot be detected.
  • the induction noise peak R has a polarity reverse to that of the detection signal peak S. Therefore, when the detection pen 108 is located near the segment electrode X m , the detection signal peak S and the induction noise peak R having opposite polarities are superimposed on each other to lower the level of the detection signal peak S to significantly reduce the coordinate detection accuracy. In an extreme case, the x-coordinate value cannot be detected.
  • EP-A-O 375 328 relates to a tablet integrated with a display having row and column electrodes and a detection pen.
  • the present invention has been developed with a view to substantially solving the above described disadvantages. It is desirable to provide an improved display-integrated type tablet device having a high coordinate detection accuracy, the tablet being capable of performing a stable coordinate detection even when distances between a detection electrode of a detection pen and a segment electrode and a common electrode vary, eliminating noise components generated in an output signal from the detection pen taking place at the time of ending the scanning, and preventing the possible interference of other pulses with a coordinate detection pulse of the above-mentioned output signal.
  • the invention provides a display-integrated type tablet device including a display panel which has a display material interposed between segment electrodes and common electrodes crossing each other at right angles and is driven by a duty ratio control type drive method, a detection pen having at a tip of the detection pen an electrode electrostatically coupled with the segment electrodes and the common electrodes of the display panel, a segment electrode drive circuit for driving the segment electrodes, a common electrode drive circuit for driving the common electrodes, a display control circuit for displaying an image on the display panel by controlling the segment electrode drive circuit and the common electrode drive circuit in a period of displaying the image, a detection control circuit for controlling the segment electrode drive circuit to sequentially scan the segment electrodes of the display panel by applying a scanning voltage successively to the segment electrodes and controlling the common electrode drive circuit to sequentially scan the common electrodes by applying a scanning voltage successively to the common electrodes in a coordinate detection period composed of a first scanning period and a second scanning period, an x-coordinate detection circuit for detecting an x-coordinate value designated on
  • a display-integrated type tablet device including a display panel which has a display material interposed between segment electrodes and common electrodes crossing each other at right angles and is driven by a duty ratio control type drive method, a detection pen having at a tip of the detection pen an electrode electrostatically coupled with the segment electrodes and the common electrodes of the display panel, a segment electrode drive circuit for driving the segment electrodes, a common electrode drive circuit for driving the common electrodes, a display control circuit for displaying an image on the display panel by controlling the segment electrode drive circuit and the common electrode drive circuit in a period of displaying the image, a detection control circuit for controlling the segment electrode drive circuit to sequentially scan the segment electrodes of the display panel by applying a scanning voltage successively to the segment electrodes and controlling the common electrode drive circuit to sequentially scan the common electrodes by applying a scanning voltage successively to the common electrodes in a coordinate detection period, an x-coordinate detection circuit for detecting an x-coordinate value designated on the display panel by the tip of the detection pen according to an
  • the x-coordinate detection circuit or the y-coordinate detection circuit includes a detection circuit for detecting and holding a coordinate detection pulse in the output signal from the detection pen and outputting a detection signal, a delay circuit for delaying the detection signal from the detection circuit for a specified period of time, and a synthesis circuit for synthesizing the detection signal from the delay circuit and the output signal from the detection pen thereby suppressing noise following a peak of the coordinate detection pulse in the detection signal.
  • each of the x-coordinate detection circuit and the y-coordinate detection circuit includes three clamp circuits which respectively operate in synchronization with the image display period, a segment electrode scanning period, or a common electrode scanning period to take in either one of different signals of: the output signal from the detection pen in the image display period; the output signal from the detection pen in the segment electrode scanning period; or the output signal from the detection pen in the common electrode scanning period, thereby preventing mutual interference, which possibly occurs in the x-coordinate detection circuit or the y-coordinate detection circuit, between a display voltage inversion pulse, an x-coordinate detection pulse, and a y-coordinate detection pulse, which are forming a time series as included in the output signal from the detection pen.
  • the electrodes positioned on the side of the detection pen out of the segment electrodes or the common electrodes are scanned under the control of the detection control circuit in a first scanning period of the coordinate detection period. Then in the above time the output signal from the detection pen is input to the detection circuit to detect and hold the voltage variation quantity of one electrode group and output a reference signal according to the voltage variation quantity of the one electrode group. Then the coordinate detection pulse in the output signal from the detection pen is detected based on the reference signal from the detection circuit by means of a coordinate detection circuit relevant to the other electrode group out of the x-coordinate detection circuit and the y-coordinate detection circuit.
  • the coordinate detection pulse contained in the output signal from the detection pen is detected by the coordinate detection circuit relevant to the other electrode group.
  • the variation in level of the output signal from the detection pen due to the change of distance between the detection pen and the segment electrode or the common electrode can be corrected by the aforementioned reference signal.
  • the output signal from the detection pen in the image display period is input to the detection circuit to output a reference signal according to the voltage variation quantities of the segment electrode and the common electrode. Then based on the reference signal according to the voltage variation quantities of the segment electrode and the common electrode, the coordinate detection pulse contained in the output signal from the detection pen in the coordinate detection period is detected by the x-coordinate detection circuit and the y-coordinate detection circuit.
  • the coordinate detection pulse contained in the output signal from the detection pen is detected and held. Then the detection signal from the detection circuit is delayed for a specified period of time by the delay circuit. Thereafter, the detection signal from the delay circuit and the output signal from the detection pen are synthesized by the synthesis circuit.
  • the output signal from the detection pen in the image display period is taken in by the clamp circuit which operates in synchronization with the image display period. Further the output signal from the detection pen in the segment electrode scanning period is taken in by the clamp circuit which operates in synchronization with the segment electrode scanning period. Meanwhile, the output signal from the detection pen in the common electrode scanning period is taken in by the clamp circuit which operates in synchronization with the common electrode scanning period.
  • the image display voltage inversion pulse, x-coordinate detection pulse, and the y-coordinate detection pulse contained in a time series form in the output signal from the detection pen can be prevented from interfering with each other in the x-coordinate detection circuit and the y-coordinate detection circuit.
  • Fig. 1 is a block diagram of a coordinate system of the display-integrated type tablet device of the first embodiment.
  • an LCD panel 1 there are included an LCD panel 1, a transparent protection panel 16, a detection electrode 13 of a detection pen 8, and an amplifier 9 built in the detection pen 8.
  • a detection signal clamp circuit 20 There are further included a detection signal clamp circuit 20, a detection signal amplifier 21, an X-coordinate signal clamp circuit 22, an X-coordinate signal amplifier 23, a detection and hold circuit 24, a delay element 25, an adder 26, and a comparator 27.
  • a Y-coordinate signal clamp circuit 28 a Y-coordinate signal amplifier 29, a comparator 30, an image display inversion signal clamp circuit 32, a detection and hold circuit 33, and a control circuit 7.
  • the control circuit 7 outputs a coordinate detection period signal a , a y-coordinate detection period signal b , an x-coordinate detection period signal c, and an image display period signal d according to a timing as shown in Fig. 2.
  • the image display period signal d may be a signal d ' which is made active only at the image display voltage inversion time, or may be a signal d'' which is made active at the image display voltage inversion time just before the y-coordinate detection period signal b becomes active.
  • a detection signal induced at the detection electrode 13 of the detection pen 8 is shown by a waveform e .
  • the detection signal e which was induced at the detection electrode 13 of the detection pen 8 and amplified in the amplifier 9 is input to the detection signal clamp circuit 20 and the image display inversion signal clamp circuit 32 by way of a cable.
  • the detection signal clamp circuit 20 and the image display inversion signal clamp circuit 32 are each composed of two resistors 43 and 44, one capacitor 42, and one voltage-controlled switch element 41 such as a transistor or a field-effect transistor as shown in Fig. 3 (a). Also, the above clamp circuits 20 and 32 may be each constituted as shown in Fig. 3 (b) and combined with an operational amplifier.
  • the voltage-controlled switch element 41 turns OFF to increase its impedance when an active control voltage of 5 V is input to its control terminal.
  • the switch element 41 turns ON when a non-active control voltage of 0 V is input to the terminal.
  • the aforementioned LCD image display polarity inversion pulse, the y-coordinate detection pulse, and the x-coordinate detection pulse are timely close to each other. Furthermore, due to a high-pass filter effect attributed to a capacitive coupling between the detection electrode 13 of the detection pen 8 and the LCD panel 1, delay of low-frequency component of the previous signal is disadvantageously superimposed on the main signal component which is desired to be extracted.
  • the detection signal clamp circuit 20, the x-coordinate detection signal clamp circuit 22, the y-coordinate detection signal clamp circuit 28 and the image display inversion signal clamp circuit 32 are electrically equivalent to the circuit as shown in Figs.
  • the input side and the output side in each clamp circuit 20, 22, 28 and 32 are electrically separated from each other when the voltage-controlled switch element 41 is ON. In that time, the output side of the capacitor 42 is fixed to the ground potential. Then, when the voltage-controlled switch element 41 changes from ON to OFF, the output signal V2 starts from 0 V due to the charge effect of the capacitor 42 and only the high-frequency component of the input signal V1 passes through. Thus, clamping operation is executed.
  • the input and output signals of the detection signal clamp circuit 20, the output signal of the x-coordinate detection signal clamp circuit 22 and the output signal of the y-coordinate detection signal clamp circuit 28 are shown in Fig. 23.
  • the detection and hold circuit 33 may be a peak hold circuit for detecting a peak value, or may be an average value detection and hold circuit including an integration function. Exemplified peak hold circuits are shown in Figs. 4 (a), 4 (b), 4 (c), and 4 (d), and exemplified average value detection and hold circuits are shown in Figs. 5 (a) and 5 (b).
  • a DC voltage corresponding to the level of the LCD image display polarity inversion pulse is obtained and applied as a threshold voltage to an input terminal of the comparator 27 and the comparator 30 in the next stage.
  • a detection period signal a which becomes active only in the coordinate detection period as shown in Fig. 2.
  • the detection signal including the y-coordinate detection pulse and the x-coordinate detection pulse in the coordinate detection period is passed to be input to the detection is amplified in the X-coordinate signal amplifier 23 and supplied to a positive input terminal of the adder 26 as a synthesis circuit and the detection and hold circuit 24.
  • the detection and hold circuit 24 has the same construction as that of the detection and hold circuit 33, and therefore a DC voltage according to the level of the x-coordinate detection signal is output.
  • the detection and hold circuit 24 has an offset incorporation circuit having a deadband as shown in Fig. 6.
  • the output of the detection and hold circuit 24 is delayed by the delay element 25 and applied to a negative input terminal of the adder 26 to be added to the original x-coordinate detection signal.
  • Fig. 7 shows output signals output from the detection and hold circuit 24, the delay element 25, and the adder 26 in the case where an x-coordinate detection signal as shown in Fig. 22 is input to the detection and hold circuit 24.
  • the output signal from the adder 26 becomes a signal in which the noise component in the trailing portion of the pulse is suppressed in amplitude by a voltage corresponding to the level of the output signal from the detection and hold circuit 24 (i.e., the x-coordinate detection peak level).
  • the output of a delay element 25 is converted into a binary signal by a comparator 31.
  • the binary signal controls a muting circuit 32 as a digital control signal.
  • the output of the adder 26 is input to an input terminal of the comparator 27.
  • a threshold voltage proportional to the magnitude of the LCD polarity inversion signal from the detection and hold circuit 33 is already applied to the other input terminal of the comparator 27. Therefore, the comparator 27 outputs an x-coordinate signal having a positive pulse only when it detects an x-coordinate detection pulse exceeding the threshold value.
  • the x-coordinate pulse of the x-coordinate signal output from the comparator 27 and the y-coordinate pulse of the y-coordinate signal output from the comparator 30 are digital pulses where the position of the detection pen 8 on the tablet is reflected on a time.
  • a logic circuit such that, with a counter to be reset at the rise-time of the x-coordinate detection period signal c and the y-coordinate detection period signal b of the control circuit 7, the counting in the counter is stopped by the x-coordinate pulse of the x-coordinate signal or the y-coordinate pulse of the y-coordinate signal, the time of the x-coordinate pulse or the y-coordinate pulse can be obtained as a count value to consequently allow the position designated by the detection pen 8 on the LCD panel 1 to be known.
  • Fig. 8 shows an example of such a logic circuit.
  • the LCD image display polarity inversion pulse, the y-coordinate detection pulse, and the x-coordinate detection pulse are separated from the detection signal induced at the detection electrode 13 of the detection pen 8 by means of the detection signal clamp circuit 20, the image display inversion signal clamp circuit 32, the X-coordinate signal clamp circuit 22, and the Y-coordinate signal clamp circuit 28.
  • the LCD image display polarity inversion pulse there can be input to the detection and hold circuit 33, the x-coordinate detection pulse to the X-coordinate signal amplifier 23, and the y-coordinate detection pulse to the Y-coordinate signal amplifier 29 without any mutual interference.
  • a DC voltage corresponding to the level of the LCD image display polarity inversion pulse is obtained by the detection and hold circuit 33. Then the DC voltage is made to serve as a reference voltage in obtaining a binary pulse of the x-coordinate detection pulse or the y-coordinate detection pulse in the comparators 27 and 28.
  • the LCD image display polarity inversion pulse changes according to the distance between the detection electrode 13 of the detection pen 8 and the segment electrode X and the common electrode Y. Therefore, the aforementioned reference voltage is also changed according to the above-mentioned distance. Consequently, the aforementioned reference voltage changes according to the distance.
  • the above means that both the detection signal voltage and the reference voltage input to the comparators 27 and 28 change according to the distance between the detection pen 8 and the segment electrode X and the common electrode Y. As a result, the x-coordinate detection signal and the y-coordinate detection signal output from the comparators 27 and 28 become signals which are not dependent on the above-mentioned distance.
  • the detection and hold circuit 24, the delay element 25, and the adder 26 for detecting an x-coordinate detection pulse are incorporated to the x-coordinate detection circuit 10 to add the x-coordinate detection signal which has passed through the detection and hold circuit 24 and the delay element 25 to the original x-coordinate detection signal.
  • Fig. 9 is a block diagram of a coordinate detection system in the display-integrated type tablet device of the second embodiment. It is noted that the same parts and components as those in Fig. 1 are denoted by the same numerals, and no description is provided therefor herein.
  • the circuit scale of the coordinate detection system of the first embodiment can be simplified.
  • the second embodiment differs from the first embodiment in the following point.
  • the point is that there is used a DC voltage proportional to the level of the y-coordinate detection pulse which is generated before the generation of the x-coordinate detection signal as a reference for the comparator 27 for x-coordinate detection signal. Therefore, the image display inversion signal clamp circuit 32 and the detection and hold circuit 33 for obtaining the DC voltage proportional to the level of the LCD image display polarity inversion pulse are eliminated, and a detection and hold circuit 31 is incorporated instead in the second embodiment.
  • the present invention is not limited to the above-mentioned arrangement. There is no problem even when the vertical positions of the common electrodes and the segment electrodes of the LCD panel 1 are exchanged, the sequence in time of the y-coordinate detection period and the x-coordinate detection period are exchanged, and the x-coordinate detection circuit and the y-coordinate detection circuit as shown in Fig. 9 are exchanged.
  • the display-integrated type tablet device of the present invention scans the upper electrodes located closer to the detection pen out of the segment electrode and the common electrode under the control of the detection control circuit in the first scanning period to detect and hold the voltage variation quantity of the upper electrodes according to the output signal from the detection pen in the above time and output a reference signal corresponding to the above-mentioned voltage variation quantity. Then the coordinate detection circuit relevant to the lower electrodes out of the aforementioned x-coordinate detection circuit and the y-coordinate detection circuit detects a coordinate detection pulse contained in the output signal from the detection pen based on the aforementioned reference signal. Therefore, the detection level of the coordinate detection pulse relevant to the lower electrode susceptible to external noise can be changed based on the voltage variation quantity at the time of scanning the upper electrodes.
  • the variation of the output signal from the detection pen attributed to the change of the distance between the detection electrode of the detection pen and the segment electrode and the common electrode can be appropriately corrected to allow a high-accuracy coordinate detection to be achieved.
  • the display-integrated type tablet device of the present invention detects and holds the voltage variations of the segment electrode and the common electrode by means of the detection circuit according to the output signal from the detection pen to output a reference signal corresponding to the above-mentioned voltage variation in the image display period. Then the x-coordinate detection circuit and the y-coordinate detection circuit detect the coordinate detection pulse contained in the output signal from the detection pen based on the above-mentioned reference signal. Therefore, in both the x-coordinate detection circuit and the y-coordinate detection circuit, the variation of the output from the detection pen can be corrected more appropriately.
  • the display-integrated type tablet device of the present invention detects and holds the coordinate detection pulse contained in the output signal from the detection pen by means of the detection circuit, delays the resulting pulse for a specified period by means of the delay circuit, and synthesizes the detection signal from the delay circuit and the detection signal from the detection pen by means of the synthesis circuit. Therefore, the noise component following the peak of the coordinate detection pulse in the detection signal can be suppressed to allow the coordinate detection accuracy to be increased.
  • the display-integrated type tablet device of the present invention takes in the output signal from the detection pen in the aforementioned three periods. Therefore, the image display voltage inversion pulse, the x-coordinate detection pulse, and the y-coordinate detection pulse can be prevented from interfering with each other inside the x-coordinate detection circuit and the y-coordinate detection circuit to allow the coordinate detection accuracy to be increased.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Position Input By Displaying (AREA)

Claims (5)

  1. Tablette de type à affichage intégré incluant un panneau d'affichage (1) qui comprend un matériau d'affichage interposé entre des électrodes de segments (X) et des électrodes communes (Y) se croisant entre elles à angles droits et est attaqué par un procédé d'attaque de type à commande de rapport cyclique, un crayon de détection (8) ayant à une pointe du crayon de détection (8) une électrode (13) couplée de manière électrostatique avec les électrodes de segments (X) et les électrodes communes (Y) du panneau d'affichage (1), un circuit d'attaque d'électrodes de segments (103) pour attaquer les électrodes de segments (X), un circuit d'attaque d'électrodes communes (102) pour attaquer les électrodes communes (Y), un circuit de commande d'affichage (105) pour afficher une image sur le panneau d'affichage (1) en commandant le circuit d'attaque d'électrodes de segments (103) et le circuit d'attaque d'électrodes communes (102) dans une période d'affichage de l'image, un circuit de commande de détection (106) pour commander le circuit d'attaque d'électrodes de segments (103) afin de balayer séquentiellement les électrodes de segments (X) du panneau d'affichage (1) en appliquant une tension de balayage successivement aux électrodes de balayage (X) et commander le circuit d'attaque d'électrodes communes (102) afin de balayer séquentiellement les électrodes communes (Y) en appliquant une tension de balayage successivement aux électrodes communes (Y) dans une période de détection de coordonnées constituée d'une première période de balayage et d'une seconde période de balayage, un circuit de détection de coordonnées x (110) pour détecter une valeur de coordonnée x désignée sur le panneau d'affichage (1) avec la pointe du crayon de détection (8) conformément à un cadencement de génération de signal de sortie du crayon de détection (8) et à un cadencement de balayage des électrodes de segments (X), et un circuit de détection de coordonnées y (111) pour détecter une valeur de coordonnée y désignée sur le panneau d'affichage (1) avec la pointe du crayon de détection (8) conformément à un cadencement de génération de signal de sortie du crayon de détection (8) et à un cadencement de balayage des électrodes communes (Y), caractérisé en ce que
    le circuit de commande de détection (106) est capable de commander le circuit d'attaque d'électrodes de segments (103) et le circuit d'attaque d'électrodes communes (102) de façon qu'une électrode commune (Y) qui est positionnée plus proche du crayon de détection (8), parmi les électrodes de segments (X) et les électrodes communes (Y), est balayée dans la première période de balayage et les autres électrodes de segments (X) sont balayées dans la seconde période de balayage consécutive à la première période de balayage,
    la tablette de type à affichage intégré comprend un circuit de détection (31) qui reçoit un signal de sortie du crayon de détection (8) pour détecter et maintenir une quantité de variation de tension de l'une (Y) des électrodes de segments (X) et électrodes communes (Y) et délivrer un signal de référence correspondant à la quantité de variation de tension de l'une (Y) des électrodes de segments (X) et électrodes communes (Y) dans la première période de balayage, et
    le circuit de détection de coordonnées (110) qui est approprié pour l'autre (X) des électrodes de segments (X) et électrodes communes (Y), parmi le circuit de détection de coordonnées x (110) et le circuit de détection de coordonnées y (111), fonctionne de manière à détecter une impulsion de détection de coordonnées dans le signal de sortie du crayon de détection (8) en fonction du signal de référence provenant du circuit de détection (31).
  2. Tablette de type à affichage intégré incluant un panneau d'affichage (1) qui comprend un matériau d'affichage interposé entre des électrodes de segments (X) et des électrodes communes (Y) se croisant entre elles à angles droits et est attaqué par un procédé d'attaque de type à commande de rapport cyclique, un crayon de détection (8) ayant à une pointe du crayon de détection (8) une électrode (13) couplée de manière électrostatique avec les électrodes de segments (X) et les électrodes communes (Y) du panneau d'affichage (1), un circuit d'attaque d'électrodes de segments (103) pour attaquer les électrodes de segments (X), un circuit d'attaque d'électrodes communes (102) pour attaquer les électrodes communes (Y), un circuit de commande d'affichage (105) pour afficher une image sur le panneau d'affichage (1) en commandant le circuit d'attaque d'électrodes de segments (103) et le circuit d'attaque d'électrodes communes (102) dans une période d'affichage de l'image, un circuit de commande de détection (106) pour commander le circuit d'attaque d'électrodes de segments (103) afin de balayer séquentiellement les électrodes de segments (X) du panneau d'affichage (1) en appliquant une tension de balayage successivement aux électrodes de segments (X) et commander le circuit d'attaque d'électrodes communes (102) afin de balayer séquentiellement les électrodes communes (Y) en appliquant une tension de balayage successivement aux électrodes communes (Y) dans une période de détection de coordonnées, un circuit de détection de coordonnées x (110) pour détecter une valeur de coordonnée x désignée sur le panneau d'affichage (1) avec la pointe du crayon de détection (8) conformément à un cadencement de génération de signal de sortie du crayon de détection (8) et à un cadencement de balayage des électrodes de segments (X), et un circuit de détection de coordonnées y (111) pour détecter une valeur de coordonnée y désignée sur le panneau d'affichage (1) avec la pointe du crayon de détection (8) conformément à un cadencement de génération de signal de sortie du crayon de détection (8) et à un cadencement de balayage des électrodes communes (Y), caractérisé en ce que
    la tablette de type à affichage intégré comprend un circuit de détection (33) pour recevoir un signal de sortie du crayon de détection (8) afin de détecter et maintenir une quantité de variation de tension de soit les électrodes de segments (X), soit les électrodes communes (Y), ou les deux, et délivrer un signal de référence correspondant aux variations de tension de soit les électrodes de segments (X), soit les électrodes communes (Y), ou les deux, dans la période d'affichage d'image, et
    le circuit de détection de coordonnées x (110) et le circuit de détection de coordonnées y (111) fonctionnent de manière à détecter une impulsion de détection de coordonnées dans le signal de sortie du crayon de détection (8) en fonction du signal de référence provenant du circuit de détection (33).
  3. Tablette de type à affichage intégré selon la revendication 1 ou 2, dans laquelle le circuit de détection de coordonnées x (110) ou le circuit de détection de coordonnées y (111) comprend:
    un circuit de détection (24) pour détecter et maintenir une impulsion de détection de coordonnées dans le signal de sortie du crayon de détection (8) et délivrer un signal de détection;
    un circuit de retard (25) pour retarder le signal de détection provenant du circuit de détection (24) pendant une période de temps spécifiée; et
    un circuit de synthèse (26) pour synthétiser le signal de détection provenant du circuit de retard (25) et le signal de sortie du crayon de détection (8),
    afin de supprimer ainsi un bruit suivant un pic de l'impulsion de détection de coordonnées dans le signal de détection.
  4. Tablette de type à affichage intégré selon l'une quelconque des revendications 1 à 3, dans laquelle le circuit de détection de coordonnées x (110) et le circuit de détection de coordonnées y (111) comprennent chacun trois circuits de limitation de niveaux (32, 22, 28) qui fonctionnent respectivement en synchronisme avec la période d'affichage d'image, une période de balayage d'électrodes de segments, ou une période de balayage d'électrodes communes pour prélever l'un quelconque de différents signaux comprenant: le signal de sortie du crayon de détection (8) dans la période d'affichage d'image; le signal de sortie du crayon de détection (8) dans la période de balayage d'électrodes de segments; ou le signal de sortie du crayon de détection (8) dans la période de balayage d'électrodes communes,
       afin d'empêcher ainsi une interférence mutuelle, susceptible de se produire dans le circuit de détection de coordonnées x (110) ou le circuit de détection de coordonnées y (111), entre une impulsion d'inversion de tension d'affichage, une impulsion de détection de coordonnées x, et une impulsion de détection de coordonnées y, qui forment une série temporelle telle qu'incluse dans le signal de sortie du crayon de détection (8).
  5. Tablette de type à affichage intégré selon la revendication 4, dans laquelle le circuit de détection de coordonnées x (110) et le circuit de détection de coordonnées y (111) comprennent chacun un circuit de limitation de niveaux (20) qui fonctionne en synchronisme avec la période de détection de coordonnées pour prélever et limiter le niveau du signal de sortie du crayon de détection (8) dans la période de détection avant la limitation de niveau du signal de sortie du crayon de détection (8) dans la période de balayage d'électrodes de segments et du signal de sortie du crayon de détection (8) dans la période de balayage d'électrodes communes.
EP93303976A 1992-05-22 1993-05-21 Tablette intégrée avec un dispositif d'affichage avec réduction de bruit pendant la détection de coordonnées Expired - Lifetime EP0571230B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP98100532A EP0843278B1 (fr) 1992-05-22 1993-05-21 Tablette à dispositif d'affichage intégré

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP13068592A JP2798552B2 (ja) 1992-05-22 1992-05-22 表示一体型タブレット装置
JP130685/92 1992-05-22
JP281559/92 1992-10-20
JP28155992A JP3051270B2 (ja) 1992-10-20 1992-10-20 タブレット装置および表示一体型タブレット装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
EP98100532A Division EP0843278B1 (fr) 1992-05-22 1993-05-21 Tablette à dispositif d'affichage intégré

Publications (2)

Publication Number Publication Date
EP0571230A1 EP0571230A1 (fr) 1993-11-24
EP0571230B1 true EP0571230B1 (fr) 1998-11-04

Family

ID=26465754

Family Applications (2)

Application Number Title Priority Date Filing Date
EP98100532A Expired - Lifetime EP0843278B1 (fr) 1992-05-22 1993-05-21 Tablette à dispositif d'affichage intégré
EP93303976A Expired - Lifetime EP0571230B1 (fr) 1992-05-22 1993-05-21 Tablette intégrée avec un dispositif d'affichage avec réduction de bruit pendant la détection de coordonnées

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP98100532A Expired - Lifetime EP0843278B1 (fr) 1992-05-22 1993-05-21 Tablette à dispositif d'affichage intégré

Country Status (4)

Country Link
US (2) US5410329A (fr)
EP (2) EP0843278B1 (fr)
KR (1) KR960003070B1 (fr)
DE (2) DE69321874T2 (fr)

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5581274A (en) * 1991-04-05 1996-12-03 Sharp Kabushiki Kaisha Display-integrated type tablet device
US5534892A (en) * 1992-05-20 1996-07-09 Sharp Kabushiki Kaisha Display-integrated type tablet device having and idle time in one display image frame to detect coordinates and having different electrode densities
JP2653014B2 (ja) * 1993-07-26 1997-09-10 日本電気株式会社 アクティブマトリックス液晶ディスプレイ装置
JP3192297B2 (ja) * 1993-11-05 2001-07-23 シャープ株式会社 座標入力装置
JP2614410B2 (ja) * 1994-01-28 1997-05-28 インターナショナル・ビジネス・マシーンズ・コーポレイション 液晶駆動方法及び液晶駆動装置
JPH07311647A (ja) * 1994-05-16 1995-11-28 Wacom Co Ltd 位置検出装置及びそのノイズ除去方法
JP3167873B2 (ja) * 1994-12-28 2001-05-21 シャープ株式会社 画像入力装置
US5604510A (en) * 1995-01-10 1997-02-18 Palomar Technologies Corporation Liquid crystal display drive with voltage translation
EP0742531A1 (fr) * 1995-05-12 1996-11-13 Hitachi, Ltd. Lecteur de position
US5841427A (en) * 1995-12-22 1998-11-24 Symbios, Inc. Method and apparatus for canceling an offset signal in an electrostatic digitizing tablet
US5940065A (en) * 1996-03-15 1999-08-17 Elo Touchsystems, Inc. Algorithmic compensation system and method therefor for a touch sensor panel
JPH09282096A (ja) * 1996-04-16 1997-10-31 Sharp Corp ペン入力装置
US5841431A (en) * 1996-11-15 1998-11-24 Intel Corporation Application of split- and dual-screen LCD panel design in cellular phones
GB9722766D0 (en) 1997-10-28 1997-12-24 British Telecomm Portable computers
US6456749B1 (en) 1998-02-27 2002-09-24 Carnegie Mellon University Handheld apparatus for recognition of writing, for remote communication, and for user defined input templates
US6730863B1 (en) * 1999-06-22 2004-05-04 Cirque Corporation Touchpad having increased noise rejection, decreased moisture sensitivity, and improved tracking
JP3934846B2 (ja) * 2000-03-06 2007-06-20 株式会社リコー 座標入力／検出装置、電子黒板システム、受光素子の位置ズレ補正方法及び記憶媒体
KR100470207B1 (ko) * 2001-08-13 2005-02-04 엘지전자 주식회사 평면 전계방출 표시소자의 구동장치 및 방법
JP4540088B2 (ja) * 2001-08-24 2010-09-08 株式会社ワコム 位置検出装置
KR100347798B1 (ko) * 2002-03-22 2002-08-07 주식회사 얼텍 비중에 의한 완전미 선별 방법 및 그 장치
KR100449745B1 (ko) * 2002-11-21 2004-09-22 삼성전자주식회사 터치 스크린 잡음 방지 장치 및 방법
JP4257221B2 (ja) * 2003-03-31 2009-04-22 東芝松下ディスプレイテクノロジー株式会社 表示装置および情報端末装置
KR101246830B1 (ko) * 2006-06-09 2013-03-28 삼성디스플레이 주식회사 표시 장치 및 이의 구동 방법
TW200915162A (en) * 2007-07-31 2009-04-01 Qrg Ltd Sensor and method of sensing
WO2009022486A1 (fr) * 2007-08-10 2009-02-19 Sharp Kabushiki Kaisha Dispositif d'affichage, dispositif de commande d'affichage, procédé de commande d'affichage, dispositif d'affichage à cristaux liquides et récepteur de télévision
JP5178631B2 (ja) * 2009-05-26 2013-04-10 株式会社ジャパンディスプレイウェスト タッチセンサ、表示装置および電子機器
TWI395126B (zh) * 2009-07-20 2013-05-01 Mstar Semiconductor Inc 觸控感測方法及其裝置
JP5430339B2 (ja) 2009-10-19 2014-02-26 株式会社ワコム 位置検出装置及び位置指示器
EP2348386A2 (fr) * 2010-01-21 2011-07-27 Samsung SDI Co., Ltd. Appareil pour détecter l'emplacement tactile
KR101843590B1 (ko) * 2010-02-26 2018-03-29 시냅틱스 인코포레이티드 간섭을 회피하기 위해 복조를 변경하는 것
WO2011114901A1 (fr) * 2010-03-17 2011-09-22 シャープ株式会社 Dispositif d'affichage équipé d'un élément tactile
WO2011114900A1 (fr) * 2010-03-17 2011-09-22 シャープ株式会社 Dispositif d'affichage équipé d'un élément tactile
US10019119B2 (en) * 2010-09-09 2018-07-10 3M Innovative Properties Company Touch sensitive device with stylus support
KR101398238B1 (ko) * 2010-10-01 2014-05-22 엘지디스플레이 주식회사 터치 스크린 패널 일체형 표시장치
KR101260665B1 (ko) * 2010-10-08 2013-05-10 엘지디스플레이 주식회사 터치 스크린 내장형 액정 표시 장치
TWI506606B (zh) * 2010-11-05 2015-11-01 Novatek Microelectronics Corp 觸控顯示裝置的觸控控制器及其驅動方法
KR101680256B1 (ko) * 2010-11-08 2016-12-13 삼성디스플레이 주식회사 저항막 방식의 터치 스크린 패널
US8593450B2 (en) 2010-12-22 2013-11-26 Apple Inc. Relay driving of conductive segments in displays
CN102541330B (zh) * 2010-12-27 2015-04-29 上海天马微电子有限公司 一种触摸屏及触控显示装置
US8907921B2 (en) 2011-08-30 2014-12-09 Synaptics Incorporated Interference sensing within a display device with an integrated sensing device
WO2013069683A1 (fr) * 2011-11-07 2013-05-16 王子ホールディングス株式会社 Dispositif d'affichage à panneau tactile capacitif et panneau tactile capacitif
CN103135815B (zh) * 2011-11-25 2017-02-22 上海天马微电子有限公司 内嵌触摸屏液晶显示装置及其触控驱动方法
TWI599936B (zh) 2011-12-19 2017-09-21 禾瑞亞科技股份有限公司 電容式書寫裝置
KR102203449B1 (ko) * 2013-12-31 2021-01-15 엘지디스플레이 주식회사 터치 스크린 일체형 표시장치 및 그 구동 방법
TWI522876B (zh) 2014-01-22 2016-02-21 Sitronix Technology Corp Drive circuit and its touch device and touch module and manufacturing method
JP6110585B1 (ja) * 2015-05-21 2017-04-05 株式会社ワコム アクティブスタイラス
JP2017016400A (ja) * 2015-07-01 2017-01-19 株式会社ジャパンディスプレイ 表示装置
TWI646837B (zh) 2017-09-14 2019-01-01 友達光電股份有限公司 抗干擾顯示面板和抗干擾線路
WO2023007646A1 (fr) 2021-07-29 2023-02-02 株式会社ワコム Procédé de détection de signal de stylo, contrôleur de capteur et système de détection de position

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60175077A (ja) * 1984-02-22 1985-09-09 株式会社日立製作所 情報保持装置
JPS6177920A (ja) * 1984-09-22 1986-04-21 Sharp Corp 入力および液晶表示を行なう装置
JPS61260321A (ja) * 1985-05-14 1986-11-18 Wacom Co Ltd 位置検出装置
JPS62143120A (ja) * 1985-12-18 1987-06-26 Alps Electric Co Ltd 座標入力装置
JPH0738152B2 (ja) * 1986-09-25 1995-04-26 三菱電機株式会社 表示装置
US4839634A (en) * 1986-12-01 1989-06-13 More Edward S Electro-optic slate for input/output of hand-entered textual and graphic information
US4789838A (en) * 1987-03-23 1988-12-06 Cheng Jyi Min Pulse detection circuit using amplitude and time qualification
KR0122737B1 (ko) * 1987-12-25 1997-11-20 후루다 모또오 위치 검출 장치
JPH01280823A (ja) * 1988-01-29 1989-11-13 Pentel Kk 座標入力装置
DE68927877T2 (de) * 1988-12-19 1997-09-11 Sharp Kk Tafel mit integrierter Anzeige
JPH0383120A (ja) * 1989-08-28 1991-04-09 Mitsubishi Electric Corp 座標入力機能付表示装置
US5465103A (en) * 1989-08-28 1995-11-07 Mitsubishi Denki Kabushiki Kaisha Display device with coordinate input function
US5119404A (en) * 1990-08-06 1992-06-02 Japan Aviation Electronics Industry Limited Signal receiver
JP2534422B2 (ja) * 1991-03-12 1996-09-18 シャープ株式会社 表示一体型タブレット装置
US5392058A (en) * 1991-05-15 1995-02-21 Sharp Kabushiki Kaisha Display-integrated type tablet device
KR960006112Y1 (ko) * 1991-04-30 1996-07-20 강진구 잡음제거회로
US5214319A (en) * 1991-05-28 1993-05-25 Motorola, Inc. Monotonic pulse detector

Also Published As

Publication number Publication date
EP0843278A3 (fr) 1998-08-26
EP0843278B1 (fr) 2002-10-23
DE69321874D1 (de) 1998-12-10
KR960003070B1 (ko) 1996-03-04
DE69332442D1 (de) 2002-11-28
US5410329A (en) 1995-04-25
KR940006018A (ko) 1994-03-22
DE69321874T2 (de) 1999-05-27
EP0843278A2 (fr) 1998-05-20
EP0571230A1 (fr) 1993-11-24
US5631666A (en) 1997-05-20
DE69332442T2 (de) 2003-06-05

Similar Documents

Publication Publication Date Title
EP0571230B1 (fr) Tablette intégrée avec un dispositif d'affichage avec réduction de bruit pendant la détection de coordonnées
US10139952B2 (en) Display apparatus and touch detection apparatus using shift of detection operation for reduced detection time
EP0504728B1 (fr) Tablette d'entrée avec écran incorporé
US10698506B2 (en) Input system and method for detecting touch using the same
KR101778731B1 (ko) 터치센서를 가지는 표시장치와 그 구동방법
JP3678801B2 (ja) 表示一体型タブレット装置
CN105045423B (zh) 修改解调以避免干扰
US5448024A (en) Display-integrated type tablet device with high coordinate detection accuracy and method for driving the same
JP2975467B2 (ja) 表示一体型位置読取装置
EP2541378A1 (fr) Dispositif d'affichage avec capteur tactile
EP2750004A2 (fr) Dispositif de détection tactile, dispositif d'affichage avec fonction de détection tactile et appareil électronique
KR20130143415A (ko) 터치 센싱 장치와 그 구동 방법
JP3698803B2 (ja) 座標入力装置
CN111381718B (zh) 触摸感测装置、触摸感测系统和触摸面板的驱动方法
JP3817012B2 (ja) 座標検出機能付液晶表示装置とその駆動回路
EP0513792B1 (fr) Dispositif tablette à digitaliser du type "à afficheur intégré"
JP2798552B2 (ja) 表示一体型タブレット装置
KR20160082875A (ko) 터치센서 일체형 표시장치
JP3192522B2 (ja) 表示一体型タブレット装置およびその駆動方法
JP2653935B2 (ja) 座標入力装置
JP2801813B2 (ja) タブレット装置及び表示一体型タブレット装置
JP2988780B2 (ja) 座標検出装置
JP2014120116A (ja) 電子機器の駆動方法
JPH04308913A (ja) 表示一体型タブレット

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE FR GB NL

17P Request for examination filed

Effective date: 19940201

17Q First examination report despatched

Effective date: 19970407

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB NL

REF Corresponds to:

Ref document number: 69321874

Country of ref document: DE

Date of ref document: 19981210

ET Fr: translation filed
NLT2 Nl: modifications (of names), taken from the european patent patent bulletin

Owner name: SHARP KABUSHIKI KAISHA

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
REG Reference to a national code

Ref country code: GB

Ref legal event code: IF02

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20020508

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20020515

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 20020529

Year of fee payment: 10

Ref country code: DE

Payment date: 20020529

Year of fee payment: 10

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20030521

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20031201

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20031202

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20030521

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20040130

NLV4 Nl: lapsed or anulled due to non-payment of the annual fee

Effective date: 20031201

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST