EP0561964A1 - Module composant de dispositif optoelectronique et procede de production - Google Patents

Module composant de dispositif optoelectronique et procede de production

Info

Publication number
EP0561964A1
EP0561964A1 EP92901711A EP92901711A EP0561964A1 EP 0561964 A1 EP0561964 A1 EP 0561964A1 EP 92901711 A EP92901711 A EP 92901711A EP 92901711 A EP92901711 A EP 92901711A EP 0561964 A1 EP0561964 A1 EP 0561964A1
Authority
EP
European Patent Office
Prior art keywords
die
optical element
bumps
electrical conductors
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP92901711A
Other languages
German (de)
English (en)
Other versions
EP0561964B1 (fr
Inventor
Gary Arthur Hallenbeck
Wilbert Frank Janson, Jr.
William Bruce Jones
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eastman Kodak Co
Original Assignee
Eastman Kodak Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eastman Kodak Co filed Critical Eastman Kodak Co
Publication of EP0561964A1 publication Critical patent/EP0561964A1/fr
Application granted granted Critical
Publication of EP0561964B1 publication Critical patent/EP0561964B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0232—Optical elements or arrangements associated with the device
    • H01L31/02325—Optical elements or arrangements associated with the device the optical elements not being integrated nor being directly associated with the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements

Definitions

  • the invention relates generally to optoelectronic devices and, more particularly, to optoelectronic device component packages and methods of making the same.
  • Optoelectronic devices typically comprise an optical system located in front of a photoelectric device.
  • the optical system can be a lens.
  • the photo-active device can be a light-emitting device or a light-detecting device.
  • the photoelectric device generally comprises a photoelectric die having a light-sensitive or _ light-emitting region thereon.
  • the photoelectric die includes die bond pads for electrically connecting thereto. Bond wires are used to connect the die bond pads to a lead frame.
  • the photoelectric die, bond wires, and lead frame are encased in a plastic or ceramic material.
  • the optoelectronic device package typically comprises a housing for supporting and locating the lens in front of the photoelectric die.
  • a disadvantage of the prior art optoelectronic devices is expense, the requirement of bond wires, and the difficulty of accurately locating the optical system in front of the photoelectric device.
  • Japanese Laid-Open Patent Publication No. 62-21282 shows a photoconductive detector.
  • the photoconductive detector includes a lens bonded to a semiconductor layer having opposing electrodes formed in contact with the layer.
  • the lens focuses upon a portion of the available light sensitive area of the detector.
  • One disadvantage of this detector is that it requires traditional bonding techniques, that is, it requires bond wires.
  • the photoconductive detector must be packaged for use. This adds additional manufacturing costs.
  • a light receiving element in another Japanese Laid-Open Patent Publication, No. 60-153184, a light receiving element is shown.
  • the light receiving element includes a photoelement chip fixed to a lower surface of an insulating glass. Electrodes are formed onto the lower surface of the glass.
  • a drawback to the light receiving element is that it requires traditional bonding techniques. That is, a bond wire is required to connect the photoelement chip to an electrode. Thus, in its manufacture, a bond wire must be located to an electrode for each device which adds cost to the manufacture of the device. Furthermore, external lead wires are used for electrically connecting the light receiving element to an external circuit which also increases the cost of using such a device.
  • a photo receiving electronic device is shown.
  • a photo receiving element is mounted by a flip chip technique onto a transparent substrate.
  • a drawback of the photo receiving electronic device is that it is not packaged in a ready-for- ⁇ se form therefore increasing the cost of its use.
  • the transparent substrate of the device provides no significant lens effect, thus, in situations requiring a lens effect an external lens is required.
  • U.S. 4,843,036 to Schmidt et al shows a method of encapsulating an electronic device on a substrate. The electronic device is attached to the substrate and bond wires are used to connect bond pads of the electronic device to electrical conductors formed on the substrate.
  • An optically clear encapsulant is dispensed over the electronic device and the bond wires, encapsulating the device. Upon curing the encapsulant, a lens-like element is produced.
  • the encapsulated device shown in Schmidt et al suffers from the disadvantage that bond wires are required. Use of bond wires increases the succeptability of the device for failure during its manufacture and also adds cost. Furthermore, the lens-like element produced may not be of sufficient quality for a particular application.
  • the principal object of the present invention is to provide an efficient and reliable optoelectronic device package.
  • Another object of the present invention is to provide a cost effective method of manufacturing an optoelectronic device package, without the use of traditional bonding techniques.
  • Another object of the present invention is to provide a cost effective optoelectronic device package. Still another object of the present invention is to provide an optoelectronic device component that is in ready-for-use condition, without the need for traditional bonding techniques.
  • an optoelectronic device package comprises an optical element having a piano surface with a pattern of electrical conductors thereon, a photoelectric die having an optically active portion and die bond pads, and a printed circuit board having a pattern of electrical conductors thereon and further having an aperture for receiving the die.
  • the die is attached to the piano surface of the optical element such that the die bond pads are electrically connected to corresponding electrical conductors of the optical element.
  • the circuit board is attached to the piano surface of the optical element and the electrical conductors of the circuit board are electrically connected to corresponding conductors of the optical element.
  • a protective means affixed to the die, the piano surface of the optical element, and a portion of the circuit board protects the device package.
  • the die can be (1) an emitter or detector die for camera autofocus applications; or (2) a photometer die for exposure control applications.
  • FIG. 1 is a cross-sectional view of an optoelectronic device package in accordance with a preferred embodiment of the invention
  • FIG. 2 is a top perspective view of an optical element used in the optoelectronic device package of the present invention.
  • FIG. 3 depicts a front surface view of a photoelectric die used in the optoelectronic device package of the present invention.
  • FIG. 4 is a cross-sectional view of an optoelectronic device package in accordance with an alternate embodiment of the invention.
  • FIG. 5 is a top perspective view of the optoelectronic device package in accordance with the present invention.
  • FIG. 6 is a cross-sectional view of an optoelectronic device package in accordance with an alternate embodiment of the invention.
  • FIG. 7 is a cross-sectional view of an optoelectronic device package in accordance with an alternate embodiment of the invention. DESCRIPTION OF THE PREFERRED EMBODIMENT
  • the optoelectronic device package 10 comprises an optical element 12, a photoelectric die 14, and a printed circuit board 16.
  • An optoelectronic device component according to the invention comprises optical element 12 having die 14 attached thereto.
  • Optical element 12 is representative of a prime imaging system. Light entering a front surface 21 of element 12 converges onto piano surface 20 to form an image. For example, a desired field of view (or field coverage) may correspond to the lateral size of an area designated by A. In a like manner, light emanating from area A is collimated as it exits front surface 21.
  • optical element 12 includes refractive surface 21 and piano surface 20.
  • Refractive surface 21 may be aspherical.
  • Optical element 12 may be manufactured by injection molding techniques well known in the art.
  • the focal length of optical element 12 is designed to provide a desired image size, designated by A, such that appropriate coverage of optically active area 30 of die 14 is obtained.
  • piano surface 20 includes raised bumps 24 and 26. Raised bumps 24 and 26 are formed in piano surface 20 during the injection molding process of making element 12.
  • Electrical conductors 22 can be formed onto piano surface 20 via vacuum deposition techniques known in the art. Piano surface 20 is appropriately masked and conductive material is deposited thereon. Electrical conductors 22 are formed such that each conductor 22 overlays a first and a second bump, 24 and 26, respectively. An advantage of conductors 22 overlaying bumps 24 and 26 is the elimination of separate conductive bumps at electrical contact points. Such conductive bumps are formed via a process known as conductive bumping, to be explained subsequently. Simultaneously with the forming of conductors 22 is the forming of fiducial mark 23, using the conductive material. Fiducial mark 23 provides a positioning reference for positioning die 14 and circuit board 16 onto element 12.
  • Photoelectric dies are well known in the art.
  • Die 14 is representative of a photo detector die or a light emitting die.
  • photoelectric die 14 comprises an optically active portion 30 and die bond pads 32.
  • the optically active portion 30 and the die bond pads 32 are located on a same side of die 14.
  • Optically active portion 30 can be a light receiving portion for receiving light or it can be a light emitting portion for transmitting light.
  • optically active portion 30 can comprise numerous optically active portions.
  • Die 14 is attached to piano surface 20 of element 12 via an optically transparent non-conductive adhesive 28.
  • Die bond pads 32 electrically connect die 14 to conductors 22 at first bumps 24, wherein, conductors 22 at bumps 24 represent electrical contact points.
  • Adhesive 28 is non-conductive and comprises a curable adhesive having optical grade, high transmission properties. Adhesive 28 also has the properties of being a low viscosity fast curing adhesive. A variety of curing methods are available depending upon the adhesive used, for example, such methods may include but are not limited to thermal, radiation, or chemical catalyst curing. Adhesive 26 may be radiatively curable, for example, commercially available adhesive product UV-311, from Emerson & Cumming. Adhesive 28 may be selectively screened onto piano surface 20 of element 12, whereby points of electrical connection or electrical contact points on the piano surface 20 are left uncovered by the adhesive. Turning again to Fig. 1, printed circuit board 16 comprises a circuit board having a circuit pattern (not shown) and electrical conductors 34 thereon.
  • Circuit board 16 can be either a rigid circuit board or a flexible circuit board, wherein circuit board 16 is manufactured by techniques known in the art. Circuit board 16 further includes an aperture 36 for receiving die 14. Circuit board 16 is attached to the piano surface 20 of optical element 12 via adhesive 28, wherein die 14 is received within aperture 36. Electrical conductors 34 electrically connect board 16 to conductors 22 second bumps 26, wherein, conductors 22 at bumps 26 represent electrical contact points, also.
  • optoelectronic device package 10 includes a protective means 38.
  • Protective means 38 protects a back surface of die 14, a portion of piano surface 20, and a portion of circuit board 16.
  • Protective means 38 comprises a protective material attached to die 14, piano surface 20, and board 16.
  • Protective means 38 is preferrably opaque but may also be transparent.
  • the protective material is non-conductive and comprises a low viscosity curable material.
  • a variety of curing methods are available depending upon the adhesive used, for example, such methods may include but are not limited to thermal, radiation, or chemical, catalyst curing.
  • Protective means 38 may be, for example, commercially available encapsulant material Dexter Hysol product EO 1061.
  • Protective means 38 can also be a physical cap attached to circuit board 16, overlaying die 14, a portion of piano surface 20, and a portion of board 16.
  • a top perspective view of optoelectronic device package 10 is shown in Fig. 5. In an alternate embodiment shown in Fig. 6, optoelectronic device package 10 is similar to that shown in Fig. 4 with the following differences.
  • Piano surface 20 comprises a flat surface having no bumps therein.
  • Electrical conductors 23 are formed on the piano surface 20.
  • Each electrical conductor 23 has first and second conductive bumps, 25 and 27, respectively, formed thereon.
  • Conductive bumps 25 and 27 are formed by a process known in the art as conductive bumping, wherein a bump of conductive material is formed upon a conductor or a conductive contact point.
  • Die bond pads 32 electrically connect to electrical conductors 23 via first conductive bumps 25.
  • electrical conductors 34 of circuit board 16 electrically connect to electrical conductors 23 via second conductive bumps 27.
  • optoelectronic device package 10 is similar to that shown in Fig. 4 with the following differences.
  • Piano surface 20 comprises a flat surface having no bumps therein. Electrical conductors 23 are formed on the piano surface 20. Die bond pads 32 have conductive bumps 33 formed thereon. Electrical conductors 34 of circuit board 16 have conductive bumps 35 formed thereon. Die bond pads 32 electrically connect to electrical conductors 23 via conductive bumps 33. Likewise, electrical conductors 34 of circuit board 16 electrically connect to electrical conductors 23 via conductive bumps 35.
  • optoelectronic device package 10 is manufactured preferably by an adhesive bonding technique. While the invention is described with respect to adhesive bonding techniques, the optoelectronic device component package may be manufactured using flip chip techniques or Tape Automated Bonding. Both flip chip techniques and Tape Automated Bonding are well known in the art and are therefore not discussed herein.
  • Electrical conductors 22 are formed onto piano surface 20 of optical element 12, piano surface 20 having bumps 24 and 26 therein (Fig. 1). In the preferred embodiment, each conductor 22 overlays first and second bumps, 24 and 26, respectively.
  • Optically transparent adhesive 28 is selectively screened onto piano surface 20 of element 12, leaving points of electrical connection uncovered.
  • Die 14 is selectively placed onto piano surface 20 by standard pick and place methods for a die placement operation that is well known in the art. That is, die 14 is optically aligned to the optical element 12 using fiducial mark 23 (Fig, 2) and then placed onto piano surface 20.
  • Circuit board 16 is similarly aligned and placed onto piano surface 20, wherein a corner edge of aperture 36 is optically aligned with fiducial mark 23.
  • the adhesive 28 is then cured by suitable radiation as recommended by the adhesive manufacturer.
  • the optical element 12, die 14, circuit board 16, and adhesive 28 are subjected to ultra-violet radiation and/or elevated temperture to cure adhesive 28. Curing of adhesive 28 causes optical element 12, die 14, and circuit board 16 to be drawn closer together, thus forcing electrical contact between corresponding electrical contact points.
  • a controlled amount of curable material 38 is dispensed in a viscous state over the die 14, a portion of the piano surface 20, and a portion of circuit board 16.
  • the curable material becomes a protective opaque encapsulant when cured.
  • the alternate embodiment, as shown in Fig. 6, is manufactured by the same method as the preferred embodiment shown in Fig. 1, except for the following.
  • piano surface 20 of element 12 contains no bumps therein.
  • Conductive bumps 25 and 27 electrically connect with die bond pads 32 and electrical conductors 34, respectively.
  • the optoelectronic device package shown in Fig. 7 is manufactured by the same method as the preferred embodiment shown in Fig. 1, except for the following.
  • Electrical conductors 23 are formed onto piano surface 20 of optical element 12.
  • Die bond pads 32 of die 14 include conductive bumps 33 for electrically connecting to conductors 23 of element 12, conductive bumps 33 being formed onto die bond pads 32 by conductive bumping.
  • Electrical conductors 34 of circuit board 16 include conductive bumps 37 for electrically connecting to conductors 23 of element 12, conductive bumps 37 being formed onto conductors 34 by conductive bumping also.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Light Receiving Elements (AREA)

Abstract

Module composant de dispositif optoélectronique comprenant un élément optique possédant une surface plane comportant une configuration de conducteurs électriques, une puce photoélectrique présentant une partie optiquement active et des plots de liaison de puce, et une carte de circuit imprimé comportant une configuration de conducteurs électriques ainsi qu'une ouverture recevant la puce. Celle-ci est fixée à la surface plane de l'élément optique de sorte que les plots de liaison de puce soient reliés électriquement aux conducteurs électriques correspondants de l'élément optique. La carte de circuit est fixée sur la surface plane de l'élément optique et les conducteurs électriques de la carte de circuit sont reliés électriquement aux conducteurs correspondants de l'élément optique. Un élément de protection fixé sur la puce, sur la surface plane de l'élément optique et sur une partie de la carte de circuit protège le module du dispositif. La puce peut être soit (1) une puce émettrice ou détectrice pour des applications de mise au point automatique d'appareils photographiques; soit (2) une puce photomètre utilisée dans des applications de réglage d'exposition.
EP92901711A 1990-12-12 1991-12-03 Module composant de dispositif optoelectronique et procede de production Expired - Lifetime EP0561964B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US07/626,663 US5149958A (en) 1990-12-12 1990-12-12 Optoelectronic device component package
US626663 1990-12-12
PCT/US1991/008883 WO1992010856A1 (fr) 1990-12-12 1991-12-03 Module composant de dispositif optoelectronique et procede de production

Publications (2)

Publication Number Publication Date
EP0561964A1 true EP0561964A1 (fr) 1993-09-29
EP0561964B1 EP0561964B1 (fr) 1998-06-03

Family

ID=24511309

Family Applications (1)

Application Number Title Priority Date Filing Date
EP92901711A Expired - Lifetime EP0561964B1 (fr) 1990-12-12 1991-12-03 Module composant de dispositif optoelectronique et procede de production

Country Status (5)

Country Link
US (2) US5149958A (fr)
EP (1) EP0561964B1 (fr)
JP (1) JPH06503683A (fr)
DE (1) DE69129547T2 (fr)
WO (1) WO1992010856A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007055072B4 (de) * 2007-11-16 2018-11-08 Wanzl Metallwarenfabrik Gmbh Transportwagen

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5299730A (en) * 1989-08-28 1994-04-05 Lsi Logic Corporation Method and apparatus for isolation of flux materials in flip-chip manufacturing
US5489804A (en) * 1989-08-28 1996-02-06 Lsi Logic Corporation Flexible preformed planar structures for interposing between a chip and a substrate
US5834799A (en) * 1989-08-28 1998-11-10 Lsi Logic Optically transmissive preformed planar structures
US5504035A (en) * 1989-08-28 1996-04-02 Lsi Logic Corporation Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interposer substrate
US7198969B1 (en) * 1990-09-24 2007-04-03 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US20010030370A1 (en) * 1990-09-24 2001-10-18 Khandros Igor Y. Microelectronic assembly having encapsulated wire bonding leads
FR2683390A1 (fr) * 1991-10-30 1993-05-07 Sodern Detecteur d'images a lumiere parasite reduite et application a un senseur de terre.
US5359190A (en) * 1992-12-31 1994-10-25 Apple Computer, Inc. Method and apparatus for coupling an optical lens to an imaging electronics array
JPH07333055A (ja) * 1994-06-03 1995-12-22 Matsushita Electric Ind Co Ltd 光検出器
EP0690515A1 (fr) 1994-06-30 1996-01-03 Eastman Kodak Company Assemblage optoélectronique et méthode de fabrication et d'utilisation de cet assemblage
DE19527026C2 (de) * 1995-07-24 1997-12-18 Siemens Ag Optoelektronischer Wandler und Herstellverfahren
DE19610881B4 (de) * 1995-12-07 2008-01-10 Limo Patentverwaltung Gmbh & Co. Kg Mikrosystembaustein
US5770889A (en) * 1995-12-29 1998-06-23 Lsi Logic Corporation Systems having advanced pre-formed planar structures
US5925898A (en) * 1996-07-18 1999-07-20 Siemens Aktiengesellschaft Optoelectronic transducer and production methods
DE19643911A1 (de) * 1996-10-30 1998-05-07 Sick Ag Schaltungsanordnung mit auf einem mit Leiterbahnen versehenen Substrat angebrachten optoelektronischen Bauelementen
US6525386B1 (en) * 1998-03-10 2003-02-25 Masimo Corporation Non-protruding optoelectronic lens
US6130448A (en) * 1998-08-21 2000-10-10 Gentex Corporation Optical sensor package and method of making same
US6407401B1 (en) * 2000-06-16 2002-06-18 Agilent Technologies, Inc. Photoconductive relay and method of making same
AU7054300A (en) * 1999-08-06 2001-03-05 Silicon Film Technologies, Inc. Flip-chip package with image plane reference
US6876052B1 (en) 2000-05-12 2005-04-05 National Semiconductor Corporation Package-ready light-sensitive integrated circuit and method for its preparation
US6875640B1 (en) * 2000-06-08 2005-04-05 Micron Technology, Inc. Stereolithographic methods for forming a protective layer on a semiconductor device substrate and substrates including protective layers so formed
DE10034865B4 (de) * 2000-07-18 2006-06-01 Infineon Technologies Ag Optoelektronisches oberflächenmontierbares Modul
US6876072B1 (en) 2000-10-13 2005-04-05 Bridge Semiconductor Corporation Semiconductor chip assembly with chip in substrate cavity
US6872591B1 (en) 2000-10-13 2005-03-29 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with a conductive trace and a substrate
US6613597B2 (en) * 2001-06-29 2003-09-02 Xanoptix, Inc. Optical chip packaging via through hole
US7831151B2 (en) 2001-06-29 2010-11-09 John Trezza Redundant optical device array
US6987034B1 (en) 2002-01-09 2006-01-17 Bridge Semiconductor Corporation Method of making a semiconductor package device that includes singulating and trimming a lead
US7190060B1 (en) 2002-01-09 2007-03-13 Bridge Semiconductor Corporation Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same
US6891276B1 (en) 2002-01-09 2005-05-10 Bridge Semiconductor Corporation Semiconductor package device
US6936495B1 (en) 2002-01-09 2005-08-30 Bridge Semiconductor Corporation Method of making an optoelectronic semiconductor package device
US6823586B2 (en) * 2002-05-29 2004-11-30 Meriton Networks Inc. Method of mounting a butterfly package on a PCB
US7199438B2 (en) * 2003-09-23 2007-04-03 Advanced Semiconductor Engineering, Inc. Overmolded optical package
US6830221B1 (en) * 2003-12-19 2004-12-14 The Aerospace Corporation Integrated glass ceramic spacecraft
WO2007023411A1 (fr) 2005-08-24 2007-03-01 Philips Intellectual Property & Standards Gmbh Diodes electroluminescentes et diodes laser et convertisseurs de couleurs
US7781852B1 (en) * 2006-12-05 2010-08-24 Amkor Technology, Inc. Membrane die attach circuit element package and method therefor
US8138027B2 (en) * 2008-03-07 2012-03-20 Stats Chippac, Ltd. Optical semiconductor device having pre-molded leadframe with window and method therefor
US8265487B2 (en) * 2009-07-29 2012-09-11 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Half-duplex, single-fiber (S-F) optical transceiver module and method
JP6043939B2 (ja) * 2012-08-24 2016-12-14 ボンドテック株式会社 基板上への対象物の位置決め方法及び装置
JP6137839B2 (ja) * 2013-01-15 2017-05-31 三菱電機株式会社 受信光学系
DE102013219063A1 (de) * 2013-09-23 2015-03-26 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement und Verfahren zu seiner Herstellung
US10431955B2 (en) * 2014-04-25 2019-10-01 Lmd Power Of Light Corp Laser core having conductive mass electrical connection

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE631066A (fr) * 1962-04-16
US3622419A (en) * 1969-10-08 1971-11-23 Motorola Inc Method of packaging an optoelectrical device
US3820237A (en) * 1971-05-17 1974-06-28 Northern Electric Co Process for packaging light emitting devices
US3938177A (en) * 1973-06-25 1976-02-10 Amp Incorporated Narrow lead contact for automatic face down bonding of electronic chips
US3999280A (en) * 1973-06-25 1976-12-28 Amp Incorporated Narrow lead contact for automatic face down bonding of electronic chips
US4032963A (en) * 1974-09-03 1977-06-28 Motorola, Inc. Package and method for a semiconductor radiant energy emitting device
US3964157A (en) * 1974-10-31 1976-06-22 Bell Telephone Laboratories, Incorporated Method of mounting semiconductor chips
JPS5321771A (en) * 1976-08-11 1978-02-28 Sharp Kk Electronic parts mounting structure
JPS546787A (en) * 1977-06-17 1979-01-19 Matsushita Electric Ind Co Ltd Luminous element
JPS56103484A (en) * 1980-01-21 1981-08-18 Fuji Photo Film Co Ltd Manufacture of semiconductor device for photoelectric conversion
JPS56103481A (en) * 1980-01-21 1981-08-18 Fuji Photo Film Co Ltd Manufacture of semiconductor device for photoelectric conversion
DE3172553D1 (en) * 1980-11-28 1985-11-07 Toshiba Kk Method for manufacturing a module for a fiber optic link
JPS59110178A (ja) * 1982-12-15 1984-06-26 Seiko Epson Corp 受光素子
JPS59198770A (ja) * 1983-04-26 1984-11-10 Fuji Electric Co Ltd 受光電子装置
JPS59220982A (ja) * 1983-05-31 1984-12-12 Sumitomo Electric Ind Ltd 光素子用パッケ−ジ
JPS607767A (ja) * 1983-06-27 1985-01-16 Nec Corp 半導体装置
NL8303251A (nl) * 1983-09-22 1985-04-16 Philips Nv Werkwijze voor het optisch verbinden van een lichtgeleider aan een elektrooptische inrichting.
JPS60153184A (ja) * 1984-01-21 1985-08-12 Sumitomo Electric Ind Ltd 受光素子
US4662735A (en) * 1985-01-16 1987-05-05 Minolta Camera Kabushiki Kaisha Plastic lens elements supporting structure
JPS6221282A (ja) * 1985-07-22 1987-01-29 Nippon Telegr & Teleph Corp <Ntt> 光伝導形検出器
JPS63176A (ja) * 1986-06-19 1988-01-05 Honda Motor Co Ltd 複合型光センサ
US4843036A (en) * 1987-06-29 1989-06-27 Eastman Kodak Company Method for encapsulating electronic devices
JPH0821672B2 (ja) * 1987-07-04 1996-03-04 株式会社堀場製作所 イオン濃度測定用シート型電極の製造方法
US4967261A (en) * 1987-07-30 1990-10-30 Mitsubishi Denki Kabushiki Kaisha Tape carrier for assembling an IC chip on a substrate
JPH0813791B2 (ja) * 1987-12-18 1996-02-14 三井石油化学工業株式会社 アニリン類の製造方法
US4967260A (en) * 1988-05-04 1990-10-30 International Electronic Research Corp. Hermetic microminiature packages
US5066614A (en) * 1988-11-21 1991-11-19 Honeywell Inc. Method of manufacturing a leadframe having conductive elements preformed with solder bumps
US5075253A (en) * 1989-04-12 1991-12-24 Advanced Micro Devices, Inc. Method of coplanar integration of semiconductor IC devices
US5065227A (en) * 1990-06-04 1991-11-12 International Business Machines Corporation Integrated circuit packaging using flexible substrate

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9210856A1 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007055072B4 (de) * 2007-11-16 2018-11-08 Wanzl Metallwarenfabrik Gmbh Transportwagen

Also Published As

Publication number Publication date
US5149958A (en) 1992-09-22
DE69129547D1 (de) 1998-07-09
DE69129547T2 (de) 1999-01-28
USRE35069E (en) 1995-10-24
JPH06503683A (ja) 1994-04-21
WO1992010856A1 (fr) 1992-06-25
EP0561964B1 (fr) 1998-06-03

Similar Documents

Publication Publication Date Title
US5149958A (en) Optoelectronic device component package
US8097895B2 (en) Electronic device package with an optical device
US6396116B1 (en) Integrated circuit packaging for optical sensor devices
KR100839976B1 (ko) 웨이퍼 수준에서 카메라 모듈을 제조하는 방법
US5302778A (en) Semiconductor insulation for optical devices
KR100575094B1 (ko) 광학장치용 모듈 및 그 제조방법
US6784409B2 (en) Electronic device with encapsulant of photo-set resin and production process of same
US7083999B2 (en) Optical device, method of manufacturing the same, optical module, circuit board and electronic instrument
US20060035415A1 (en) Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages
US20040256687A1 (en) Optical module, method of manufacturing the same, and electronic instrument
US20010004128A1 (en) Semiconductor package and manufacturing method thereof
US6707148B1 (en) Bumped integrated circuits for optical applications
US5216805A (en) Method of manufacturing an optoelectronic device package
CN111900181A (zh) 影像传感芯片晶圆级封装方法
JPH05218230A (ja) 半導体装置
JP2002009265A (ja) 固体撮像装置
EP0690515A1 (fr) Assemblage optoélectronique et méthode de fabrication et d&#39;utilisation de cet assemblage
EP0475370B1 (fr) Appareil compact de formation d&#39;images avec des caractéristiques optiques améliorées pour des endoscopes électroniques
JPH05259483A (ja) 光電変換用半導体パッケージ
JPH03142880A (ja) 半導体装置とそれを用いたイメージセンサ及びイメージセンサユニット
TW202135246A (zh) 攝像模組封裝結構
EP1523046A1 (fr) Filtre optique intégré

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19930603

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE FR GB

17Q First examination report despatched

Effective date: 19940826

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB

REF Corresponds to:

Ref document number: 69129547

Country of ref document: DE

Date of ref document: 19980709

ET Fr: translation filed
PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19981203

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 19981203

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19990831

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19991001