EP0480953A1 - Abtast- und halteglied - Google Patents

Abtast- und halteglied

Info

Publication number
EP0480953A1
EP0480953A1 EP90909649A EP90909649A EP0480953A1 EP 0480953 A1 EP0480953 A1 EP 0480953A1 EP 90909649 A EP90909649 A EP 90909649A EP 90909649 A EP90909649 A EP 90909649A EP 0480953 A1 EP0480953 A1 EP 0480953A1
Authority
EP
European Patent Office
Prior art keywords
operational amplifier
output
input
controllable
controllable switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP90909649A
Other languages
German (de)
English (en)
French (fr)
Inventor
Friedhelm Zucker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Deutsche Thomson Brandt GmbH
Original Assignee
Deutsche Thomson Brandt GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Thomson Brandt GmbH filed Critical Deutsche Thomson Brandt GmbH
Publication of EP0480953A1 publication Critical patent/EP0480953A1/de
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G11C27/024—Sample-and-hold arrangements using a capacitive memory element
    • G11C27/026—Sample-and-hold arrangements using a capacitive memory element associated with an amplifier
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements

Definitions

  • the invention relates to a sample and hold element with a first and a second operational amplifier, the output of which is fed back to the inverting input, and in which the input voltage is present at the inputs of the first operational amplifier.
  • Figure 17.17 on page 408 shows a sample and hold element with two voltage followers.
  • the output of the first voltage follower, an operational amplifier, the output of which is fed back to the inverting input, is connected to the non-inverting input of a two via a field-effect transistor serving as a switch ten operational amplifier connected.
  • the output of the second operational amplifier is fed back to the inverting input.
  • the non-inverting input of the second operational amplifier is at reference potential via a capacitance which serves as a storage capacitor.
  • the most important quality feature of a sample and hold element is the response time, often also called “acquisition time”. It indicates how long it takes under the most unfavorable conditions for the capacitor to charge up to the input voltage at the input of the first operational amplifier with a predetermined tolerance.
  • the invention solves this problem in that two capacitances are provided between the two operational amplifiers and in that one capacitance is alternately connected to the output of the first operational amplifier and the other to the input of the second operational amplifier.
  • the response time is considerably shortened; because while one capacitance outputs its charging voltage to the input of the second operational amplifier, the other capacitance is already reloaded to the new value at the output of the first operating system. The response time is therefore almost zero.
  • Figure 1 shows the prior art
  • Figure 2 shows an embodiment of the invention.
  • a negative feedback operational amplifier V1 At the inputs of a negative feedback operational amplifier V1 is the input voltage U E to be sampled and held from sampling time to sampling time.
  • the output of the operational amplifier V1 is connected to the input of a controllable switch S1 and S3.
  • the output of the controllable switch S1 is connected to the input of a controllable switch S2 and is also at a reference potential via a capacitance C1.
  • the output of the controllable switch S3 is connected to the input of a controllable switch S4 and is also connected to reference potential via a capacitance C2.
  • the interconnected outputs of the controllable switches S2 and S4 are connected to the non-inverting input of a negative feedback operational amplifier V2, at the output of which the output voltage U A can be removed.
  • controllable switches S2 and S3 are connected to the Q output
  • interconnected control inputs of controllable switches S1 and S4 are connected to the Q output of a flip-flop FF.
  • the flip-flop FF which serves as a frequency divider, there are the sampling pulses P.
  • controllable switches S1 and S4 and the controllable switches S2 and S3 are now alternately opened and closed together. If the controllable switches S1 and S4 are closed, but the controllable switches S2 and S3 are open, the capacitance C2 outputs its charging voltage to the operational amplifier V2, while at the same time the capacitance C1 is being recharged. At the following sampling time, controllable switches S1 and S4 are opened, while controllable switches S2 and S3 are closed. The capacitance C1 now immediately outputs its charging voltage to the operational amplifier V2, while at the same time the capacitance C2 from the operational amplifier V1 is reloaded.

Landscapes

  • Amplifiers (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Electronic Switches (AREA)
EP90909649A 1989-07-05 1990-06-13 Abtast- und halteglied Ceased EP0480953A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3922068 1989-07-05
DE3922068A DE3922068A1 (de) 1989-07-05 1989-07-05 Abtast- und halteglied

Publications (1)

Publication Number Publication Date
EP0480953A1 true EP0480953A1 (de) 1992-04-22

Family

ID=6384333

Family Applications (1)

Application Number Title Priority Date Filing Date
EP90909649A Ceased EP0480953A1 (de) 1989-07-05 1990-06-13 Abtast- und halteglied

Country Status (10)

Country Link
EP (1) EP0480953A1 (hu)
JP (1) JPH04506431A (hu)
KR (1) KR920704303A (hu)
CN (1) CN1019708B (hu)
AU (1) AU5928190A (hu)
DD (1) DD296570A5 (hu)
DE (1) DE3922068A1 (hu)
FI (1) FI920042A0 (hu)
HU (1) HUT60563A (hu)
WO (1) WO1991000600A1 (hu)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930004268B1 (ko) * 1990-10-15 1993-05-22 금성일렉트론 주식회사 광대역 샘플/홀드회로
US5340442A (en) * 1991-09-24 1994-08-23 Weyerhaeuser Company Evaluating furnish behavior
JP2006099850A (ja) * 2004-09-29 2006-04-13 Nec Electronics Corp サンプル・ホールド回路、駆動回路及び表示装置
KR101252331B1 (ko) * 2006-03-21 2013-04-08 캠브리지 아날로그 테크놀로지스, 인크. 비교기, 검출기, 그 회로 및 오프셋 제거방법
CN100505105C (zh) * 2006-12-07 2009-06-24 中国科学院半导体研究所 一种采样/保持电路装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3701152A (en) * 1970-07-20 1972-10-24 Us Navy Bipolar sample and hold circuit
JPS5085265A (hu) * 1973-11-28 1975-07-09
US4833445A (en) * 1985-06-07 1989-05-23 Sequence Incorporated Fiso sampling system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9100600A1 *

Also Published As

Publication number Publication date
AU5928190A (en) 1991-01-17
DD296570A5 (de) 1991-12-05
FI920042A0 (fi) 1992-01-03
CN1048623A (zh) 1991-01-16
HU905380D0 (en) 1992-03-30
KR920704303A (ko) 1992-12-19
CN1019708B (zh) 1992-12-30
HUT60563A (en) 1992-09-28
WO1991000600A1 (de) 1991-01-10
DE3922068A1 (de) 1991-01-17
JPH04506431A (ja) 1992-11-05

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