EP0404863A1 - Appareil electronique integre monolithique - Google Patents

Appareil electronique integre monolithique

Info

Publication number
EP0404863A1
EP0404863A1 EP19890908687 EP89908687A EP0404863A1 EP 0404863 A1 EP0404863 A1 EP 0404863A1 EP 19890908687 EP19890908687 EP 19890908687 EP 89908687 A EP89908687 A EP 89908687A EP 0404863 A1 EP0404863 A1 EP 0404863A1
Authority
EP
European Patent Office
Prior art keywords
electronic
monolithically integrated
integrated device
substrate
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19890908687
Other languages
German (de)
English (en)
Inventor
Gerhard Conzelmann
Robert Kainer
Gerhard Fiedler
Peter Jochen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Priority to EP94119468A priority Critical patent/EP0645818B1/fr
Publication of EP0404863A1 publication Critical patent/EP0404863A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection

Definitions

  • the invention relates to an electronic, monolithically integrated device according to the preamble of the main claim.
  • the electronic monolithically integrated device according to the invention with the characterizing features of the main claim has the advantage, in contrast, that simple means make it possible to prevent the development of a spreading minority current at all, to reduce its strength at the point of origin or to reduce the spreading To dampen minority current through recombination barriers and / or to suction through voltage-connected barriers that generate an electric field in the substrate. Further advantages result from subclaims 2 to 39. drawing
  • FIG. 1 shows the circuit of a transistor la generating directional and minority current and a transistor lb receiving the minority current
  • FIG. 2 shows the time course of the collector voltage of the transistor generating the directional current under the influence of a superimposed high-frequency AC voltage
  • FIG. 3 shows the connection of the transistor to a series diode to prevent a directional current
  • FIG. 4 shows a parallel diode to reduce it.
  • the principle of a barrier for intercepting the generated minority current is illustrated in FIG. 5, and the structures of necessary avalanche, Schottky or capacitance diodes with possible interconnections (FIGS. 7a-c) are explained in FIGS. 6a-e.
  • FIG. 8a shows a circuit with a transistor whose directional current is prevented by a series diode and a further transistor whose minority current injected into the substrate is intercepted by a barrier
  • FIG. 8b shows a section through the associated structure.
  • the circuit diagram of FIG. 9a with the associated layout according to FIG. 9b shows a simpler arrangement for a barrier.
  • the integrated structure of a dielectric capacitor is shown in FIG. 10, that of a transistor with a dielectrically insulated trough in FIG. 11 and that of a transistor insulated with a barrier layer in order to avoid directional currents in FIG.
  • 01 is the ground-side connection
  • 02 the connection for the positive pole of the operating voltage and 2 a transistor, as is customarily shown on a p-type substrate, 21 its emitter, 22 its base and 23 its collector, which on the one hand has the connection spot 03 is connected and on the other hand to the substrate as an anode 32 forms the parasitic diode 3;
  • Its cathode 31 thus corresponds to the collector 23 of 2.
  • the arrangement is exemplarily supplemented by a pnp transistor 4 with its emitter 41, its base 42 and its collector 43.
  • the substrate diode 3 is shown as a transistor with the cathode 31 as the emitter, the spatially extended substrate 32 as the base and the far-away collector 33, which is identical to the base 42 of the pnp transistor 4; the minority current formed by electrons is indicated by 331.
  • FIG. 2 shows the time course of the collector potential U_ against ground. If the line connected to the connection spots 01, 03 comes into the field of a strong transmitter, then amplitudes can be influenced which go far beyond the pending DC potential U__; this occurs at time t; a visual current is generated which converts the direct potential U to the value U,. lifts. It is generally not problematic to raise the DC potential U of the collector 23 from FIG. 2, but rather to inject a minority current 331 into the substrate, which is connected to the directional current. In addition, voltage curves with negative voltages against the substrate can occur in electronic systems even without high-frequency irradiation, such as correspond to the branch of the envelope marked in bold in FIG. 2; they also inject minorities. The long service life of the minorities results in long diffusion lengths in the field-free substrate, so that the minority current can also shift the operating points of far-away components, such as those of transistor 4. A numerical example should illustrate this:
  • the directional current is 300 mA, the minority current injected by it into the substrate is 10% thereof, ie 30 mA. If the base current of 4 is 1 uA, which already seems to be well dimensioned, then If the minority current is attenuated by 1: 30,000, both currents are only the same size.
  • the positive and negative poles of the operating voltage are again connected to the connection pads 01, 02; 2 in this example is the series transistor of a circuit part for voltage stabilization; 3 denotes the parasitic substrate diode, 5 denotes a diode connected between the connection pad 03 and the collector 23, and 6 denotes a capacitance connected downstream of the diode 5 — in this example, a capacitance diode.
  • the diode 5 in conjunction with the capacitor 6 reliably prevents the polarization of the diode 3 in the forward direction; the capacitor 6 is required in order to reliably prevent the potential at the collector 23 from submerging below the ground potential due to the intrinsic capacitance and blocking inertia of the diode 5.
  • the capacitor 6 can also be enlarged.
  • the diode 5 can also be formed by the emitter-base diode of a pnp transistor; in this case the capacitor 6 is to be connected to the collector of the pnp transistor. Minorities generated by the pn junction 5 do not spread, since they are captured by the positive DC potential present at 23.
  • the emitter 21 of the npn transistor 2 is at the connection pad 01, its collector 23 at the connection pad 03;
  • a diode 7 is now connected in parallel with the pn junction 3, which is polarized in the forward direction when the collector potential is negative.
  • the diode 7 may reduce the directional current through 3 in connection with the resistors 71 and / or 73; one is particularly advantageous Schottky diode as diode 7, since it can be represented with a significantly lower forward voltage than 3 and injects almost no minorities.
  • the barrier denoted by 8 is connected between the diode 3 acting as an npn transistor and the pnp transistor 4 to be disrupted by the minority current.
  • the barrier 8 is biased positively by the current source 81; it can absorb the entire minority current, provided the current of the current generator 81 is sufficiently productive;
  • an advantageous development of the invention provides for this current to be designed as a function of the directional or minority current. A possible embodiment will be shown later with reference to Figures 8a, b.
  • the barrier should either enclose the critical parts of the monolithically integrated circuit or else the components injecting minority currents. It is particularly advantageous to arrange the latter on the chip edge and to let the sufficiently wide barrier 8 pass from chip edge to chip edge over a corner or straight through. In addition, it is advantageous to arrange the parts of the monolithically integrated circuit which are less sensitive to minority currents in the layout immediately after the barrier 8, as a result of which the outlay for an interference-free circuit can be reduced.
  • the interference immunity is usually only required for certain limit field strengths of the interfering transmitters or certain limit directional currents. In practice, however, even higher field strengths or directional currents can occur, so that the protective means used fail.
  • a Hall sensor in the ignition distributor of a motor vehicle with a digital engine control only serves to determine the cylinder 1; it may fail temporarily during operation, provided that it does not affect the ignition; this is the case when the collector 23 of its output transistor does not change to the switched-on state. This requirement can also be easily met by the person skilled in the art by arranging the corresponding components in the layout.
  • FIGS. 6a to 6e show an example of a possible process for representing the subject matter of the invention on the basis of a sectional image of the structures of any necessary avalanche, Schottky or capacitance diodes. It means:
  • the insulation diffusion 002 is wide, the collector connection diffusion 003 is narrow from the bottom left to the top right, the structured metal 007 is shown hatched from the top left to the bottom right.
  • the diode according to FIG. 6a is formed by means of the insulation diffusion 002 seated on the buried layer 001; Depending on the management of the manufacturing processes, breakdown voltages of between approximately 10 and 25 V result.
  • the diode according to FIG. 6b is formed by means of an emitter diffusion zone 005 lying within the insulation diffusion 002 with a lower breakdown voltage of approx. 6 V, but with a higher capacitance.
  • FIG. 6c shows the usual base (004) emitter diode (005); it has a greater sheet resistance, but is usually insulated against the substrate 000 by the n-doped space 100 (epitaxy) in a higher-blocking manner.
  • 6d is formed from the zones buried layer (001) and emitter (005) against the insulation (002) in a sandwich arrangement, the buried layer being led out via the collector connection diffusion 003. If 005 is connected to 003, the capacity increases. If, on the other hand, only 005 is used against 002, the double junction insulation results in a diode according to 6b in a bipolar version.
  • the arrangements according to FIG. 6 can also be used as avalanche diodes or capacitance diodes. Its area is to be designed as an avalanche diode in accordance with the surge energy to be absorbed, and as a capacitance diode in accordance with the required capacitance.
  • the diodes according to FIG. 6 can be combined as desired, as shown in some examples of FIGS. 7a-c.
  • FIG. 8a The object of the invention is explained in FIG. 8a with the aid of an exemplary circuit: 01, 02 again denotes the connection spots for the negative (ground) and the positive operating voltage, and 03 the connection spot for the collector of the output transistor.
  • the diodes 51, 52 and 53 with their internal resistance 54 serve to protect the circuit against the operating voltage superimposed voltage peaks; if their capacity is sufficiently large, they can also serve, according to patent application P 38 02 822, to dampen the line connected to 02/01; the entire circuit is protected against polarity reversal by the counter-connected diode 51.
  • 5 is a Schottky diode according to FIG.
  • the output of the diode 5 is capacitively connected to ground 01 through the diode 61.
  • the output transistor is designated 2. Since the directional and minority currents resulting from high-frequency alternating voltages cannot be prevented due to the requirement for a low saturation voltage of 2, the barrier 8 is arranged between the output transistor 2 and the active part of the monolithically integrated circuit, designated 44 .
  • the diode 74 with the (track) resistor 75 serves to protect the transistor 2 against overvoltages and possibly also to further attenuate the line connected to the connection point 03.
  • the barrier 8 consists of two parts: an upstream recombination zone, which consists of the the epitaxy, possibly in connection with the buried-layer diffusion, there is a barrier layer 82 and the p-doped zone 83, which acts as an emitter and is located in it, is connected to the cathode-side end of the diode 5 - that is to a low-voltage operating voltage is; they form the base 82 and emitter 83 of the pnp transistor serving as current source 81, the collector of which is equal to the zone 84 acting as an ohmic substrate contact for sucking off the minority current; the current flowing into the substrate is thus generated by the minority current itself.
  • the transistor 81 can also be embodied as a Darlington, in order to ensure a collector current sufficient to extract the entire minority current. Because of the relatively large current to be absorbed, the emitter 83 can also be located directly at the connection point 02 for the operating voltage or can also be connected there via its own diode.
  • the vertical field component generated by zone 84 in the substrate also acts in the vicinity of recombination zone 82 and increases its recombination current and thus also the base current of pnp transistor 81. While with large minority currents due to the high density gradient, sufficient recombination current on base 82 flows, it cannot be sufficient for small currents; A sufficient bias current is generated on the base 82 by means of the resistor 85 (FIG. 8 a) or the current source 86 (FIG. 8 b).
  • the structure of a possible arrangement in the layout is shown in FIG. 8b; the diode 52 is cut on the left edge.
  • the individual zones of the structure have already been explained on the basis of the description of FIG. 6.
  • the diodes 51 and 52 belonging to the protective circuit (further left would come 53) are arranged to the left, the Schottky diode 5 to the right, which has a common buried layer with the series transistor 1.
  • the more or less complex active part 44 of the monolithically integrated circuit begins.
  • the transistor 2 injecting minority currents when the collector potential is negative.
  • the barrier 8 between 2 and 44 is formed by the recombination electrode 82 and the insulation diffusion zone 84 as an ohmic contact to the substrate and collector as the current source
  • the capacitor 61 serving pnp transistor for extracting the minority current.
  • the capacitor 61 is arranged between the barrier 8 and the remaining circuit 44; this increases the distance between the contact to the substrate 84 and the next adjacent insulation diffusion zone 023 and thus the substrate resistance lying therebetween.
  • a further embodiment of the invention provides for barriers in the forms described above to be placed around components of the circuit to be protected, in order to possibly reduce the overall effort.
  • the necessary potential for sucking off the minority current is generated by the directional and minority current itself.
  • a resistance 34 formed by the substrate and insulation diffusion zones 002 diffused therein is introduced. Its resistance value can be easily set by the proportion of the resistance-determining insulation diffusion zones. If the collector 23, 31 becomes negative, the current 35 flows from the ground connection 01 through the resistor 34 further in the substrate through the pn junction 32, 31 to the collector connection 03. The connection 01 becomes positive.
  • the resistor 34 is shown by means of the substrate 000 and the insulation diffusion zones 002 running in the sectional plane, that is to say not visible, the anode 32 by the same zones and the cathode 31 by the buried layer 001, which over the collector connection diffusion 003 is connected to the collector connection 03.
  • Capacitors can also be produced by means of dielectric intermediate layers from the regular IC process, or additionally applied.
  • FIG. 10 gives an example with thin emitter oxide 060 as the dielectric; a zone made of emitter diffusion 005, reinforced by collector diffusion 003, forms the solid-state electrode contacted with 01, 63 is the counter electrode made of material of the conductor track system (AI) or also made of polysilicon or the like.
  • AI conductor track system
  • the emitter zone 005 is to be introduced into a p-doped zone which does not reach the substrate - here the base zone 004.
  • Directional currents against the substrate can also be avoided by dielectric (oxide, nitride or the like) insulation of the well of the transistor 2 in accordance with the arrangement according to FIG. 11; 061 denotes the thin insulating layer between the collector 23 of the transistor 2 and the substrate 000; all other names are already known. If this highly complex manufacturing process is needed for other reasons, this is a cheap solution.
  • Directional currents and thus the injection of a minority current into the substrate can also be introduced by introducing another one Suppress the barrier layer according to FIG. 12, particularly in the case of initial stage transistors.
  • a manufacturing process is used which has a lower insulation diffusion 020 and an upper insulation diffusion 021. If the lower insulation is placed on a buried layer zone and the side walls of the trough are introduced in a ring shape by means of the upper insulation 021, a trough is obtained which blocks the substrate bipolarly.
  • Another way of rendering minority flows harmless is to drastically reduce the carrier life of the minorities in the substrate by introducing recombination centers.
  • a measure to increase the recombination rate on the back of the chip can also be supportive, at least in the area of the barrier 8.
  • At the heart of the invention are means to be introduced into a monolithically integrated circuit in order to either avoid or dampen the minority currents injected into the substrate under the influence of high-frequency AC voltages, signal voltages or parasitic effects, or else to reduce their effect on the circuit.
  • this makes it possible to ensure the function of an electronic system with monolithically integrated circuits without additional outlay on discrete components or, in the case of radiated interference voltages, to dispense with interference suppressors which are difficult to accommodate, for example, in plug connections, or at least to reduce the outlay for this .

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Des lignes relient ledit appareil à l'extérieur, dont une au moins (01, 02) sert à l'alimentation dudit appareil électronique en tension de fonctionnement ou courant de fonctionnement et/ou une au moins est destinée aux entrées de signaux et/ou aux sorties de signaux. Des tensions alternatives haute fréquence peuvent être influencées sur les lignes par des champs magnétiques extérieurs haute fréquence, les amplitudes de ces tensions alternatives étant semblables ou supérieures au potentiel momentanément appliqué, ce qui fait qu'au moins une (3) des jonctions PN reliées directement ou indirectement à une ligne (01) et bloquées dans la zone de travail est polarisée en sens passant par la tension alternative haute fréquence influencée dans la zone des demi-ondes négatives, ce qui génère des courants directs continus moyens, qui injectent des courants minoritaires dans le matériau semiconducteur entourant la jonction PN (3) correspondante, qui sont au moins en partie captés par au moins une des composantes du circuit intégré monolithique et dont le point de fonctionnement dynamique est décalé, ce qui entraîne une défaillance de l'appareil électronique. La polarisation momentanée en sens passant de la jonction PN (3) bloquée qui se produit dans la zone des demi-ondes négatives de la tension alternative haute fréquence influencée est ainsi évitée dans le câblage grâce à une diode (5).
EP19890908687 1988-08-10 1989-08-02 Appareil electronique integre monolithique Withdrawn EP0404863A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP94119468A EP0645818B1 (fr) 1988-08-10 1989-08-02 Appareil électronique intégré monolithique

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE3827052 1988-08-10
DE3827052 1988-08-10
DE3924278A DE3924278A1 (de) 1988-08-10 1989-07-22 Elektronisches, monolithisch integriertes geraet
DE3924278 1989-07-22

Related Child Applications (2)

Application Number Title Priority Date Filing Date
EP94119468A Division EP0645818B1 (fr) 1988-08-10 1989-08-02 Appareil électronique intégré monolithique
EP94119468.0 Division-Into 1994-12-09

Publications (1)

Publication Number Publication Date
EP0404863A1 true EP0404863A1 (fr) 1991-01-02

Family

ID=25870957

Family Applications (2)

Application Number Title Priority Date Filing Date
EP94119468A Expired - Lifetime EP0645818B1 (fr) 1988-08-10 1989-08-02 Appareil électronique intégré monolithique
EP19890908687 Withdrawn EP0404863A1 (fr) 1988-08-10 1989-08-02 Appareil electronique integre monolithique

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP94119468A Expired - Lifetime EP0645818B1 (fr) 1988-08-10 1989-08-02 Appareil électronique intégré monolithique

Country Status (5)

Country Link
EP (2) EP0645818B1 (fr)
JP (1) JP3167306B2 (fr)
KR (1) KR0168323B1 (fr)
DE (2) DE3924278A1 (fr)
WO (1) WO1990001801A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4133245C2 (de) * 1991-10-08 2001-09-20 Bosch Gmbh Robert Bipolare monolithisch integrierte Schaltung
US5514612A (en) * 1993-03-03 1996-05-07 California Micro Devices, Inc. Method of making a semiconductor device with integrated RC network and schottky diode

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5582467A (en) * 1978-12-18 1980-06-21 Toshiba Corp Mis type integrated circuit with schottky clamp diode
FR2492165A1 (fr) * 1980-05-14 1982-04-16 Thomson Csf Dispositif de protection contre les courants de fuite dans des circuits integres
IT1197279B (it) * 1986-09-25 1988-11-30 Sgs Microelettronica Spa Dispositivo integrato per schermare l'iniezione di cariche nel substrato, in particolare in circuiti di pilotaggio di carichi induttivi e/o capacitivi

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9001801A2 *

Also Published As

Publication number Publication date
JP3167306B2 (ja) 2001-05-21
EP0645818A2 (fr) 1995-03-29
KR900702570A (ko) 1990-12-07
DE58909881D1 (de) 2002-01-03
KR0168323B1 (ko) 1998-12-15
JPH03500473A (ja) 1991-01-31
DE3924278A1 (de) 1990-02-15
WO1990001801A2 (fr) 1990-02-22
EP0645818B1 (fr) 2001-11-21
EP0645818A3 (fr) 1995-08-30
WO1990001801A3 (fr) 1990-04-05

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