EA201590755A1 - Полупроводниковое устройство, обладающее свойствами для предотвращения обратного проектирования - Google Patents

Полупроводниковое устройство, обладающее свойствами для предотвращения обратного проектирования

Info

Publication number
EA201590755A1
EA201590755A1 EA201590755A EA201590755A EA201590755A1 EA 201590755 A1 EA201590755 A1 EA 201590755A1 EA 201590755 A EA201590755 A EA 201590755A EA 201590755 A EA201590755 A EA 201590755A EA 201590755 A1 EA201590755 A1 EA 201590755A1
Authority
EA
Eurasian Patent Office
Prior art keywords
design
properties
semiconductor device
prevent reverse
devices
Prior art date
Application number
EA201590755A
Other languages
English (en)
Inventor
Уильям Эли Тэкер Третий
Роберт Фрэнсис Тэнзар
Майкл Клинтон Хоук
Original Assignee
Секьюэр Силикон Лэйер, Инк.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Секьюэр Силикон Лэйер, Инк. filed Critical Секьюэр Силикон Лэйер, Инк.
Publication of EA201590755A1 publication Critical patent/EA201590755A1/ru

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/57Protection from inspection, reverse engineering or tampering
    • H01L23/573Protection from inspection, reverse engineering or tampering using passive means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • H01L28/24Resistors with an active material comprising a refractory, transition or noble metal, metal compound or metal alloy, e.g. silicides, oxides, nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

Желательно проектировать и производить электронные интегральные схемы, которые являются устойчивыми к современным способам обратного проектирования. Предлагаются способ и устройство, которое обеспечивает проектирование микросхем, устойчивых к обратному проектированию, использующему современные способы разрушения слоев. Раскрытое устройство использует приборы, имеющие одинаковую геометрию, но разные уровни напряжения для создания различных логических элементов. Альтернативно, раскрытое устройство использует приборы, имеющие различные геометрии и одинаковые рабочие характеристики. Кроме того, раскрывается способ проектирования микросхемы, использующей такие приборы.
EA201590755A 2012-10-30 2012-12-14 Полупроводниковое устройство, обладающее свойствами для предотвращения обратного проектирования EA201590755A1 (ru)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/663,921 US9287879B2 (en) 2011-06-07 2012-10-30 Semiconductor device having features to prevent reverse engineering
PCT/US2012/069819 WO2014070216A1 (en) 2012-10-30 2012-12-14 Semiconductor device having features to prevent reverse engineering

Publications (1)

Publication Number Publication Date
EA201590755A1 true EA201590755A1 (ru) 2015-10-30

Family

ID=50628284

Family Applications (1)

Application Number Title Priority Date Filing Date
EA201590755A EA201590755A1 (ru) 2012-10-30 2012-12-14 Полупроводниковое устройство, обладающее свойствами для предотвращения обратного проектирования

Country Status (10)

Country Link
US (2) US9287879B2 (ru)
EP (1) EP2915257B1 (ru)
CN (2) CN110783329A (ru)
AP (1) AP2015008487A0 (ru)
BR (1) BR112015009523A2 (ru)
CA (1) CA2890031A1 (ru)
EA (1) EA201590755A1 (ru)
HK (1) HK1209914A1 (ru)
MX (1) MX344765B (ru)
WO (1) WO2014070216A1 (ru)

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US9287879B2 (en) * 2011-06-07 2016-03-15 Verisiti, Inc. Semiconductor device having features to prevent reverse engineering
US10262956B2 (en) 2017-02-27 2019-04-16 Cisco Technology, Inc. Timing based camouflage circuit
JP7109755B2 (ja) * 2018-02-15 2022-08-01 株式会社吉川システック 半導体装置

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Also Published As

Publication number Publication date
EP2915257A1 (en) 2015-09-09
US20130154687A1 (en) 2013-06-20
MX2015005339A (es) 2015-08-13
HK1209914A1 (en) 2016-04-08
EP2915257A4 (en) 2016-12-14
CN105324940B (zh) 2020-02-14
US20170062425A1 (en) 2017-03-02
CN105324940A (zh) 2016-02-10
BR112015009523A2 (pt) 2018-05-22
CA2890031A1 (en) 2014-05-08
AP2015008487A0 (en) 2015-05-31
US9287879B2 (en) 2016-03-15
WO2014070216A1 (en) 2014-05-08
EP2915257B1 (en) 2020-07-01
CN110783329A (zh) 2020-02-11
MX344765B (es) 2016-12-01

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