DE69930314D1 - On-chip abschluss - Google Patents

On-chip abschluss

Info

Publication number
DE69930314D1
DE69930314D1 DE69930314T DE69930314T DE69930314D1 DE 69930314 D1 DE69930314 D1 DE 69930314D1 DE 69930314 T DE69930314 T DE 69930314T DE 69930314 T DE69930314 T DE 69930314T DE 69930314 D1 DE69930314 D1 DE 69930314D1
Authority
DE
Germany
Prior art keywords
chip closure
closure
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69930314T
Other languages
English (en)
Other versions
DE69930314T2 (de
Inventor
F Taylor
A Price
How Lim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE69930314D1 publication Critical patent/DE69930314D1/de
Application granted granted Critical
Publication of DE69930314T2 publication Critical patent/DE69930314T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/28—Impedance matching networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/28—Impedance matching networks
    • H03H11/30—Automatic matching of source impedance to load impedance
DE69930314T 1998-12-31 1999-12-10 On-chip abschluss Expired - Lifetime DE69930314T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US224369 1994-04-07
US09/224,369 US6157206A (en) 1998-12-31 1998-12-31 On-chip termination
PCT/US1999/030607 WO2000041300A1 (en) 1998-12-31 1999-12-10 On-chip termination

Publications (2)

Publication Number Publication Date
DE69930314D1 true DE69930314D1 (de) 2006-05-04
DE69930314T2 DE69930314T2 (de) 2006-08-17

Family

ID=22840381

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69930314T Expired - Lifetime DE69930314T2 (de) 1998-12-31 1999-12-10 On-chip abschluss

Country Status (10)

Country Link
US (1) US6157206A (de)
EP (1) EP1145429B1 (de)
JP (1) JP5313418B2 (de)
KR (1) KR100431651B1 (de)
AU (1) AU2378400A (de)
DE (1) DE69930314T2 (de)
HK (1) HK1036698A1 (de)
IL (2) IL144023A0 (de)
TW (1) TW448613B (de)
WO (1) WO2000041300A1 (de)

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US6424175B1 (en) * 2000-09-11 2002-07-23 Intel Corporation Biased control loop circuit for setting impedance of output driver
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US7109744B1 (en) 2001-12-11 2006-09-19 Altera Corporation Programmable termination with DC voltage level control
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US6842035B2 (en) * 2002-12-31 2005-01-11 Intel Corporation Apparatus and method for bus signal termination compensation during detected quiet cycle
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US7894260B2 (en) * 2003-01-03 2011-02-22 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device having on-die termination circuit and on-die termination method
KR100532426B1 (ko) * 2003-03-25 2005-11-30 삼성전자주식회사 온-칩 터미네이션 저항의 미스매치를 보상할 수 있는반도체 장치
KR100541544B1 (ko) * 2003-05-06 2006-01-10 삼성전자주식회사 신호 충실도가 개선된 메모리 시스템
US6888369B1 (en) 2003-07-17 2005-05-03 Altera Corporation Programmable on-chip differential termination impedance
KR100583636B1 (ko) * 2003-08-19 2006-05-26 삼성전자주식회사 단일의 기준 저항기를 이용하여 종결 회로 및 오프-칩구동 회로의 임피던스를 제어하는 장치
US6859064B1 (en) 2003-08-20 2005-02-22 Altera Corporation Techniques for reducing leakage current in on-chip impedance termination circuits
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US6919769B2 (en) * 2003-09-24 2005-07-19 Intel Corporation Method and apparatus for fast lock acquisition in self-biased phase locked loops
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FR2878665B1 (fr) * 2004-11-30 2007-05-25 St Microelectronics Rousset Circuit amplificateur a transconductance a gain negatif
KR100621770B1 (ko) * 2004-12-14 2006-09-19 삼성전자주식회사 반도체 메모리 장치 및 그의 구동 및 테스팅 방법
US7196567B2 (en) * 2004-12-20 2007-03-27 Rambus Inc. Systems and methods for controlling termination resistance values for a plurality of communication channels
US7218155B1 (en) 2005-01-20 2007-05-15 Altera Corporation Techniques for controlling on-chip termination resistance using voltage range detection
US7221193B1 (en) 2005-01-20 2007-05-22 Altera Corporation On-chip termination with calibrated driver strength
KR100652398B1 (ko) * 2005-02-01 2006-12-01 삼성전자주식회사 출력 임피던스회로 및 이를 적용한 출력버퍼회로
FR2886746B1 (fr) * 2005-06-06 2007-08-10 Atmel Corp Regulation du niveau de tension de sortie
WO2006132821A2 (en) * 2005-06-06 2006-12-14 Atmel Corporation Output level voltage regulation
US7529955B2 (en) * 2005-06-30 2009-05-05 Intel Corporation Dynamic bus parking
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US7679397B1 (en) 2005-08-05 2010-03-16 Altera Corporation Techniques for precision biasing output driver for a calibrated on-chip termination circuit
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US7439760B2 (en) * 2005-12-19 2008-10-21 Rambus Inc. Configurable on-die termination
KR100681879B1 (ko) * 2006-01-16 2007-02-15 주식회사 하이닉스반도체 온-다이 터미네이션 제어 장치
US7486104B2 (en) 2006-06-02 2009-02-03 Rambus Inc. Integrated circuit with graduated on-die termination
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US7486085B2 (en) * 2006-09-13 2009-02-03 Mediatek Inc. Calibration circuit for resistance component
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JP4229164B2 (ja) * 2006-10-03 2009-02-25 ソニー株式会社 閃光装置
KR100790821B1 (ko) * 2006-11-15 2008-01-03 삼성전자주식회사 반도체 메모리 장치에서의 온다이 터미네이션 회로
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US20080162801A1 (en) * 2006-12-29 2008-07-03 Ripan Das Series termination for a low power memory interface
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US7969181B1 (en) * 2008-02-03 2011-06-28 Freescale Semiconductor, Inc. Device and method for adjusting an impedance of an output driver of an integrated circuit
TWI393349B (zh) * 2008-12-17 2013-04-11 Ind Tech Res Inst 信號傳收裝置及系統
WO2011159465A2 (en) 2010-06-17 2011-12-22 Rambus Inc. Balanced on-die termination
US8581619B2 (en) * 2011-08-25 2013-11-12 Stmicroelectronics International N.V. Impedance calibration circuit and method
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US9548734B1 (en) * 2015-12-26 2017-01-17 Intel Corporation Smart impedance matching for high-speed I/O
KR101948224B1 (ko) 2017-02-06 2019-02-14 광운대학교 산학협력단 이중 모드 유선 채널 송수신 드라이버
KR101995027B1 (ko) 2017-09-12 2019-07-01 광운대학교 산학협력단 정전류 소모가 없는 저전력 송신기
KR102111075B1 (ko) 2018-07-02 2020-05-14 광운대학교 산학협력단 저전력 유선 채널 송신기 및 이를 포함하는 송수신기

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Also Published As

Publication number Publication date
IL144023A (en) 2006-08-20
EP1145429B1 (de) 2006-03-08
US6157206A (en) 2000-12-05
KR20010094734A (ko) 2001-11-01
JP2002534887A (ja) 2002-10-15
IL144023A0 (en) 2002-04-21
EP1145429A1 (de) 2001-10-17
JP5313418B2 (ja) 2013-10-09
DE69930314T2 (de) 2006-08-17
KR100431651B1 (ko) 2004-05-17
WO2000041300A1 (en) 2000-07-13
AU2378400A (en) 2000-07-24
TW448613B (en) 2001-08-01
HK1036698A1 (en) 2002-01-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806