DE69907970D1 - Dynamisches register mit der fähigkeit zur prüfung der ruhestromaufnahme (iddq) - Google Patents

Dynamisches register mit der fähigkeit zur prüfung der ruhestromaufnahme (iddq)

Info

Publication number
DE69907970D1
DE69907970D1 DE69907970T DE69907970T DE69907970D1 DE 69907970 D1 DE69907970 D1 DE 69907970D1 DE 69907970 T DE69907970 T DE 69907970T DE 69907970 T DE69907970 T DE 69907970T DE 69907970 D1 DE69907970 D1 DE 69907970D1
Authority
DE
Germany
Prior art keywords
node
clock signal
transmission gate
iddq
retirement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69907970T
Other languages
English (en)
Other versions
DE69907970T2 (de
Inventor
Mehdi Hatamian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Application granted granted Critical
Publication of DE69907970D1 publication Critical patent/DE69907970D1/de
Publication of DE69907970T2 publication Critical patent/DE69907970T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G01R31/3008—Quiescent current [IDDQ] test or leakage current test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G01R31/3012—Built-In-Current test [BIC]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3016—Delay or race condition test, e.g. race hazard test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31712—Input or output aspects
    • G01R31/31715—Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318502—Test of Combinational circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318552—Clock circuits details
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318594—Timing aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/32—Reducing cross-talk, e.g. by compensating
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H04L1/242—Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03038—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a non-recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03114—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals
    • H04L25/03146—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals with a recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03254—Operation with other circuitry for removing intersymbol interference
    • H04L25/03267—Operation with other circuitry for removing intersymbol interference with decision feedback equalisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/067—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/497—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by correlative coding, e.g. partial response coding or echo modulation coding transmitters and receivers for partial response systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
    • H04L2025/03356—Baseband transmission
    • H04L2025/03363—Multilevel
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
    • H04L2025/03356—Baseband transmission
    • H04L2025/03369—Partial response
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03477—Tapped delay lines not time-recursive
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03484—Tapped delay lines time-recursive
    • H04L2025/0349—Tapped delay lines time-recursive as a feedback filter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03484—Tapped delay lines time-recursive
    • H04L2025/03496—Tapped delay lines time-recursive as a prediction filter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03484—Tapped delay lines time-recursive
    • H04L2025/03503—Tapped delay lines time-recursive as a combination of feedback and prediction filters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03592—Adaptation methods
    • H04L2025/03598—Algorithms
    • H04L2025/03611—Iterative algorithms
    • H04L2025/03617—Time recursive algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03592—Adaptation methods
    • H04L2025/03745—Timing of adaptation

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Artificial Intelligence (AREA)
  • Dc Digital Transmission (AREA)
  • Logic Circuits (AREA)
  • Medicines Containing Antibodies Or Antigens For Use As Internal Diagnostic Agents (AREA)
  • Tests Of Electronic Circuits (AREA)
DE69907970T 1998-11-13 1999-11-12 Dynamisches register mit der fähigkeit zur prüfung der ruhestromaufnahme (iddq) Expired - Lifetime DE69907970T2 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US10831998P 1998-11-13 1998-11-13
US108319P 1998-11-13
US10864798P 1998-11-16 1998-11-16
US108647P 1998-11-16
US13061699P 1999-04-22 1999-04-22
US130616P 1999-04-22
PCT/US1999/027057 WO2000029860A2 (en) 1998-11-13 1999-11-12 Dynamic register with iddq testing capability

Publications (2)

Publication Number Publication Date
DE69907970D1 true DE69907970D1 (de) 2003-06-18
DE69907970T2 DE69907970T2 (de) 2004-05-19

Family

ID=27380465

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69907970T Expired - Lifetime DE69907970T2 (de) 1998-11-13 1999-11-12 Dynamisches register mit der fähigkeit zur prüfung der ruhestromaufnahme (iddq)

Country Status (6)

Country Link
US (5) US6411117B1 (de)
EP (1) EP1145024B1 (de)
AT (1) ATE240532T1 (de)
AU (1) AU1726000A (de)
DE (1) DE69907970T2 (de)
WO (1) WO2000029860A2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69907970T2 (de) * 1998-11-13 2004-05-19 Broadcom Corp., Irvine Dynamisches register mit der fähigkeit zur prüfung der ruhestromaufnahme (iddq)
US7187907B2 (en) * 2000-05-09 2007-03-06 Bernard Widrow Simultaneous two-way transmission of information signals in the same frequency band
US7173551B2 (en) * 2000-12-21 2007-02-06 Quellan, Inc. Increasing data throughput in optical fiber transmission systems
US6738415B2 (en) 2001-03-22 2004-05-18 Sun Microsystems, Inc. Bi-directional communication system
US7095720B1 (en) * 2001-10-17 2006-08-22 Sprint Communications Company L.P. Trunk level echo canceller test system
US7035361B2 (en) 2002-07-15 2006-04-25 Quellan, Inc. Adaptive noise filtering and equalization for optimal high speed multilevel signal decoding
AU2003287628A1 (en) * 2002-11-12 2004-06-03 Quellan, Inc. High-speed analog-to-digital conversion with improved robustness to timing uncertainty
JP2007502054A (ja) * 2003-08-07 2007-02-01 ケラン インコーポレイテッド クロストークキャンセルのための方法とシステム
US7804760B2 (en) 2003-08-07 2010-09-28 Quellan, Inc. Method and system for signal emulation
US7570685B2 (en) * 2003-10-06 2009-08-04 Hiroshi Takatori System, method and apparatus for crosstalk cancellation
EP1687929B1 (de) 2003-11-17 2010-11-10 Quellan, Inc. Verfahren und system zur löschung von antennenstörungen
US7616700B2 (en) 2003-12-22 2009-11-10 Quellan, Inc. Method and system for slicing a communication signal
US7075175B2 (en) 2004-04-22 2006-07-11 Qualcomm Incorporated Systems and methods for testing packaged dies
US7336066B2 (en) * 2004-05-21 2008-02-26 Credence Systems Corporation Reduced pin count test method and apparatus
US7725079B2 (en) 2004-12-14 2010-05-25 Quellan, Inc. Method and system for automatic control in an interference cancellation device
US7522883B2 (en) 2004-12-14 2009-04-21 Quellan, Inc. Method and system for reducing signal interference
WO2007127369A2 (en) 2006-04-26 2007-11-08 Quellan, Inc. Method and system for reducing radiated emissions from a communications channel
US7352170B2 (en) * 2006-06-13 2008-04-01 International Business Machines Corporation Exhaustive diagnosis of bridging defects in an integrated circuit including multiple nodes using test vectors and IDDQ measurements
US7983373B2 (en) 2007-02-07 2011-07-19 Vintomie Networks B.V., Llc Clock distribution for 10GBase-T analog front end
KR101388674B1 (ko) * 2007-09-07 2014-04-25 삼성전자주식회사 고속 원 샷 웨이퍼 테스트를 위한 무선 인터페이스 프로브카드 및 이를 구비한 반도체 테스트 장치
US10213618B2 (en) * 2011-09-08 2019-02-26 Johnson & Johnson Consumer, Inc. Light therapy platform combination mask
US10434325B2 (en) * 2011-09-08 2019-10-08 Johnson & Johnson Consumer Inc. Light therapy platform mobile device applications
CN106776329B (zh) * 2016-12-23 2019-06-18 北京天诚同创电气有限公司 储能变流器的调试方法和调试设备
CN108228480B (zh) * 2017-12-29 2020-11-03 京信通信系统（中国）有限公司 一种数字滤波器及数据处理方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS641200A (en) * 1987-06-23 1989-01-05 Toshiba Corp Semiconductor integrated circuit
NL8900050A (nl) * 1989-01-10 1990-08-01 Philips Nv Inrichting voor het meten van een ruststroom van een geintegreerde monolitische digitale schakeling, geintegreerde monolitische digitale schakeling voorzien van een dergelijke inrichting en testapparaat voorzien van een dergelijke inrichting.
TW222725B (en) * 1993-07-09 1994-04-21 Philips Electronics Nv Testing sequential logic circuit upon changing into combinatorial logic circuit
US5528177A (en) * 1994-09-16 1996-06-18 Research Foundation Of State University Of New York Complementary field-effect transistor logic circuits for wave pipelining
JPH0897685A (ja) * 1994-09-22 1996-04-12 Fujitsu Ltd フリップフロップ回路
US5515302A (en) 1994-11-07 1996-05-07 Motorola, Inc. Method for identifying excessive power consumption sites within a circuit
US5612632A (en) * 1994-11-29 1997-03-18 Texas Instruments Incorporated High speed flip-flop for gate array
FR2739967B1 (fr) * 1995-10-16 1997-11-14 Sgs Thomson Microelectronics Procede d'initialisaiton d'un registre a decalage et registre associe
EP0811850B1 (de) * 1996-06-05 2005-07-27 Interuniversitair Micro-Elektronica Centrum Vzw Hochauflösendes Stromversorgungsprüfsystem
US6212119B1 (en) * 1998-11-09 2001-04-03 Broadcom Corp. Dynamic register with low clock rate testing capability
DE69907970T2 (de) * 1998-11-13 2004-05-19 Broadcom Corp., Irvine Dynamisches register mit der fähigkeit zur prüfung der ruhestromaufnahme (iddq)

Also Published As

Publication number Publication date
EP1145024A2 (de) 2001-10-17
US20040008050A1 (en) 2004-01-15
US6737859B2 (en) 2004-05-18
US20060028199A1 (en) 2006-02-09
US20050007097A1 (en) 2005-01-13
ATE240532T1 (de) 2003-05-15
EP1145024B1 (de) 2003-05-14
US6563333B2 (en) 2003-05-13
WO2000029860A3 (en) 2002-05-30
US7129697B2 (en) 2006-10-31
US6411117B1 (en) 2002-06-25
WO2000029860A2 (en) 2000-05-25
DE69907970T2 (de) 2004-05-19
AU1726000A (en) 2000-06-05
US20020163353A1 (en) 2002-11-07
US6927565B2 (en) 2005-08-09

Similar Documents

Publication Publication Date Title
DE69907970D1 (de) Dynamisches register mit der fähigkeit zur prüfung der ruhestromaufnahme (iddq)
US5004970A (en) Device and a process for detecting current flow in a MOS transistor
KR970031341A (ko) 클록신호에 의하여 제어되는 레벨변환회로(level conversion circuit controlled by colck signal)
KR970002369A (ko) 고정밀도 신호 발생 회로
KR870004446A (ko) 래치회로
EP0150606B1 (de) Komparator-Schaltungsanordnung
KR960012761A (ko) 로드 터미네이션 감지 회로
KR860002102A (ko) 샘플 및 홀드회로
KR940023060A (ko) 입력회로
DE69936277D1 (de) Synchron-Halbleiterspeichervorrichtung
KR850008420A (ko) 초기 스파이크 잡음 제거용 출력제어회로
KR960012859A (ko) 푸시풀 브리지 증폭기를 포함하는 전압 신호 선로 구동기
KR940010532A (ko) 인터페이스회로
TW367411B (en) Signal generator
EP0669719B1 (de) Verfahren und Schaltungsanordnung zur Verringerung transienter Ströme
JPH07191065A (ja) 集積コンパレータ回路
KR100283870B1 (ko) 마이크로컴퓨터
JPS60236190A (ja) センス・アンプ
KR100339247B1 (ko) 2-레벨테스트입력을갖는비교장치
KR100211078B1 (ko) 하프 래치 회로
KR940002027Y1 (ko) 퍼지 t형 래치회로
KR970013748A (ko) 클럭 관통 효과를 억제하기 위한 트랜스미션 게이트 회로
KR970055505A (ko) 고속 출력 래치 회로
KR970013655A (ko) 콘드롤 핀들간의 타이밍 규제 방법
JPS59112725A (ja) 半導体装置

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M