DE69517295T2 - Weicher Metallleiter und Herstellungsverfahren - Google Patents

Weicher Metallleiter und Herstellungsverfahren

Info

Publication number
DE69517295T2
DE69517295T2 DE69517295T DE69517295T DE69517295T2 DE 69517295 T2 DE69517295 T2 DE 69517295T2 DE 69517295 T DE69517295 T DE 69517295T DE 69517295 T DE69517295 T DE 69517295T DE 69517295 T2 DE69517295 T2 DE 69517295T2
Authority
DE
Germany
Prior art keywords
manufacturing process
metal conductor
soft metal
soft
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69517295T
Other languages
English (en)
Other versions
DE69517295D1 (de
Inventor
Vasant Joshi
Manu Jamnadas Tejwani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69517295D1 publication Critical patent/DE69517295D1/de
Publication of DE69517295T2 publication Critical patent/DE69517295T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Electrodes Of Semiconductors (AREA)
DE69517295T 1995-01-03 1995-12-15 Weicher Metallleiter und Herstellungsverfahren Expired - Lifetime DE69517295T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/367,565 US6285082B1 (en) 1995-01-03 1995-01-03 Soft metal conductor

Publications (2)

Publication Number Publication Date
DE69517295D1 DE69517295D1 (de) 2000-07-06
DE69517295T2 true DE69517295T2 (de) 2000-12-21

Family

ID=23447700

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69517295T Expired - Lifetime DE69517295T2 (de) 1995-01-03 1995-12-15 Weicher Metallleiter und Herstellungsverfahren

Country Status (6)

Country Link
US (4) US6285082B1 (de)
EP (1) EP0721216B1 (de)
JP (4) JPH08236481A (de)
KR (1) KR100239027B1 (de)
DE (1) DE69517295T2 (de)
TW (1) TW351833B (de)

Families Citing this family (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8352400B2 (en) 1991-12-23 2013-01-08 Hoffberg Steven M Adaptive pattern recognition based controller apparatus and method and human-factored interface therefore
EP0852809A4 (de) * 1995-09-29 1999-09-15 Intel Corp Metall-schicht-stapel mit zwei dünnen titan-lagen für integrierte schaltung und zugehörige kammerabscheidung
US6429120B1 (en) 2000-01-18 2002-08-06 Micron Technology, Inc. Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals
KR19980032463A (ko) * 1996-10-03 1998-07-25 윌리엄비.켐플러 개선된 전자이주 능력을 위한 비아(via) 패드와 캡
GB2347267B (en) * 1998-02-20 2001-05-02 Lg Lcd Inc A liquid crystal display
US6433428B1 (en) * 1998-05-29 2002-08-13 Kabushiki Kaisha Toshiba Semiconductor device with a dual damascene type via contact structure and method for the manufacture of same
JP2000216264A (ja) * 1999-01-22 2000-08-04 Mitsubishi Electric Corp Cmos論理回路素子、半導体装置とその製造方法およびその製造方法において用いる半導体回路設計方法
US7904187B2 (en) 1999-02-01 2011-03-08 Hoffberg Steven M Internet appliance system and method
US6352620B2 (en) 1999-06-28 2002-03-05 Applied Materials, Inc. Staged aluminum deposition process for filling vias
CA2377628A1 (en) * 1999-06-28 2001-01-04 Jurgen Ramm Component and method for the production thereof
US7071557B2 (en) * 1999-09-01 2006-07-04 Micron Technology, Inc. Metallization structures for semiconductor device interconnects, methods for making same, and semiconductor devices including same
US6440849B1 (en) 1999-10-18 2002-08-27 Agere Systems Guardian Corp. Microstructure control of copper interconnects
US6376370B1 (en) 2000-01-18 2002-04-23 Micron Technology, Inc. Process for providing seed layers for using aluminum, copper, gold and silver metallurgy process for providing seed layers for using aluminum, copper, gold and silver metallurgy
US6420262B1 (en) * 2000-01-18 2002-07-16 Micron Technology, Inc. Structures and methods to enhance copper metallization
US7262130B1 (en) * 2000-01-18 2007-08-28 Micron Technology, Inc. Methods for making integrated-circuit wiring from copper, silver, gold, and other metals
US7211512B1 (en) * 2000-01-18 2007-05-01 Micron Technology, Inc. Selective electroless-plated copper metallization
US6413863B1 (en) * 2000-01-24 2002-07-02 Taiwan Semiconductor Manufacturing Company Method to resolve the passivation surface roughness during formation of the AlCu pad for the copper process
US6613671B1 (en) 2000-03-03 2003-09-02 Micron Technology, Inc. Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby
WO2001084617A1 (en) * 2000-04-27 2001-11-08 Nu Tool Inc. Conductive structure for use in multi-level metallization and process
US6261963B1 (en) * 2000-07-07 2001-07-17 Advanced Micro Devices, Inc. Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices
US6703308B1 (en) 2001-11-26 2004-03-09 Advanced Micro Devices, Inc. Method of inserting alloy elements to reduce copper diffusion and bulk diffusion
US7696092B2 (en) * 2001-11-26 2010-04-13 Globalfoundries Inc. Method of using ternary copper alloy to obtain a low resistance and large grain size interconnect
US6835655B1 (en) 2001-11-26 2004-12-28 Advanced Micro Devices, Inc. Method of implanting copper barrier material to improve electrical performance
US6943105B2 (en) * 2002-01-18 2005-09-13 International Business Machines Corporation Soft metal conductor and method of making
US6861349B1 (en) 2002-05-15 2005-03-01 Advanced Micro Devices, Inc. Method of forming an adhesion layer with an element reactive with a barrier layer
US6727172B1 (en) 2002-06-12 2004-04-27 Taiwan Semiconductor Manufacturing Company Process to reduce chemical mechanical polishing damage of narrow copper lines
US6977437B2 (en) * 2003-03-11 2005-12-20 Texas Instruments Incorporated Method for forming a void free via
US6958540B2 (en) * 2003-06-23 2005-10-25 International Business Machines Corporation Dual damascene interconnect structures having different materials for line and via conductors
US6972252B1 (en) * 2003-08-25 2005-12-06 Novellus Systems, Inc. Method of improving adhesion between two dielectric films
US20050070097A1 (en) * 2003-09-29 2005-03-31 International Business Machines Corporation Atomic laminates for diffusion barrier applications
US7169706B2 (en) * 2003-10-16 2007-01-30 Advanced Micro Devices, Inc. Method of using an adhesion precursor layer for chemical vapor deposition (CVD) copper deposition
US7700477B2 (en) * 2004-02-24 2010-04-20 Panasonic Corporation Method for fabricating semiconductor device
DE102004021239B4 (de) * 2004-04-30 2017-04-06 Infineon Technologies Ag Lange getemperte integrierte Schaltungsanordnungen und deren Herstellungsverfahren
JP2006156716A (ja) * 2004-11-30 2006-06-15 Renesas Technology Corp 半導体装置およびその製造方法
US7253097B2 (en) * 2005-06-30 2007-08-07 Chartered Semiconductor Manufacturing, Ltd. Integrated circuit system using dual damascene process
WO2007020805A1 (en) * 2005-08-12 2007-02-22 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
US7187179B1 (en) 2005-10-19 2007-03-06 International Business Machines Corporation Wiring test structures for determining open and short circuits in semiconductor devices
JP5014632B2 (ja) * 2006-01-13 2012-08-29 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
US7510323B2 (en) * 2006-03-14 2009-03-31 International Business Machines Corporation Multi-layered thermal sensor for integrated circuits and other layered structures
JP4863746B2 (ja) * 2006-03-27 2012-01-25 富士通株式会社 半導体装置およびその製造方法
US7678717B2 (en) * 2006-05-10 2010-03-16 Precision Fabrics Group, Inc. Composite upholstery fabric panels with enlarged graphite intumescent particles
US7569475B2 (en) * 2006-11-15 2009-08-04 International Business Machines Corporation Interconnect structure having enhanced electromigration reliability and a method of fabricating same
JP5175476B2 (ja) * 2007-02-28 2013-04-03 三洋電機株式会社 回路装置の製造方法
TWI339444B (en) * 2007-05-30 2011-03-21 Au Optronics Corp Conductor structure, pixel structure, and methods of forming the same
JP2009000236A (ja) * 2007-06-20 2009-01-08 Olympus Medical Systems Corp 画像生成装置
US7732922B2 (en) * 2008-01-07 2010-06-08 International Business Machines Corporation Simultaneous grain modulation for BEOL applications
US8617982B2 (en) * 2010-10-05 2013-12-31 Novellus Systems, Inc. Subtractive patterning to define circuit components
CN103022000B (zh) * 2011-09-27 2015-04-29 中芯国际集成电路制造(上海)有限公司 平面电感器及其制造方法、半导体器件及其制造方法
JP2013077711A (ja) * 2011-09-30 2013-04-25 Sony Corp 半導体装置および半導体装置の製造方法
US8710660B2 (en) * 2012-07-20 2014-04-29 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid interconnect scheme including aluminum metal line in low-k dielectric
US8916448B2 (en) 2013-01-09 2014-12-23 International Business Machines Corporation Metal to metal bonding for stacked (3D) integrated circuits
CN104952786B (zh) * 2014-03-25 2018-07-10 中芯国际集成电路制造(上海)有限公司 电互连结构及其形成方法
US9899234B2 (en) 2014-06-30 2018-02-20 Lam Research Corporation Liner and barrier applications for subtractive metal integration
US10170425B2 (en) 2014-11-12 2019-01-01 International Business Machines Corporation Microstructure of metal interconnect layer
US10381263B1 (en) * 2018-05-04 2019-08-13 International Business Machines Corporation Method of forming via contact with resistance control
US10373866B1 (en) 2018-05-04 2019-08-06 International Business Machines Corporation Method of forming metal insulator metal capacitor with extended capacitor plates

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1257875B (de) * 1966-02-11 1968-01-04 Standard Elektrik Lorenz Ag Fernsprechnebenstellenanlage, insbesondere fuer Hotelbetrieb oder Krankenhaeuser, bei der im Besetztfall ein Wartevorgang einleitbar ist
US3790870A (en) * 1971-03-11 1974-02-05 R Mitchell Thin oxide force sensitive switches
US4990410A (en) 1988-05-13 1991-02-05 Toshiba Tungaloy Co., Ltd. Coated surface refined sintered alloy
JPH0287554A (ja) * 1988-09-22 1990-03-28 Nec Corp 半導体装置の多層配線
JPH02137230A (ja) * 1988-11-17 1990-05-25 Nec Corp 集積回路装置
US5071714A (en) * 1989-04-17 1991-12-10 International Business Machines Corporation Multilayered intermetallic connection for semiconductor devices
JPH02301143A (ja) * 1989-05-15 1990-12-13 Sharp Corp 配線層の形成方法
JP2839579B2 (ja) * 1989-10-02 1998-12-16 株式会社東芝 半導体装置及びその製造方法
US5143820A (en) 1989-10-31 1992-09-01 International Business Machines Corporation Method for fabricating high circuit density, self-aligned metal linens to contact windows
EP0528795A1 (de) 1990-04-30 1993-03-03 International Business Machines Corporation Vorrichtung für cvd von metallen bei niedrigen temperaturen
JP2730265B2 (ja) * 1990-05-14 1998-03-25 日本電気株式会社 半導体装置とその製造方法
JPH0472733A (ja) 1990-07-13 1992-03-06 Sharp Corp 半導体装置の製造方法
US5173442A (en) 1990-07-23 1992-12-22 Microelectronics And Computer Technology Corporation Methods of forming channels and vias in insulating layers
KR960001601B1 (ko) * 1992-01-23 1996-02-02 삼성전자주식회사 반도체 장치의 접촉구 매몰방법 및 구조
JP2626927B2 (ja) * 1990-10-17 1997-07-02 三菱電機株式会社 半導体装置
US5266446A (en) 1990-11-15 1993-11-30 International Business Machines Corporation Method of making a multilayer thin film structure
JPH04188624A (ja) * 1990-11-19 1992-07-07 Matsushita Electric Ind Co Ltd 半導体集積回路の配線形成方法
JPH04363024A (ja) * 1990-11-30 1992-12-15 Toshiba Corp 半導体装置の製造方法
US5345108A (en) * 1991-02-26 1994-09-06 Nec Corporation Semiconductor device having multi-layer electrode wiring
US5175125A (en) * 1991-04-03 1992-12-29 Chartered Semiconductor Manufacturing Ltd. Pte Method for making electrical contacts
KR960005248B1 (ko) * 1991-10-24 1996-04-23 마쯔시다덴기산교 가부시기가이샤 반도체기억장치 및 그 제조방법
US5262354A (en) * 1992-02-26 1993-11-16 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
US5300813A (en) 1992-02-26 1994-04-05 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
JPH0629405A (ja) 1992-07-10 1994-02-04 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5288665A (en) * 1992-08-12 1994-02-22 Applied Materials, Inc. Process for forming low resistance aluminum plug in via electrically connected to overlying patterned metal layer for integrated circuit structures
JPH06252272A (ja) * 1992-12-28 1994-09-09 Sony Corp 半導体装置及びその製造方法
US5358901A (en) * 1993-03-01 1994-10-25 Motorola, Inc. Process for forming an intermetallic layer
JP3672941B2 (ja) * 1993-03-24 2005-07-20 川崎マイクロエレクトロニクス株式会社 半導体集積回路の配線構造体
JPH06346240A (ja) * 1993-06-11 1994-12-20 Kawasaki Steel Corp 薄膜の形成方法
US5356836A (en) * 1993-08-19 1994-10-18 Industrial Technology Research Institute Aluminum plug process
US5442235A (en) * 1993-12-23 1995-08-15 Motorola Inc. Semiconductor device having an improved metal interconnect structure
US5672545A (en) * 1994-08-08 1997-09-30 Santa Barbara Research Center Thermally matched flip-chip detector assembly and method
US5565707A (en) * 1994-10-31 1996-10-15 International Business Machines Corporation Interconnect structure using a Al2 Cu for an integrated circuit chip
US5523259A (en) * 1994-12-05 1996-06-04 At&T Corp. Method of forming metal layers formed as a composite of sub-layers using Ti texture control layer

Also Published As

Publication number Publication date
EP0721216B1 (de) 2000-05-31
JP4215546B2 (ja) 2009-01-28
JP5132400B2 (ja) 2013-01-30
US6030895A (en) 2000-02-29
TW351833B (en) 1999-02-01
JP2006066930A (ja) 2006-03-09
DE69517295D1 (de) 2000-07-06
KR100239027B1 (ko) 2000-01-15
EP0721216A2 (de) 1996-07-10
JPH08236481A (ja) 1996-09-13
JP2008182269A (ja) 2008-08-07
US6285082B1 (en) 2001-09-04
US6335569B1 (en) 2002-01-01
KR960030335A (ko) 1996-08-17
JP4771526B2 (ja) 2011-09-14
US20020096768A1 (en) 2002-07-25
JP2004006768A (ja) 2004-01-08
EP0721216A3 (de) 1996-08-14

Similar Documents

Publication Publication Date Title
DE69517295T2 (de) Weicher Metallleiter und Herstellungsverfahren
DE69602874T2 (de) Wendelantenne und Herstellungsverfahren
DE69623475T2 (de) Schussfester gegenstand und herstellungsverfahren
DE69615437D1 (de) Integrierte Schaltungsanordnung und Herstellungsverfahren
DE69505429T2 (de) Isoliertes Gefäss und Herstellungsverfahren
DE69524215D1 (de) Retroreflektierender körper und herstellungsverfahren
DE69616057T2 (de) Umhülltes retroreflektierendes element und herstellungsverfahren
DE69718693D1 (de) Elektronisches Bauteil und Herstellungsverfahren
DE69634518D1 (de) Amorphe magnetische glas-überzogene drähte und zugehöriges herstellungsverfahren
DE69517843T2 (de) Weiche Süssware und Herstellungsverfahren
DE69929456D1 (de) Nahfeldabtastkopf und herstellungsverfahren
DE69435045D1 (de) Halbleiter-Anordnung und Herstellungsverfahren dafür
EP0771773A3 (de) Keramisches Bauteil vom Hülsentyp und Verfahren zur Herstellung desselben
DE69700563T2 (de) Steckerelement und Herstellungsverfahren dafür
DE69622143D1 (de) Schmelzofen und -verfahren
EP0860883A4 (de) Transistor und verfahren zur herstellung
KR970702759A (ko) 다이 피복 방법 및 장치(die coating method and apparatvs)
EP1063313A4 (de) Stahldraht und verfahren zu dessen herstellung
EP0758534A3 (de) Bürste und Verfahren zu ihrer Herstellung
DE69837307D1 (de) Verbinder und Herstellungsverfahren
DE19680329T1 (de) Elektronisches Klavier und Herstellungsverfahren dafür
NO982396D0 (no) Bakverk og framgangsmÕte for tilvirkning av dette
DE69615874T2 (de) Invarlegierungsdraht und Herstellungsverfahren
DE69611587T2 (de) Geformter ballistischer Gegenstand und Herstellungsverfahren dafür
DE69627206D1 (de) Düse und Düsenherstellungsverfahren

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8328 Change in the person/name/address of the agent

Representative=s name: DUSCHER, R., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 7