DE69509979D1 - BGA Gehäuse für integrierte Schaltungen und Verfahren zu ihrer Herstellung - Google Patents

BGA Gehäuse für integrierte Schaltungen und Verfahren zu ihrer Herstellung

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Publication number
DE69509979D1
DE69509979D1 DE69509979T DE69509979T DE69509979D1 DE 69509979 D1 DE69509979 D1 DE 69509979D1 DE 69509979 T DE69509979 T DE 69509979T DE 69509979 T DE69509979 T DE 69509979T DE 69509979 D1 DE69509979 D1 DE 69509979D1
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DE
Germany
Prior art keywords
manufacture
integrated circuits
bga package
bga
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69509979T
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English (en)
Other versions
DE69509979T2 (de
Inventor
Jean-Pierre Moscicki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
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Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of DE69509979D1 publication Critical patent/DE69509979D1/de
Application granted granted Critical
Publication of DE69509979T2 publication Critical patent/DE69509979T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
DE69509979T 1994-07-26 1995-07-25 BGA Gehäuse für integrierte Schaltungen und Verfahren zu ihrer Herstellung Expired - Fee Related DE69509979T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9409490A FR2723257B1 (fr) 1994-07-26 1994-07-26 Boitier bga de circuit integre

Publications (2)

Publication Number Publication Date
DE69509979D1 true DE69509979D1 (de) 1999-07-08
DE69509979T2 DE69509979T2 (de) 2000-01-27

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Country Link
US (1) US5736789A (de)
EP (1) EP0694965B1 (de)
DE (1) DE69509979T2 (de)
FR (1) FR2723257B1 (de)

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US6324069B1 (en) 1997-10-29 2001-11-27 Hestia Technologies, Inc. Chip package with molded underfill
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JP3610787B2 (ja) * 1998-03-24 2005-01-19 セイコーエプソン株式会社 半導体チップの実装構造体、液晶装置及び電子機器
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US20020030257A1 (en) * 1999-06-18 2002-03-14 Joseph M. Brand Semiconductor device utiling an encapsulant for locking a semiconductor die to circuit substrate
US7173336B2 (en) * 2000-01-31 2007-02-06 Sanyo Electric Co., Ltd. Hybrid integrated circuit device
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EP1365450A1 (de) * 2002-05-24 2003-11-26 Ultratera Corporation Verbessertes drahtgebundenes Chip-on-board-Gehäuse
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Also Published As

Publication number Publication date
US5736789A (en) 1998-04-07
FR2723257B1 (fr) 1997-01-24
DE69509979T2 (de) 2000-01-27
EP0694965A1 (de) 1996-01-31
EP0694965B1 (de) 1999-06-02
FR2723257A1 (fr) 1996-02-02

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