FR2684802B1 - Procede de moulage de micromodules de circuits integres. - Google Patents

Procede de moulage de micromodules de circuits integres.

Info

Publication number
FR2684802B1
FR2684802B1 FR9115016A FR9115016A FR2684802B1 FR 2684802 B1 FR2684802 B1 FR 2684802B1 FR 9115016 A FR9115016 A FR 9115016A FR 9115016 A FR9115016 A FR 9115016A FR 2684802 B1 FR2684802 B1 FR 2684802B1
Authority
FR
France
Prior art keywords
micromodules
molding
integrated circuits
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9115016A
Other languages
English (en)
Other versions
FR2684802A1 (fr
Inventor
Gerard Coiton
Pierre Merlin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card International SA filed Critical Gemplus Card International SA
Priority to FR9115016A priority Critical patent/FR2684802B1/fr
Publication of FR2684802A1 publication Critical patent/FR2684802A1/fr
Application granted granted Critical
Publication of FR2684802B1 publication Critical patent/FR2684802B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
FR9115016A 1991-12-04 1991-12-04 Procede de moulage de micromodules de circuits integres. Expired - Fee Related FR2684802B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9115016A FR2684802B1 (fr) 1991-12-04 1991-12-04 Procede de moulage de micromodules de circuits integres.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9115016A FR2684802B1 (fr) 1991-12-04 1991-12-04 Procede de moulage de micromodules de circuits integres.

Publications (2)

Publication Number Publication Date
FR2684802A1 FR2684802A1 (fr) 1993-06-11
FR2684802B1 true FR2684802B1 (fr) 2001-06-08

Family

ID=9419657

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9115016A Expired - Fee Related FR2684802B1 (fr) 1991-12-04 1991-12-04 Procede de moulage de micromodules de circuits integres.

Country Status (1)

Country Link
FR (1) FR2684802B1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4333415C2 (de) * 1993-09-30 1999-03-04 Siemens Ag Vorrichtung zum Umhüllen eines Halbleiterbauelements und einer damit verbundenen Wärmesenke mit Kunststoffen
FR2723257B1 (fr) * 1994-07-26 1997-01-24 Sgs Thomson Microelectronics Boitier bga de circuit integre
FR2741191B1 (fr) * 1995-11-14 1998-01-09 Sgs Thomson Microelectronics Procede de fabrication d'un micromodule, notamment pour cartes a puces
WO1998035382A1 (fr) * 1997-02-10 1998-08-13 Matsushita Electronics Corporation Dispositif a semiconducteur scelle par resine et procede de fabrication

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02209739A (ja) * 1989-02-09 1990-08-21 Mitsui Petrochem Ind Ltd 半導体装置の製造方法
JPH03133146A (ja) * 1989-10-19 1991-06-06 Matsushita Electric Ind Co Ltd 集積回路装置の製造方法

Also Published As

Publication number Publication date
FR2684802A1 (fr) 1993-06-11

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090831