DE69429970T2 - Transistorschaltung - Google Patents

Transistorschaltung

Info

Publication number
DE69429970T2
DE69429970T2 DE69429970T DE69429970T DE69429970T2 DE 69429970 T2 DE69429970 T2 DE 69429970T2 DE 69429970 T DE69429970 T DE 69429970T DE 69429970 T DE69429970 T DE 69429970T DE 69429970 T2 DE69429970 T2 DE 69429970T2
Authority
DE
Germany
Prior art keywords
transistor circuit
transistor
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69429970T
Other languages
English (en)
Other versions
DE69429970D1 (de
Inventor
Hiroshi Shigehara
Masanori Kinugasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69429970D1 publication Critical patent/DE69429970D1/de
Publication of DE69429970T2 publication Critical patent/DE69429970T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
DE69429970T 1993-12-02 1994-12-01 Transistorschaltung Expired - Lifetime DE69429970T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30281693A JP3160449B2 (ja) 1993-12-02 1993-12-02 トランジスタ回路

Publications (2)

Publication Number Publication Date
DE69429970D1 DE69429970D1 (de) 2002-04-04
DE69429970T2 true DE69429970T2 (de) 2002-10-10

Family

ID=17913447

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69429970T Expired - Lifetime DE69429970T2 (de) 1993-12-02 1994-12-01 Transistorschaltung

Country Status (5)

Country Link
US (1) US5493233A (de)
EP (1) EP0656689B1 (de)
JP (1) JP3160449B2 (de)
KR (1) KR0166107B1 (de)
DE (1) DE69429970T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0865135A (ja) * 1994-08-17 1996-03-08 Fujitsu Ltd 出力バッファ回路
US5534789A (en) * 1995-08-07 1996-07-09 Etron Technology, Inc. Mixed mode output buffer circuit for CMOSIC
US5726589A (en) * 1995-11-01 1998-03-10 International Business Machines Corporation Off-chip driver circuit with reduced hot-electron degradation
US5635860A (en) * 1995-12-28 1997-06-03 Lucent Technologies Inc. Overvoltage-tolerant self-biasing CMOS output buffer
US5952851A (en) * 1997-09-16 1999-09-14 Programmable Microelectronics Corporation Boosted voltage driver

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5891680A (ja) * 1981-11-26 1983-05-31 Fujitsu Ltd 半導体装置
IT1225607B (it) * 1988-07-06 1990-11-22 Sgs Thomson Microelectronics Circuito logico cmos per alta tensione
US4963766A (en) * 1989-06-28 1990-10-16 Digital Equipment Corporation Low-voltage CMOS output buffer
JP3321188B2 (ja) * 1991-07-26 2002-09-03 株式会社東芝 出力回路
US5191244A (en) * 1991-09-16 1993-03-02 Advanced Micro Devices, Inc. N-channel pull-up transistor with reduced body effect
JPH05167427A (ja) * 1991-12-13 1993-07-02 Toshiba Corp レベルシフト回路
EP0587931B1 (de) * 1992-09-16 1996-06-26 Siemens Aktiengesellschaft CMOS-Pufferschaltung
US5338978A (en) * 1993-02-10 1994-08-16 National Semiconductor Corporation Full swing power down buffer circuit with multiple power supply isolation
US5381061A (en) * 1993-03-02 1995-01-10 National Semiconductor Corporation Overvoltage tolerant output buffer circuit
US5396128A (en) * 1993-09-13 1995-03-07 Motorola, Inc. Output circuit for interfacing integrated circuits having different power supply potentials

Also Published As

Publication number Publication date
EP0656689A3 (de) 1996-03-13
DE69429970D1 (de) 2002-04-04
EP0656689B1 (de) 2002-02-27
KR0166107B1 (ko) 1999-03-20
JPH07161927A (ja) 1995-06-23
JP3160449B2 (ja) 2001-04-25
KR950022128A (ko) 1995-07-26
EP0656689A2 (de) 1995-06-07
US5493233A (en) 1996-02-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition