DE69501243D1 - Elektronische und/oder magnetische Vorrichtung - Google Patents

Elektronische und/oder magnetische Vorrichtung

Info

Publication number
DE69501243D1
DE69501243D1 DE69501243T DE69501243T DE69501243D1 DE 69501243 D1 DE69501243 D1 DE 69501243D1 DE 69501243 T DE69501243 T DE 69501243T DE 69501243 T DE69501243 T DE 69501243T DE 69501243 D1 DE69501243 D1 DE 69501243D1
Authority
DE
Germany
Prior art keywords
electronic
magnetic device
magnetic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69501243T
Other languages
English (en)
Other versions
DE69501243T2 (de
Inventor
Toshiro Sato
Tetsuhiko Mizoguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69501243D1 publication Critical patent/DE69501243D1/de
Application granted granted Critical
Publication of DE69501243T2 publication Critical patent/DE69501243T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/127Structure or manufacture of heads, e.g. inductive
    • G11B5/31Structure or manufacture of heads, e.g. inductive using thin films
    • G11B5/3109Details
    • G11B5/313Disposition of layers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/127Structure or manufacture of heads, e.g. inductive
    • G11B5/31Structure or manufacture of heads, e.g. inductive using thin films
    • G11B5/3163Fabrication methods or processes specially adapted for a particular head structure, e.g. using base layers for electroplating, using functional layers for masking, using energy or particle beams for shaping the structure or modifying the properties of the basic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0033Printed inductances with the coil helically wound around a magnetic core
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F2017/004Printed inductances with the coil helically wound around an axis without a core
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/036Manufacturing methods by patterning a pre-deposited material
    • H01L2224/0361Physical or chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/036Manufacturing methods by patterning a pre-deposited material
    • H01L2224/03622Manufacturing methods by patterning a pre-deposited material using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/098Special shape of the cross-section of conductors, e.g. very thick plated conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/0542Continuous temporary metal layer over metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/064Photoresists
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
DE69501243T 1994-09-16 1995-09-15 Elektronische und/oder magnetische Vorrichtung Expired - Fee Related DE69501243T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22144494 1994-09-16

Publications (2)

Publication Number Publication Date
DE69501243D1 true DE69501243D1 (de) 1998-01-29
DE69501243T2 DE69501243T2 (de) 1998-05-20

Family

ID=16766837

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69501243T Expired - Fee Related DE69501243T2 (de) 1994-09-16 1995-09-15 Elektronische und/oder magnetische Vorrichtung

Country Status (3)

Country Link
US (1) US5738931A (de)
EP (1) EP0702379B1 (de)
DE (1) DE69501243T2 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000174206A (ja) * 1998-12-10 2000-06-23 Sony Corp 半導体装置およびその製造方法
TW444252B (en) * 1999-03-19 2001-07-01 Toshiba Corp Semiconductor apparatus and its fabricating method
JP2000322709A (ja) * 1999-05-13 2000-11-24 Alps Electric Co Ltd 薄膜素子およびその製造方法
JP3363832B2 (ja) * 1999-05-13 2003-01-08 アルプス電気株式会社 薄膜構造体およびその製造方法
US6369983B1 (en) * 1999-08-13 2002-04-09 Read-Rite Corporation Write head having a dry-etchable antireflective intermediate layer
JP2001244123A (ja) 2000-02-28 2001-09-07 Kawatetsu Mining Co Ltd 表面実装型平面磁気素子及びその製造方法
JP3320397B2 (ja) * 2000-03-09 2002-09-03 クラリアント ジャパン 株式会社 逆テーパー状レジストパターンの形成方法
US6653573B2 (en) * 2000-04-04 2003-11-25 Nec Tokin Corporation Wiring board comprising granular magnetic film
JP2001307313A (ja) * 2000-04-20 2001-11-02 Fujitsu Ltd 薄膜ヘッドの製造方法
TWI312166B (en) * 2001-09-28 2009-07-11 Toppan Printing Co Ltd Multi-layer circuit board, integrated circuit package, and manufacturing method for multi-layer circuit board
JP3775499B2 (ja) * 2002-01-08 2006-05-17 株式会社リコー 半導体装置及びその製造方法、並びにdc−dcコンバータ
JP3745316B2 (ja) 2002-06-24 2006-02-15 Necエレクトロニクス株式会社 半導体集積回路及びその製造方法
JP2005261987A (ja) * 2002-09-06 2005-09-29 Joiaasu Kk 活性化装置
US7358195B2 (en) * 2003-04-01 2008-04-15 Lg.Philips Lcd Co., Ltd. Method for fabricating liquid crystal display device
JP4268434B2 (ja) * 2003-04-09 2009-05-27 大日本印刷株式会社 配線基板の製造方法
JP2005191408A (ja) * 2003-12-26 2005-07-14 Matsushita Electric Ind Co Ltd コイル導電体とその製造方法およびこれを用いた電子部品
JP2006154569A (ja) * 2004-11-30 2006-06-15 Tokyo Ohka Kogyo Co Ltd レジストパターンおよび導体パターンの製造方法
PE20061324A1 (es) 2005-04-29 2007-01-15 Centocor Inc Anticuerpos anti-il-6, composiciones, metodos y usos
TWI277373B (en) * 2005-09-16 2007-03-21 Foxconn Advanced Tech Inc Method of continuous producing flexible printed circuit board
JP4775978B2 (ja) * 2007-10-30 2011-09-21 太陽誘電株式会社 弾性波素子、デュープレクサ、通信モジュール、および通信装置
US8188235B2 (en) 2008-06-18 2012-05-29 Pfizer Inc. Antibodies to IL-6 and their uses
US8445375B2 (en) * 2009-09-29 2013-05-21 Semiconductor Components Industries, Llc Method for manufacturing a semiconductor component
TWM397591U (en) * 2010-04-22 2011-02-01 Mao Bang Electronic Co Ltd Bumping structure
US9425146B2 (en) * 2010-09-28 2016-08-23 Infineon Technologies Ag Semiconductor structure and method for making same
US20130241058A1 (en) * 2012-03-16 2013-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Wire Bonding Structures for Integrated Circuits
WO2015125460A1 (en) * 2014-02-18 2015-08-27 Skyworks Panasonic Filter Solutions Japan Co., Ltd. Acoustic wave elements and ladder filters using same
CN205726641U (zh) * 2016-01-04 2016-11-23 奥特斯(中国)有限公司 具有不同面层的部件载体及含有该部件载体的电子设备
DE102016216308B4 (de) 2016-08-30 2022-06-15 Schweizer Electronic Ag Leiterplatte und Verfahren zu deren Herstellung
US10998463B2 (en) 2016-11-15 2021-05-04 Shin-Etsu Chemical Co., Ltd. High efficiency solar cell and method for manufacturing high efficiency solar cell
US11395405B2 (en) * 2018-08-28 2022-07-19 Kyocera Corporation Wiring substrate and electronic device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2040180B2 (de) * 1970-01-22 1977-08-25 Intel Corp, Mountain View, Calif. (V.St.A.) Verfahren zur verhinderung von mechanischen bruechen einer duennen, die oberflaeche eines halbleiterkoerpers ueberdeckende isolierschichten ueberziehenden elektrisch leitenden schicht
US3862017A (en) * 1970-02-04 1975-01-21 Hideo Tsunemitsu Method for producing a thin film passive circuit element
GB1527894A (en) * 1975-10-15 1978-10-11 Mullard Ltd Methods of manufacturing electronic devices
JPS59126665A (ja) * 1983-01-10 1984-07-21 Hitachi Ltd 厚膜混成集積回路
JPS60128641A (ja) * 1983-12-16 1985-07-09 Hitachi Ltd 多層配線
JPS6320079A (ja) * 1986-07-11 1988-01-27 ヤンマー農機株式会社 穀粒などの粒状体の感知センサ−装置
JPH01277311A (ja) * 1988-04-28 1989-11-07 Hitachi Ltd 薄膜磁気ヘッド

Also Published As

Publication number Publication date
US5738931A (en) 1998-04-14
DE69501243T2 (de) 1998-05-20
EP0702379B1 (de) 1997-12-17
EP0702379A1 (de) 1996-03-20

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee