DE69421156D1 - Steuerverfahren für eine Halbleiterspeicherschaltung - Google Patents
Steuerverfahren für eine HalbleiterspeicherschaltungInfo
- Publication number
- DE69421156D1 DE69421156D1 DE69421156T DE69421156T DE69421156D1 DE 69421156 D1 DE69421156 D1 DE 69421156D1 DE 69421156 T DE69421156 T DE 69421156T DE 69421156 T DE69421156 T DE 69421156T DE 69421156 D1 DE69421156 D1 DE 69421156D1
- Authority
- DE
- Germany
- Prior art keywords
- control method
- semiconductor memory
- memory circuit
- circuit
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2218—Late write
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5327063A JP2734957B2 (ja) | 1993-12-24 | 1993-12-24 | 半導体記憶回路の制御方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69421156D1 true DE69421156D1 (de) | 1999-11-18 |
DE69421156T2 DE69421156T2 (de) | 2000-08-17 |
Family
ID=18194890
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69421156T Expired - Lifetime DE69421156T2 (de) | 1993-12-24 | 1994-12-23 | Steuerverfahren für eine Halbleiterspeicherschaltung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5539693A (de) |
EP (1) | EP0660328B1 (de) |
JP (1) | JP2734957B2 (de) |
KR (1) | KR0147011B1 (de) |
DE (1) | DE69421156T2 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3183321B2 (ja) * | 1995-11-10 | 2001-07-09 | 日本電気株式会社 | 半導体記憶装置 |
US5715476A (en) * | 1995-12-29 | 1998-02-03 | Intel Corporation | Method and apparatus for controlling linear and toggle mode burst access sequences using toggle mode increment logic |
JP3277112B2 (ja) * | 1996-01-31 | 2002-04-22 | 株式会社東芝 | 半導体記憶装置 |
US5666324A (en) * | 1996-03-15 | 1997-09-09 | Mitsubishi Denki Kabushiki Kaisha | Clock synchronous semiconductor memory device having current consumption reduced |
JPH09312553A (ja) * | 1996-05-22 | 1997-12-02 | Nec Corp | 論理回路 |
JPH1055674A (ja) * | 1996-08-09 | 1998-02-24 | Nec Corp | 半導体記憶装置 |
US5745427A (en) * | 1996-12-27 | 1998-04-28 | Lucent Technologies Inc. | Phase-shifted embedded ram apparatus and method |
KR100270959B1 (ko) * | 1998-07-07 | 2000-11-01 | 윤종용 | 반도체 메모리 장치 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6421786A (en) * | 1987-07-15 | 1989-01-25 | Nec Corp | Semiconductor memory |
JP3179788B2 (ja) * | 1991-01-17 | 2001-06-25 | 三菱電機株式会社 | 半導体記憶装置 |
JPH04295693A (ja) * | 1991-03-20 | 1992-10-20 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP3992757B2 (ja) * | 1991-04-23 | 2007-10-17 | テキサス インスツルメンツ インコーポレイテツド | マイクロプロセッサと同期するメモリ、及びデータプロセッサ、同期メモリ、周辺装置とシステムクロックを含むシステム |
JP2830594B2 (ja) * | 1992-03-26 | 1998-12-02 | 日本電気株式会社 | 半導体メモリ装置 |
JPH06290582A (ja) * | 1993-04-02 | 1994-10-18 | Nec Corp | 半導体記憶装置 |
-
1993
- 1993-12-24 JP JP5327063A patent/JP2734957B2/ja not_active Expired - Lifetime
-
1994
- 1994-12-22 US US08/362,157 patent/US5539693A/en not_active Expired - Lifetime
- 1994-12-23 EP EP94120546A patent/EP0660328B1/de not_active Expired - Lifetime
- 1994-12-23 KR KR1019940036950A patent/KR0147011B1/ko not_active IP Right Cessation
- 1994-12-23 DE DE69421156T patent/DE69421156T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH07182854A (ja) | 1995-07-21 |
EP0660328B1 (de) | 1999-10-13 |
EP0660328A3 (de) | 1996-06-26 |
KR0147011B1 (ko) | 1998-09-15 |
DE69421156T2 (de) | 2000-08-17 |
US5539693A (en) | 1996-07-23 |
JP2734957B2 (ja) | 1998-04-02 |
KR950020127A (ko) | 1995-07-24 |
EP0660328A2 (de) | 1995-06-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC CORP., TOKIO/TOKYO, JP Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
R082 | Change of representative |
Ref document number: 660328 Country of ref document: EP Representative=s name: BETTEN & RESCH, DE |
|
R081 | Change of applicant/patentee |
Ref document number: 660328 Country of ref document: EP Owner name: RENESAS ELECTRONICS CORPORATION, JP Free format text: FORMER OWNER: NEC ELECTRONICS CORP., KAWASAKI, JP Effective date: 20120828 |
|
R082 | Change of representative |
Ref document number: 660328 Country of ref document: EP Representative=s name: PATENTANWAELTE BETTEN & RESCH, DE Effective date: 20120828 |