DE69326284T2 - Halbleiteranordnung mit anschlusswählender Schaltung - Google Patents

Halbleiteranordnung mit anschlusswählender Schaltung

Info

Publication number
DE69326284T2
DE69326284T2 DE69326284T DE69326284T DE69326284T2 DE 69326284 T2 DE69326284 T2 DE 69326284T2 DE 69326284 T DE69326284 T DE 69326284T DE 69326284 T DE69326284 T DE 69326284T DE 69326284 T2 DE69326284 T2 DE 69326284T2
Authority
DE
Germany
Prior art keywords
connection
selecting circuit
semiconductor arrangement
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69326284T
Other languages
English (en)
Other versions
DE69326284D1 (de
Inventor
Kazuo Okunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Memory Japan Ltd
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69326284D1 publication Critical patent/DE69326284D1/de
Publication of DE69326284T2 publication Critical patent/DE69326284T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69326284T 1992-06-10 1993-06-08 Halbleiteranordnung mit anschlusswählender Schaltung Expired - Lifetime DE69326284T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15017792 1992-06-10

Publications (2)

Publication Number Publication Date
DE69326284D1 DE69326284D1 (de) 1999-10-14
DE69326284T2 true DE69326284T2 (de) 2000-03-23

Family

ID=15491191

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69326284T Expired - Lifetime DE69326284T2 (de) 1992-06-10 1993-06-08 Halbleiteranordnung mit anschlusswählender Schaltung

Country Status (4)

Country Link
US (1) US5412333A (de)
EP (1) EP0573965B1 (de)
KR (1) KR970006975B1 (de)
DE (1) DE69326284T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5552725A (en) * 1994-08-05 1996-09-03 Advanced Micro Devices, Inc. Low power, slew rate insensitive power-on reset circuit
JP2643872B2 (ja) * 1994-11-29 1997-08-20 日本電気株式会社 ボンディング・オプション回路
JP2877039B2 (ja) * 1995-08-16 1999-03-31 日本電気株式会社 半導体集積回路
EP0787993A4 (de) * 1995-08-21 1999-09-15 Matsushita Electronics Corp Spannungsdetektor , strom-ein-/aus-rücksetzschaltung und halbleitergerät
JP3415347B2 (ja) * 1995-10-25 2003-06-09 Ｎｅｃエレクトロニクス株式会社 マイクロコンピュータの動作モード設定用入力回路
FR2744303B1 (fr) * 1996-01-31 1998-03-27 Sgs Thomson Microelectronics Dispositif pour neutraliser un circuit electronique lors de sa mise sous tension ou sa mise hors tension
US5805014A (en) * 1996-03-01 1998-09-08 Compaq Computer Corporation System having active pull-down circuit and method
US5880596A (en) * 1996-11-05 1999-03-09 Altera Corporation Apparatus and method for configuring integrated circuit option bits with different bonding patterns
US5920227A (en) * 1997-06-16 1999-07-06 Advanced Micro Devices, Inc. Zero current draw circuit for use during a bonding option
TW417267B (en) * 1997-11-20 2001-01-01 Davicom Semiconductor Inc Structure of bonding option
JP2000100814A (ja) 1998-09-18 2000-04-07 Hitachi Ltd 半導体装置
JP3423904B2 (ja) * 1999-10-06 2003-07-07 沖電気工業株式会社 半導体集積回路
DE60130936T2 (de) 2000-03-08 2008-07-24 Matsushita Electric Industrial Co., Ltd., Kadoma Integrierte Halbleiterschaltung
KR100349344B1 (ko) * 2000-06-14 2002-08-21 주식회사 하이닉스반도체 멀티 레벨 본딩 옵션 회로
DE10102000B4 (de) * 2001-01-18 2004-04-08 Infineon Technologies Ag Integrierte Schaltung mit Erkennungsschaltung und Verfahren zum Überprüfen einer Anschlusssituation eines Bondpads
KR100426989B1 (ko) * 2001-06-13 2004-04-13 삼성전자주식회사 패키지 전원핀을 이용한 제어신호 인가방법 및 그에 따른집적회로 패키지 구조
US7131033B1 (en) 2002-06-21 2006-10-31 Cypress Semiconductor Corp. Substrate configurable JTAG ID scheme
US7818640B1 (en) 2004-10-22 2010-10-19 Cypress Semiconductor Corporation Test system having a master/slave JTAG controller
JP2009054869A (ja) * 2007-08-28 2009-03-12 Toshiba Corp 半導体デバイス、情報処理装置および電源電圧変動抑制方法
DE202012004532U1 (de) 2012-03-08 2013-06-10 Rohde & Schwarz Gmbh & Co. Kg Halbleiterschaltung mit elektrischen Anschlüssen mit mehrfacher Signal- oder Potentialbelegung
US11994888B2 (en) 2022-07-18 2024-05-28 Nxp Usa, Inc. Power supply handling for multiple package configurations

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01280923A (ja) * 1988-05-07 1989-11-13 Mitsubishi Electric Corp 半導体集積回路装置
JPH0821846B2 (ja) * 1989-02-03 1996-03-04 日本電気株式会社 ワイアード信号ドライブ回路

Also Published As

Publication number Publication date
US5412333A (en) 1995-05-02
EP0573965B1 (de) 1999-09-08
DE69326284D1 (de) 1999-10-14
KR940006274A (ko) 1994-03-23
KR970006975B1 (ko) 1997-05-01
EP0573965A3 (de) 1995-06-21
EP0573965A2 (de) 1993-12-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC CORP., TOKIO/TOKYO, JP

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8327 Change in the person/name/address of the patent owner

Owner name: ELPIDA MEMORY, INC., TOKYO, JP