DE69320498T2 - Verfahren zur Herstellung von Dünnfilm-Leiterplatten - Google Patents

Verfahren zur Herstellung von Dünnfilm-Leiterplatten

Info

Publication number
DE69320498T2
DE69320498T2 DE1993620498 DE69320498T DE69320498T2 DE 69320498 T2 DE69320498 T2 DE 69320498T2 DE 1993620498 DE1993620498 DE 1993620498 DE 69320498 T DE69320498 T DE 69320498T DE 69320498 T2 DE69320498 T2 DE 69320498T2
Authority
DE
Germany
Prior art keywords
production
thin film
printed circuit
circuit boards
film printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE1993620498
Other languages
English (en)
Other versions
DE69320498D1 (de
Inventor
Yoshiaki Okabe
Rie Tawata
Koji Fujisaki
Takayoshi Ikeda
Takao Miwa
Junichi Katagiri
Akio Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE69320498D1 publication Critical patent/DE69320498D1/de
Publication of DE69320498T2 publication Critical patent/DE69320498T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0759—Forming a polymer layer by liquid coating, e.g. a non-metallic protective coating or an organic bonding layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Manufacture Of Macromolecular Shaped Articles (AREA)
DE1993620498 1992-01-22 1993-01-22 Verfahren zur Herstellung von Dünnfilm-Leiterplatten Expired - Fee Related DE69320498T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP904992 1992-01-22

Publications (2)

Publication Number Publication Date
DE69320498D1 DE69320498D1 (de) 1998-10-01
DE69320498T2 true DE69320498T2 (de) 1999-05-06

Family

ID=11709787

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1993620498 Expired - Fee Related DE69320498T2 (de) 1992-01-22 1993-01-22 Verfahren zur Herstellung von Dünnfilm-Leiterplatten

Country Status (3)

Country Link
EP (1) EP0552984B1 (de)
JP (1) JPH05275568A (de)
DE (1) DE69320498T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0646954A3 (de) * 1993-09-29 1997-08-27 Fujitsu Ltd Ätzverfahren in einer Stufe mit geringen Fehlstellen.
EP0778857B1 (de) * 1994-09-02 2004-07-21 Henkel Corporation Wärmehärtbare harze aus maleinimiden und/oder vinylderivaten
JPH0913001A (ja) * 1995-06-27 1997-01-14 Tomoegawa Paper Co Ltd 電子部品用液状接着剤および電子部品用接着テープ
EP0831528A3 (de) * 1996-09-10 1999-12-22 Hitachi Chemical Company, Ltd. Mehrschicht-Leiterplatte zum Montieren einer Halbleiteranordnung und Herstellungsverfahren dafür
KR100298897B1 (ko) * 1998-12-23 2001-09-22 이형도 인쇄회로기판제조방법
JP4947894B2 (ja) * 2004-12-08 2012-06-06 旭化成イーマテリアルズ株式会社 半導体チップ用接着材組成物
US7691475B2 (en) 2006-07-21 2010-04-06 3M Innovative Properties Company Anisotropic conductive adhesives
KR20100075906A (ko) 2007-09-13 2010-07-05 쓰리엠 이노베이티브 프로퍼티즈 컴파니 저온 접합 전자부품용 접착

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62235383A (ja) * 1986-04-03 1987-10-15 Hitachi Chem Co Ltd 熱硬化性接着フイルム
US5120573A (en) * 1988-09-28 1992-06-09 Hitachi, Ltd. Process for producing metal/polyimide composite article
US5089346A (en) * 1989-03-23 1992-02-18 Hitachi Chemical Company, Ltd. Heat resistant adhesive composition and bonding method using the same
JPH0671138B2 (ja) * 1989-03-24 1994-09-07 日立化成工業株式会社 印刷配線板用基板の製造法
US4933045A (en) * 1989-06-02 1990-06-12 International Business Machines Corporation Thin film multilayer laminate interconnection board assembly method

Also Published As

Publication number Publication date
EP0552984A2 (de) 1993-07-28
DE69320498D1 (de) 1998-10-01
JPH05275568A (ja) 1993-10-22
EP0552984A3 (de) 1994-01-19
EP0552984B1 (de) 1998-08-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee