DE69319755T2 - Halbleiterspeicher mit verbesserter redundanter Lesespeicher-Steuerung - Google Patents

Halbleiterspeicher mit verbesserter redundanter Lesespeicher-Steuerung

Info

Publication number
DE69319755T2
DE69319755T2 DE69319755T DE69319755T DE69319755T2 DE 69319755 T2 DE69319755 T2 DE 69319755T2 DE 69319755 T DE69319755 T DE 69319755T DE 69319755 T DE69319755 T DE 69319755T DE 69319755 T2 DE69319755 T2 DE 69319755T2
Authority
DE
Germany
Prior art keywords
redundant
column
address
sense
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69319755T
Other languages
English (en)
Other versions
DE69319755D1 (de
Inventor
David Charles Mcclure
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Publication of DE69319755D1 publication Critical patent/DE69319755D1/de
Application granted granted Critical
Publication of DE69319755T2 publication Critical patent/DE69319755T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE69319755T 1992-01-31 1993-01-27 Halbleiterspeicher mit verbesserter redundanter Lesespeicher-Steuerung Expired - Fee Related DE69319755T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/830,237 US5295102A (en) 1992-01-31 1992-01-31 Semiconductor memory with improved redundant sense amplifier control

Publications (2)

Publication Number Publication Date
DE69319755D1 DE69319755D1 (de) 1998-08-27
DE69319755T2 true DE69319755T2 (de) 1999-02-04

Family

ID=25256599

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69319755T Expired - Fee Related DE69319755T2 (de) 1992-01-31 1993-01-27 Halbleiterspeicher mit verbesserter redundanter Lesespeicher-Steuerung

Country Status (4)

Country Link
US (2) US5295102A (de)
EP (1) EP0554055B1 (de)
JP (1) JP3773961B2 (de)
DE (1) DE69319755T2 (de)

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US5295102A (en) * 1992-01-31 1994-03-15 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with improved redundant sense amplifier control
JP3199882B2 (ja) 1993-01-13 2001-08-20 株式会社東芝 不揮発性半導体記憶装置
JP2839819B2 (ja) * 1993-05-28 1998-12-16 株式会社東芝 不揮発性半導体記憶装置
JP3204848B2 (ja) * 1994-08-09 2001-09-04 株式会社東芝 レベル変換回路及びこのレベル変換回路を用いてレベル変換されたデータを出力する方法
US5528539A (en) * 1994-09-29 1996-06-18 Micron Semiconductor, Inc. High speed global row redundancy system
JP3263259B2 (ja) * 1994-10-04 2002-03-04 株式会社東芝 半導体記憶装置
JP3181479B2 (ja) * 1994-12-15 2001-07-03 沖電気工業株式会社 半導体記憶装置
US6026368A (en) * 1995-07-17 2000-02-15 24/7 Media, Inc. On-line interactive system and method for providing content and advertising information to a targeted set of viewers
US5764574A (en) * 1996-06-20 1998-06-09 Nevill; Leland R. Method and apparatus for back-end repair of multi-chip modules
US6240535B1 (en) * 1995-12-22 2001-05-29 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US5771195A (en) * 1995-12-29 1998-06-23 Sgs-Thomson Microelectronics, Inc. Circuit and method for replacing a defective memory cell with a redundant memory cell
US5790462A (en) * 1995-12-29 1998-08-04 Sgs-Thomson Microelectronics, Inc. Redundancy control
US5612918A (en) * 1995-12-29 1997-03-18 Sgs-Thomson Microelectronics, Inc. Redundancy architecture
US6037799A (en) * 1995-12-29 2000-03-14 Stmicroelectronics, Inc. Circuit and method for selecting a signal
US5841709A (en) * 1995-12-29 1998-11-24 Stmicroelectronics, Inc. Memory having and method for testing redundant memory cells
US5619466A (en) * 1996-01-19 1997-04-08 Sgs-Thomson Microelectronics, Inc. Low-power read circuit and method for controlling a sense amplifier
US5883838A (en) * 1996-01-19 1999-03-16 Stmicroelectronics, Inc. Device and method for driving a conductive path with a signal
US5845059A (en) * 1996-01-19 1998-12-01 Stmicroelectronics, Inc. Data-input device for generating test signals on bit and bit-complement lines
US5691950A (en) * 1996-01-19 1997-11-25 Sgs-Thomson Microelectronics, Inc. Device and method for isolating bit lines from a data line
US5802004A (en) * 1996-01-19 1998-09-01 Sgs-Thomson Microelectronics, Inc. Clocked sense amplifier with wordline tracking
US5848018A (en) * 1996-01-19 1998-12-08 Stmicroelectronics, Inc. Memory-row selector having a test function
US5745432A (en) * 1996-01-19 1998-04-28 Sgs-Thomson Microelectronics, Inc. Write driver having a test function
US5781486A (en) * 1996-04-16 1998-07-14 Micron Technology Corporation Apparatus for testing redundant elements in a packaged semiconductor memory device
US5706292A (en) 1996-04-25 1998-01-06 Micron Technology, Inc. Layout for a semiconductor memory device having redundant elements
US5734617A (en) * 1996-08-01 1998-03-31 Micron Technology Corporation Shared pull-up and selection circuitry for programmable cells such as antifuse cells
US5793683A (en) * 1997-01-17 1998-08-11 International Business Machines Corporation Wordline and bitline redundancy with no performance penalty
US6104209A (en) 1998-08-27 2000-08-15 Micron Technology, Inc. Low skew differential receiver with disable feature
US5909049A (en) 1997-02-11 1999-06-01 Actel Corporation Antifuse programmed PROM cell
US5959910A (en) * 1997-04-25 1999-09-28 Stmicroelectronics, Inc. Sense amplifier control of a memory device
US5883844A (en) * 1997-05-23 1999-03-16 Stmicroelectronics, Inc. Method of stress testing integrated circuit having memory and integrated circuit having stress tester for memory thereof
FR2764095B1 (fr) * 1997-05-30 2001-10-12 Sgs Thomson Microelectronics Circuit de memoire avec redondance dynamique
KR100253304B1 (ko) 1997-07-29 2000-04-15 김영환 레터박스필터링회로및방법
KR100273263B1 (ko) * 1997-12-27 2001-01-15 김영환 리페어제어회로
US6212482B1 (en) 1998-03-06 2001-04-03 Micron Technology, Inc. Circuit and method for specifying performance parameters in integrated circuits
US5956276A (en) * 1998-09-16 1999-09-21 Mosel Vitelic Corporation Semiconductor memory having predecoder control of spare column select lines
US6018484A (en) * 1998-10-30 2000-01-25 Stmicroelectronics, Inc. Method and apparatus for testing random access memory devices
US6452845B1 (en) 1999-01-07 2002-09-17 Micron Technology, Inc. Apparatus for testing redundant elements in a packaged semiconductor memory device
US6912170B1 (en) * 2000-03-14 2005-06-28 Micron Technology, Inc. Method and apparatus for permanent electrical removal of an integrated circuit output after packaging
US6178126B1 (en) * 2000-03-23 2001-01-23 International Business Machines Corporation Memory and system configuration for programming a redundancy address in an electric system
US6466504B1 (en) * 2000-06-08 2002-10-15 Virage Logic Corp. Compilable block clear mechanism on per I/O basis for high-speed memory
KR100385957B1 (ko) * 2001-02-14 2003-06-02 삼성전자주식회사 효율적인 칼럼 리던던시 스킴을 갖는 반도체 메모리장치
KR100425456B1 (ko) * 2001-08-02 2004-03-30 삼성전자주식회사 메이크-링크를 구비하는 퓨즈 박스, 이를 구비하는 리던던트 어드레스 디코더 및 메모리 셀 대체방법
JP3723477B2 (ja) * 2001-09-06 2005-12-07 松下電器産業株式会社 半導体記憶装置
US7084671B1 (en) * 2004-01-26 2006-08-01 Sun Microsystems, Inc. Sense amplifier and method for making the same
KR100739927B1 (ko) * 2005-06-29 2007-07-16 주식회사 하이닉스반도체 반도체 메모리 장치의 리페어 입출력 퓨즈 회로
US7551498B2 (en) * 2006-12-15 2009-06-23 Atmel Corporation Implementation of column redundancy for a flash memory with a high write parallelism
US7898887B2 (en) 2007-08-29 2011-03-01 Agere Systems Inc. Sense amplifier with redundancy
US9589601B2 (en) 2015-03-16 2017-03-07 Arm Limited Integrated circuit using topology configurations

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4573146A (en) * 1982-04-20 1986-02-25 Mostek Corporation Testing and evaluation of a semiconductor memory containing redundant memory elements
US4601019B1 (en) * 1983-08-31 1997-09-30 Texas Instruments Inc Memory with redundancy
JPS6199999A (ja) * 1984-10-19 1986-05-19 Hitachi Ltd 半導体記憶装置
US4691300A (en) * 1985-12-20 1987-09-01 Motorola, Inc. Redundant column substitution architecture with improved column access time
KR890003691B1 (ko) * 1986-08-22 1989-09-30 삼성전자 주식회사 블럭 열 리던던씨 회로
JPS63239696A (ja) * 1987-03-27 1988-10-05 Toshiba Corp 冗長回路付メモリの試験装置
US4807191A (en) * 1988-01-04 1989-02-21 Motorola, Inc. Redundancy for a block-architecture memory
US4922461A (en) * 1988-03-30 1990-05-01 Kabushiki Kaisha Toshiba Static random access memory with address transition detector
US5295102A (en) * 1992-01-31 1994-03-15 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with improved redundant sense amplifier control

Also Published As

Publication number Publication date
EP0554055A2 (de) 1993-08-04
DE69319755D1 (de) 1998-08-27
JPH06203592A (ja) 1994-07-22
EP0554055B1 (de) 1998-07-22
EP0554055A3 (en) 1994-12-14
US5455798A (en) 1995-10-03
JP3773961B2 (ja) 2006-05-10
US5295102A (en) 1994-03-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee