JPS56159897A - Read-only memory - Google Patents

Read-only memory

Info

Publication number
JPS56159897A
JPS56159897A JP6252880A JP6252880A JPS56159897A JP S56159897 A JPS56159897 A JP S56159897A JP 6252880 A JP6252880 A JP 6252880A JP 6252880 A JP6252880 A JP 6252880A JP S56159897 A JPS56159897 A JP S56159897A
Authority
JP
Japan
Prior art keywords
array
rom
fold
outputs
threshold level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6252880A
Other languages
Japanese (ja)
Other versions
JPS5939839B2 (en
Inventor
Shinji Morozumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP55062528A priority Critical patent/JPS5939839B2/en
Publication of JPS56159897A publication Critical patent/JPS56159897A/en
Publication of JPS5939839B2 publication Critical patent/JPS5939839B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To realize a large-capacity by setting an ROM transistor array having a multilevel threshold level by use of an ion implantation technique of two times or more. CONSTITUTION:An ROM Tr array is composed of a column decoder 1 which decodes an address input ADR and outputs column selection signals RASO-RASN, and a row decoder 2 which outputs, as one bit output DO constituting one word, only one bit signal selected among bit outputs BO-BM of transistors TR in a column array selected by the column selection signal. Array of TRs of NX2M has been arranged and TRs having a threshold level of 4 levels by ion implantations of 2 times or more to the array are placed according to a predetermined program. As the result, 1 level among 4 levels of a threshold level has been set to each cell. Accordingly, 4 state, that is, 2 bits corresponds to 1 cell and two-fold ROM capacity can be achieved. Further a large capacity of two-fold or three-fold ROM can be obtained.
JP55062528A 1980-05-12 1980-05-12 Read-only memory Expired JPS5939839B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55062528A JPS5939839B2 (en) 1980-05-12 1980-05-12 Read-only memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55062528A JPS5939839B2 (en) 1980-05-12 1980-05-12 Read-only memory

Publications (2)

Publication Number Publication Date
JPS56159897A true JPS56159897A (en) 1981-12-09
JPS5939839B2 JPS5939839B2 (en) 1984-09-26

Family

ID=13202772

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55062528A Expired JPS5939839B2 (en) 1980-05-12 1980-05-12 Read-only memory

Country Status (1)

Country Link
JP (1) JPS5939839B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57143797A (en) * 1981-01-28 1982-09-06 Gen Instrument Corp Read only memory
JPS58500147A (en) * 1981-02-25 1983-01-20 モトロ−ラ・インコ−ポレ−テツド A memory device having memory cells that can store two or more states
US4571708A (en) * 1984-12-26 1986-02-18 Mostek Corporation CMOS ROM Data select circuit
JPS6262399U (en) * 1985-10-05 1987-04-17
WO1995031814A1 (en) * 1994-05-13 1995-11-23 Aplus Integrated Circuits, Inc. Multistate rom memory cell array

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62118324U (en) * 1986-01-17 1987-07-27

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57143797A (en) * 1981-01-28 1982-09-06 Gen Instrument Corp Read only memory
JPH0154800B2 (en) * 1981-01-28 1989-11-21 Gen Instrument Corp
JPS58500147A (en) * 1981-02-25 1983-01-20 モトロ−ラ・インコ−ポレ−テツド A memory device having memory cells that can store two or more states
US4571708A (en) * 1984-12-26 1986-02-18 Mostek Corporation CMOS ROM Data select circuit
JPS6262399U (en) * 1985-10-05 1987-04-17
WO1995031814A1 (en) * 1994-05-13 1995-11-23 Aplus Integrated Circuits, Inc. Multistate rom memory cell array

Also Published As

Publication number Publication date
JPS5939839B2 (en) 1984-09-26

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