JPS56140595A - Multilevel rom - Google Patents
Multilevel romInfo
- Publication number
- JPS56140595A JPS56140595A JP4181580A JP4181580A JPS56140595A JP S56140595 A JPS56140595 A JP S56140595A JP 4181580 A JP4181580 A JP 4181580A JP 4181580 A JP4181580 A JP 4181580A JP S56140595 A JPS56140595 A JP S56140595A
- Authority
- JP
- Japan
- Prior art keywords
- word lines
- transistor
- selection
- line
- cell group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
Abstract
PURPOSE:To make it possible to input data consisting of not less than two bits to one transistor by composing a cell group of a high-voltage power source, word lines, a selection line, cell transistors, and a selection transistor. CONSTITUTION:Part of address input 36 is decoded by address decoder 37, and output 38 consists of word lines and a selection line. In memory array 39, word lines, a selection line and a power line run and bit line 40 runs lengthwise. Memory array 39 is composed of cell group 71 as a unit. Cell group 71 consists of high- voltage power source 47, word lines 48-51, selection line 52, bit line 59, cell transistors 61-64, and selection transistor 65. In this constitution, data consisting of not less than two bits can be inputted to one transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4181580A JPS56140595A (en) | 1980-03-31 | 1980-03-31 | Multilevel rom |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4181580A JPS56140595A (en) | 1980-03-31 | 1980-03-31 | Multilevel rom |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56140595A true JPS56140595A (en) | 1981-11-02 |
Family
ID=12618797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4181580A Pending JPS56140595A (en) | 1980-03-31 | 1980-03-31 | Multilevel rom |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56140595A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0103093A2 (en) * | 1982-09-13 | 1984-03-21 | Kabushiki Kaisha Toshiba | Multi-bit-per-cell read only memory circuit |
US4902190A (en) * | 1987-09-14 | 1990-02-20 | Cascade Corporation | Fork positioning attachment for lift trucks |
US6672823B2 (en) | 2001-09-11 | 2004-01-06 | Cascade Corporation | Fork positioner for facilitating replacement of forks on lift trucks |
WO2004003926A3 (en) * | 2002-06-27 | 2004-03-25 | Matrix Semiconductor Inc | Low-cost, serially-connected, multi-level mask-programmable read-only memory |
US7909563B2 (en) | 2004-11-30 | 2011-03-22 | Cascade Corporation | Fork positioner |
US8403618B2 (en) | 2004-11-30 | 2013-03-26 | Cascade Corporation | Lift truck load handler |
-
1980
- 1980-03-31 JP JP4181580A patent/JPS56140595A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0103093A2 (en) * | 1982-09-13 | 1984-03-21 | Kabushiki Kaisha Toshiba | Multi-bit-per-cell read only memory circuit |
US4902190A (en) * | 1987-09-14 | 1990-02-20 | Cascade Corporation | Fork positioning attachment for lift trucks |
US6672823B2 (en) | 2001-09-11 | 2004-01-06 | Cascade Corporation | Fork positioner for facilitating replacement of forks on lift trucks |
US7008167B2 (en) | 2001-09-11 | 2006-03-07 | Cascade Corporation | Fork positioner for facilitating replacement of forks on lift trucks |
WO2004003926A3 (en) * | 2002-06-27 | 2004-03-25 | Matrix Semiconductor Inc | Low-cost, serially-connected, multi-level mask-programmable read-only memory |
US7909563B2 (en) | 2004-11-30 | 2011-03-22 | Cascade Corporation | Fork positioner |
US8403618B2 (en) | 2004-11-30 | 2013-03-26 | Cascade Corporation | Lift truck load handler |
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