JPS54119847A - Memory unit - Google Patents

Memory unit

Info

Publication number
JPS54119847A
JPS54119847A JP2703078A JP2703078A JPS54119847A JP S54119847 A JPS54119847 A JP S54119847A JP 2703078 A JP2703078 A JP 2703078A JP 2703078 A JP2703078 A JP 2703078A JP S54119847 A JPS54119847 A JP S54119847A
Authority
JP
Japan
Prior art keywords
address
memory area
information
substituted
logic array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2703078A
Other languages
Japanese (ja)
Inventor
Ryuichi Usami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2703078A priority Critical patent/JPS54119847A/en
Publication of JPS54119847A publication Critical patent/JPS54119847A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE: To obtain the substituted memory area address in a short time, by constituting a plurality of information terminals and each input bit information with the means inverting and the programmable logic array having a plurality of logical sum circuits and output terminals.
CONSTITUTION: When the delivery address information of the original request unit designates deficient word area of the main memory area 23a, the address conversion means produces the address information of the substituted memory area 23b based on the delivery address information of the request unit, and accessing is made to the substituted word area on the region 23 to the deficient word area. In this case, as the address conversion means, the logic array is constituted with the programmable logic array 21 with the means 42-1,...,42-w turning the input bit information forward or reverse, a plurality of logical sum circuits 44, 45-1,...45-w and the output terminals 31, 32-1,...,32-w. As a result, the substituted memory area address can be obtained in a short time.
COPYRIGHT: (C)1979,JPO&Japio
JP2703078A 1978-03-09 1978-03-09 Memory unit Pending JPS54119847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2703078A JPS54119847A (en) 1978-03-09 1978-03-09 Memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2703078A JPS54119847A (en) 1978-03-09 1978-03-09 Memory unit

Publications (1)

Publication Number Publication Date
JPS54119847A true JPS54119847A (en) 1979-09-18

Family

ID=12209665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2703078A Pending JPS54119847A (en) 1978-03-09 1978-03-09 Memory unit

Country Status (1)

Country Link
JP (1) JPS54119847A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5794994A (en) * 1980-12-02 1982-06-12 Fujitsu Ltd Address converting circuit of storage device
JPS589300A (en) * 1981-06-30 1983-01-19 プロー・エレクトロニクス・コーポレーション Mapping method and apparatus
JPS5860491A (en) * 1981-09-18 1983-04-09 ゲオルグ・フアウ・コ−ザ Method and apparatus for safely holding data of memory
JPS59165161A (en) * 1983-03-11 1984-09-18 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Volume restoration system of data set for word processing system
JPS6143387A (en) * 1984-08-08 1986-03-01 Toppan Printing Co Ltd Information processing method of ic card
JPS61120398A (en) * 1984-11-14 1986-06-07 Fujitsu Ltd Semiconductor memory
JPS61180350A (en) * 1985-02-05 1986-08-13 Nec Corp Memory package
JPS61198348A (en) * 1985-02-28 1986-09-02 Nec Corp Memory package
JPH08255500A (en) * 1994-12-28 1996-10-01 Lsi Logic Corp Method and apparatus regarding constructible built-in self- repair of asic memory design

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5794994A (en) * 1980-12-02 1982-06-12 Fujitsu Ltd Address converting circuit of storage device
JPS589300A (en) * 1981-06-30 1983-01-19 プロー・エレクトロニクス・コーポレーション Mapping method and apparatus
JPS5860491A (en) * 1981-09-18 1983-04-09 ゲオルグ・フアウ・コ−ザ Method and apparatus for safely holding data of memory
JPS59165161A (en) * 1983-03-11 1984-09-18 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Volume restoration system of data set for word processing system
JPH0317141B2 (en) * 1983-03-11 1991-03-07 Intaanashonaru Bijinesu Mashiinzu Corp
JPS6143387A (en) * 1984-08-08 1986-03-01 Toppan Printing Co Ltd Information processing method of ic card
JPS61120398A (en) * 1984-11-14 1986-06-07 Fujitsu Ltd Semiconductor memory
JPH0419640B2 (en) * 1984-11-14 1992-03-31 Fujitsu Ltd
JPS61180350A (en) * 1985-02-05 1986-08-13 Nec Corp Memory package
JPS61198348A (en) * 1985-02-28 1986-09-02 Nec Corp Memory package
JPH08255500A (en) * 1994-12-28 1996-10-01 Lsi Logic Corp Method and apparatus regarding constructible built-in self- repair of asic memory design

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