TW279987B - The word line driving circuit of mask ROM - Google Patents
The word line driving circuit of mask ROMInfo
- Publication number
- TW279987B TW279987B TW084107579A TW84107579A TW279987B TW 279987 B TW279987 B TW 279987B TW 084107579 A TW084107579 A TW 084107579A TW 84107579 A TW84107579 A TW 84107579A TW 279987 B TW279987 B TW 279987B
- Authority
- TW
- Taiwan
- Prior art keywords
- voltage
- word line
- output
- driving circuit
- line driving
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
Abstract
A word line driving circuit with multiple memory cells is constructed by n-channel metal-oxide semiconductor transistors having the following characteristics: Arrange the memory cell in column and row directions to form memory array; By providing word line signal to the related row decoder and selecting the word line driving circuit inside the mask ROM of the memory unit along the column direction, whose features are: Select the 1st voltage & 2nd voltage to be the driving source voltage of word line and output the source voltage, in which the 1st voltage is higher than the critical value of memory cell and 2nd voltage lower than 1st voltage but higher than critical value; Control method which relates to address changed and control voltage output. Output the 1st voltage at the initial period of row address changed while changing into 2nd voltage and output it before its next changed.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19770794A JP3185553B2 (en) | 1994-07-30 | 1994-07-30 | Word line drive circuit for mask ROM |
JP13482995A JPH08306194A (en) | 1995-05-08 | 1995-05-08 | Semiconductor memory |
Publications (1)
Publication Number | Publication Date |
---|---|
TW279987B true TW279987B (en) | 1996-07-01 |
Family
ID=26468815
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084107579A TW279987B (en) | 1994-07-30 | 1995-07-21 | The word line driving circuit of mask ROM |
Country Status (2)
Country | Link |
---|---|
KR (1) | KR100208131B1 (en) |
TW (1) | TW279987B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8258824B2 (en) | 2010-05-24 | 2012-09-04 | Powerforest Technology Corp. | Heterodyne dual slope frequency generation method for the load change of power supply |
TWI406294B (en) * | 2009-04-17 | 2013-08-21 | Vanguard Int Semiconduct Corp | Memory and storage device utilizing the same |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100636915B1 (en) * | 1999-06-29 | 2006-10-19 | 주식회사 하이닉스반도체 | Apparatus and method for supplying a wordline boosting signal of semiconductor memory device |
-
1995
- 1995-07-21 TW TW084107579A patent/TW279987B/en active
- 1995-07-29 KR KR1019950023133A patent/KR100208131B1/en not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI406294B (en) * | 2009-04-17 | 2013-08-21 | Vanguard Int Semiconduct Corp | Memory and storage device utilizing the same |
US8258824B2 (en) | 2010-05-24 | 2012-09-04 | Powerforest Technology Corp. | Heterodyne dual slope frequency generation method for the load change of power supply |
Also Published As
Publication number | Publication date |
---|---|
KR960005622A (en) | 1996-02-23 |
KR100208131B1 (en) | 1999-07-15 |
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