DE69319267T2 - Verfahren zur Herstellung eines Transistors mit schwebendem Gate - Google Patents
Verfahren zur Herstellung eines Transistors mit schwebendem GateInfo
- Publication number
- DE69319267T2 DE69319267T2 DE69319267T DE69319267T DE69319267T2 DE 69319267 T2 DE69319267 T2 DE 69319267T2 DE 69319267 T DE69319267 T DE 69319267T DE 69319267 T DE69319267 T DE 69319267T DE 69319267 T2 DE69319267 T2 DE 69319267T2
- Authority
- DE
- Germany
- Prior art keywords
- oxide
- tunnel
- tunnelling
- floating gate
- tunnel oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 2
- 230000000694 effects Effects 0.000 abstract 1
- 230000006870 function Effects 0.000 abstract 1
- 230000001771 impaired effect Effects 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- 230000015654 memory Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28176—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7882—Programmable transistors with only two possible levels of programmation charging by injection of carriers through a conductive insulator, e.g. Poole-Frankel conduction
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Non-Volatile Memory (AREA)
- Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP92200707 | 1992-03-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69319267D1 DE69319267D1 (de) | 1998-07-30 |
DE69319267T2 true DE69319267T2 (de) | 1999-03-04 |
Family
ID=8210476
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69319267T Expired - Fee Related DE69319267T2 (de) | 1992-03-12 | 1993-03-04 | Verfahren zur Herstellung eines Transistors mit schwebendem Gate |
Country Status (8)
Country | Link |
---|---|
US (1) | US5371027A (ko) |
EP (1) | EP0560435B1 (ko) |
JP (1) | JPH0629544A (ko) |
KR (1) | KR100262830B1 (ko) |
AT (1) | ATE167756T1 (ko) |
CA (1) | CA2091332C (ko) |
DE (1) | DE69319267T2 (ko) |
TW (1) | TW220007B (ko) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
BE1007475A3 (nl) * | 1993-09-06 | 1995-07-11 | Philips Electronics Nv | Halfgeleiderinrichting met een niet-vluchtig geheugen en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting. |
KR0149527B1 (ko) * | 1994-06-15 | 1998-10-01 | 김주용 | 반도체 소자의 고전압용 트랜지스터 및 그 제조방법 |
US5554551A (en) * | 1994-11-23 | 1996-09-10 | United Microelectronics Corporation | Method of manufacture of an EEPROM cell with self-aligned thin dielectric area |
US5460991A (en) * | 1995-03-16 | 1995-10-24 | United Microelectronics Corporation | Method of making high coupling ratio flash EEPROM device |
US5726070A (en) * | 1995-09-06 | 1998-03-10 | United Microelectronics Corporation | Silicon-rich tunnel oxide formed by oxygen implantation for flash EEPROM |
JP3383140B2 (ja) | 1995-10-02 | 2003-03-04 | 株式会社東芝 | 不揮発性半導体記憶装置の製造方法 |
EP0833393B1 (en) * | 1996-09-30 | 2011-12-14 | STMicroelectronics Srl | Floating gate non-volatile memory cell with low erasing voltage and manufacturing method |
US6072720A (en) * | 1998-12-04 | 2000-06-06 | Gatefield Corporation | Nonvolatile reprogrammable interconnect cell with programmable buried bitline |
US6232630B1 (en) | 1999-07-07 | 2001-05-15 | Advanced Micro Devices, Inc. | Light floating gate doping to improve tunnel oxide reliability |
KR100383083B1 (ko) * | 2000-09-05 | 2003-05-12 | 아남반도체 주식회사 | 저전압 구동 플래쉬 메모리 및 그 제조 방법 |
JP2003023113A (ja) * | 2001-07-05 | 2003-01-24 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US20050156228A1 (en) * | 2004-01-16 | 2005-07-21 | Jeng Erik S. | Manufacture method and structure of a nonvolatile memory |
KR100564629B1 (ko) * | 2004-07-06 | 2006-03-28 | 삼성전자주식회사 | 이이피롬 소자 및 그 제조 방법 |
KR102446409B1 (ko) * | 2015-09-18 | 2022-09-22 | 삼성전자주식회사 | 시냅스 메모리 소자의 제조방법 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS497870B1 (ko) * | 1969-06-06 | 1974-02-22 | ||
GB1596184A (en) * | 1976-11-27 | 1981-08-19 | Fujitsu Ltd | Method of manufacturing semiconductor devices |
JPS583290A (ja) * | 1981-06-29 | 1983-01-10 | インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン | メモリ・アレイ |
US5210042A (en) * | 1983-09-26 | 1993-05-11 | Fujitsu Limited | Method of producing semiconductor device |
US4717943A (en) * | 1984-06-25 | 1988-01-05 | International Business Machines | Charge storage structure for nonvolatile memories |
JPH0750693B2 (ja) * | 1985-12-02 | 1995-05-31 | 日本テキサス・インスツルメンツ株式会社 | 酸化シリコン膜の製造方法 |
CA1276314C (en) * | 1988-03-24 | 1990-11-13 | Alexander Kalnitsky | Silicon ion implanted semiconductor device |
US5236851A (en) * | 1988-07-14 | 1993-08-17 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating semiconductor devices |
US5250455A (en) * | 1990-04-10 | 1993-10-05 | Matsushita Electric Industrial Co., Ltd. | Method of making a nonvolatile semiconductor memory device by implanting into the gate insulating film |
US5147813A (en) * | 1990-08-15 | 1992-09-15 | Intel Corporation | Erase performance improvement via dual floating gate processing |
-
1992
- 1992-11-11 TW TW081109019A patent/TW220007B/zh active
-
1993
- 1993-03-04 EP EP93200612A patent/EP0560435B1/en not_active Expired - Lifetime
- 1993-03-04 DE DE69319267T patent/DE69319267T2/de not_active Expired - Fee Related
- 1993-03-04 AT AT93200612T patent/ATE167756T1/de not_active IP Right Cessation
- 1993-03-09 CA CA002091332A patent/CA2091332C/en not_active Expired - Fee Related
- 1993-03-09 KR KR1019930003510A patent/KR100262830B1/ko not_active IP Right Cessation
- 1993-03-10 US US08/029,255 patent/US5371027A/en not_active Expired - Fee Related
- 1993-03-10 JP JP5049316A patent/JPH0629544A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH0629544A (ja) | 1994-02-04 |
DE69319267D1 (de) | 1998-07-30 |
KR100262830B1 (ko) | 2000-08-01 |
CA2091332A1 (en) | 1993-09-13 |
ATE167756T1 (de) | 1998-07-15 |
CA2091332C (en) | 2002-01-29 |
EP0560435A2 (en) | 1993-09-15 |
KR930020733A (ko) | 1993-10-20 |
EP0560435B1 (en) | 1998-06-24 |
EP0560435A3 (en) | 1994-08-24 |
US5371027A (en) | 1994-12-06 |
TW220007B (ko) | 1994-02-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |